JP2020077827A - Semiconductor module and manufacturing method therefor - Google Patents

Abstract

To provide a semiconductor module which includes a silicon carbide semiconductor device which indicates low on-resistance and in which breakage is suppressed.SOLUTION: A manufacturing method for a semiconductor module includes: an electrode material layer deposition process of depositing an electrode material layer on a lower surface of a silicon carbide substrate; and a laser annealing process of emitting a laser beam to the electrode material layer. The electrode material layer includes a first range including the center of the electrode material layer and a second range that is around the first range and surrounds the center of the electrode material layer. The laser annealing process is performed so that a temperature of an interface between the electrode material layer and the silicon carbide substrate becomes lower in the second range than that in the first range.SELECTED DRAWING: Figure 8

Description

  The technology disclosed in this specification relates to a semiconductor module and a method for manufacturing the same.

  Development of a silicon carbide semiconductor device having a silicon carbide substrate is in progress. Silicon carbide has a wide band gap and is known as a semiconductor material that can achieve both low on-resistance and high off-state breakdown voltage of a semiconductor device.

  Patent Document 1 discloses a semiconductor module in which a silicon carbide semiconductor device is mounted. In a silicon carbide semiconductor device mounted on this semiconductor module, a lower surface electrode is provided on a lower surface of a silicon carbide substrate, and an upper surface electrode is provided on an upper surface of the silicon carbide substrate. The lead frame is joined to the lower surface electrode of the silicon carbide semiconductor device via the lower solder layer, and the conductor block is joined to the upper surface electrode of the silicon carbide semiconductor device via the upper solder layer. As described above, the semiconductor module disclosed in Patent Document 1 is configured by laminating the lead frame, the silicon carbide semiconductor device, and the conductor block, and is configured as a semiconductor module having a double-sided cooling structure.

JP, 2017-112280, A

  When this semiconductor module is viewed from the stacking direction, the silicon carbide semiconductor device is located inside the lead frame, and the conductor block is located inside the silicon carbide semiconductor device. Therefore, the lower solder layer between the lead frame and the silicon carbide semiconductor device substantially matches the shape of the silicon carbide semiconductor device when viewed from the stacking direction. Further, the upper solder layer between the silicon carbide semiconductor device and the conductor block substantially matches the shape of the conductor block when viewed from the stacking direction. Therefore, when viewed from the stacking direction, the lower solder layer and the upper solder layer do not have the same shape, and the lower solder layer has a form in which it spreads in the surface direction more than the upper solder layer.

  According to the research conducted by the present inventors, the following two things have been found regarding such a semiconductor module.

(1) According to a study by the present inventors, when the silicon carbide semiconductor device is intermittently energized and temperature fluctuations are repeated in the semiconductor module (cooling / heating cycle), the surface of the solder forming the lower solder layer is It has been found that the silicon carbide semiconductor device bends because the flow in the direction and the flow in the surface direction of the solder forming the upper solder layer are different. It has been found that when the solder flows, the positions of the sparse and dense portions of the solder amount in the lower solder layer and the sparse and dense portions of the solder amount in the upper solder layer do not match in the stacking direction, and the silicon carbide semiconductor device bends. .. It should be noted that such a phenomenon was observed for the first time as a result of adopting a silicon carbide semiconductor device and enabling use in a higher temperature range than before. If the amount of deformation due to such bending increases, the silicon carbide semiconductor device may be damaged. In order to prevent such damage of the silicon carbide semiconductor device, it is important to increase the bending strength of the silicon carbide substrate.

(2) In order to improve the ohmic properties of the lower surface electrode and the silicon carbide substrate, the entire electrode material layer for forming the lower surface electrode is irradiated with laser light and sintered to react the electrode material layer with the silicon carbide substrate. It is possible to make it. According to the study by the present inventors, when the irradiation energy density of the laser beam irradiated per unit area of the electrode material layer is high, the completed lower surface electrode and the silicon carbide substrate are well bonded, and the lower surface electrode and the silicon carbide substrate are well bonded. It has been found that although the ohmic resistance of the silicon carbide lowers the on-resistance of the silicon carbide semiconductor device, the bending strength of the silicon carbide substrate decreases. On the other hand, when the irradiation energy density of the laser beam irradiated per unit area of the electrode material layer is small, the bending strength of the silicon carbide substrate is maintained high, but the ohmic property of the completed lower electrode and the silicon carbide substrate deteriorates. It has been found that the on-resistance of the silicon carbide semiconductor device increases. That is, according to the research conducted by the present inventors, when the entire electrode material layer is irradiated with laser light, the on-resistance of the silicon carbide semiconductor device with respect to the irradiation energy density of the laser light irradiated per unit area of the electrode material layer. It has been found that there is a trade-off relationship between the bending strength of silicon carbide and the silicon carbide substrate. Although the details of the reason for this phenomenon are not known, it is presumed that the increase in stress and / or the increase in crystal defects of the silicon carbide substrate due to the laser annealing has an influence.

  The specification of the present application is a semiconductor module recalled on the basis of the novel findings of (1) and (2) above, which is a semiconductor module including a silicon carbide semiconductor device exhibiting low on-resistance and suppressing damage. provide.

  A method for manufacturing a semiconductor module disclosed in the present specification is a silicon carbide semiconductor device having a silicon carbide substrate, wherein a lower surface electrode is provided on a lower surface of the silicon carbide substrate, and an upper surface electrode is provided on an upper surface of the silicon carbide substrate. A silicon carbide semiconductor device, a lead frame bonded to the lower surface electrode of the silicon carbide semiconductor device via a lower solder layer, and an upper solder layer to the upper surface electrode of the silicon carbide semiconductor device. And a conductor block to be joined together, and the silicon carbide semiconductor device is located inside the lead frame when viewed from the stacking direction of the lead frame, the silicon carbide semiconductor device, and the conductor block. The conductor block is located inside the silicon carbide semiconductor device, and can be used when manufacturing a semiconductor module. That. This method of manufacturing a semiconductor module may include an electrode material layer forming step of forming an electrode material layer on the lower surface of the silicon carbide substrate, and a laser annealing step of irradiating the electrode material layer with laser light. it can. The electrode material layer has a first range including the center of the electrode material layer and a second range around the first range and surrounding the center of the electrode material layer. The laser annealing step is performed such that the temperature of the interface between the electrode material layer and the silicon carbide substrate is lower in the second range than in the first range.

  According to the semiconductor module manufactured by the manufacturing method described above, the silicon carbide semiconductor device exhibits low on-resistance due to good ohmic properties in the first range, and the bending strength of the silicon carbide substrate is increased in the second range. Therefore, damage to the silicon carbide semiconductor device can be suppressed.

  A silicon carbide semiconductor device disclosed in the present specification is a silicon carbide semiconductor device having a silicon carbide substrate, in which a lower surface electrode is provided on a lower surface of the silicon carbide substrate and an upper surface electrode is provided on an upper surface of the silicon carbide substrate. A silicon carbide semiconductor device, a lead frame that is joined to the lower surface electrode of the silicon carbide semiconductor device via a lower solder layer, and an upper solder layer that is provided to the upper surface electrode of the silicon carbide semiconductor device. And a conductor block to be joined. When viewed from the stacking direction of the lead frame, the silicon carbide semiconductor device, and the conductor block, the silicon carbide semiconductor device is located inside the lead frame, and the conductor block is more than the silicon carbide semiconductor device. Is also located inside. The lower surface electrode has a first range including the center of the lower surface electrode and a second range around the first range and surrounding the center of the lower surface electrode. The thickness of the lower electrode and the reaction layer of the silicon carbide substrate is smaller in the second range than in the first range.

  According to the semiconductor module, the silicon carbide semiconductor device exhibits low on-resistance due to the good ohmic property in the first range, and the bending strength of the silicon carbide substrate can be increased in the second range. Damage to the silicon semiconductor device can be suppressed.

Sectional drawing of the principal part which shows the structure of the semiconductor module of this embodiment typically. FIG. 4 is a cross-sectional view schematically showing the configuration of the silicon carbide semiconductor device of the present embodiment, which is a cross-sectional view taken along line II-II of FIG. 3. The top view of the silicon carbide semiconductor device of this embodiment. The bottom view of the silicon carbide semiconductor device of this embodiment. The figure explaining the mode of the silicon carbide semiconductor device of the semiconductor module in a cooling / heating cycle. FIG. 7 is a cross sectional view showing one step in a method for manufacturing a silicon carbide semiconductor device. FIG. 7 is a cross sectional view showing one step in a method for manufacturing a silicon carbide semiconductor device. FIG. 7 is a cross sectional view showing one step in a method for manufacturing a silicon carbide semiconductor device. It is sectional drawing which shows one process of another method of manufacturing a silicon carbide semiconductor device. It is sectional drawing which shows one process of another method of manufacturing a silicon carbide semiconductor device.

  The semiconductor module 100 of the present embodiment will be described with reference to FIGS. As shown in FIG. 1, semiconductor module 100 includes lower lead frame 32, silicon carbide semiconductor device 10, conductor block 34, upper lead frame 36, and sealing body 52. The lower lead frame 32, the silicon carbide semiconductor device 10, the conductor block 34, and the upper lead frame 36 are stacked, and these are sealed by the sealing body 52. As described above, the semiconductor module 100 is configured as a semiconductor module having a double-sided cooling structure.

  As shown in FIG. 2, silicon carbide semiconductor device 10 includes a silicon carbide substrate 12, an upper surface electrode 14 provided on upper surface 12 a of silicon carbide substrate 12, and a lower surface electrode provided on lower surface 12 b of silicon carbide substrate 12. 20 and. Silicon carbide semiconductor device 10 is a so-called power semiconductor element, and a structure of a switching element such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is formed inside silicon carbide substrate 12. ing. In addition, in addition to or in place of the structure of the switching element, a silicon structure such as a pn junction diode or a Schottky barrier diode may be formed inside silicon carbide substrate 12. The internal structure of silicon carbide substrate 12 is not particularly limited.

  Each of the upper surface electrode 14 and the lower surface electrode 20 is made of a conductor such as a metal material. Upper surface electrode 14 is in ohmic contact with upper surface 12a of silicon carbide substrate 12. Lower surface electrode 20 is also in ohmic contact with lower surface 12b of silicon carbide substrate 12. Specific configurations of the upper surface electrode 14 and the lower surface electrode 20 are not particularly limited. Each of the upper surface electrode 14 and the lower surface electrode 20 can be configured using molybdenum, nickel, titanium, aluminum, gold, or another metal material, or an alloy containing at least one of these metal materials. As one example, as will be described later in the manufacturing method, the lower surface electrode 20 in the present embodiment has a multilayer structure in which titanium and gold are laminated after laser annealing of the electrode material layer in which molybdenum and nickel are laminated. is doing.

  Silicon carbide semiconductor device 10 further includes an insulating film 16 and a protective film 18. Insulating film 16 and protective film 18 are provided on the peripheral side of upper surface 12a of silicon carbide substrate 12. Insulating film 16 is made of an insulating material such as silicon oxide, and extends in a frame shape along the peripheral edge of silicon carbide substrate 12. Protective film 18 is made of a resin material such as epoxy resin, is located on insulating film 16, and extends in a frame shape along the peripheral edge of silicon carbide substrate 12. Note that the insulating film 16 and the protective film 18 are not necessarily required for application of the present technology.

  As shown in FIGS. 2 and 4, the lower surface electrode 20 includes a first range 20A including the center CT of the lower surface electrode 20 and a second range 20B surrounding the first range 20A and surrounding the center CT of the lower surface electrode 20. , And a third range 20C surrounding the second range 20B and surrounding the center CT of the lower surface electrode 20. In other words, the inside of the range defined as the second range 20B of the lower surface electrode 20 is the first range 20A, and the outside of the range is the third range 20C. The first area 20A of the lower surface electrode 20 has a circular shape, and the second area 20B of the lower surface electrode 20 has a ring shape. Here, the center CT of the lower surface electrode 20 means the center of the lower surface electrode 20 when viewed from the stacking direction of the semiconductor module 100 (hereinafter, referred to as “when viewed in plan”). As one example, in silicon carbide semiconductor device 10 of the present embodiment, since lower surface electrode 20 is provided on the entire lower surface 12b of silicon carbide substrate 12, center CT of lower surface electrode 20 is the center of silicon carbide semiconductor device 10. Matches Therefore, in the following, center CT may be described as the center of silicon carbide semiconductor device 10. The center of the ring defined as the second range 20B coincides with the center CT of the lower surface electrode 20.

  Here, the second range 20B of the lower surface electrode 20 described above does not necessarily have to be divided into a ring shape. As another embodiment, the second area 20B of the lower surface electrode 20 may be partitioned so as to extend along an ellipse, an ellipse, or another closed curve. Alternatively, the second area 20B of the lower surface electrode 20 may be provided so as to extend along a quadrangle, a hexagon, or another polygon. Not limited to these examples, the second range 20B of the lower surface electrode 20 may be provided intermittently or continuously along a closed path that surrounds the center CT of the lower surface electrode 20. The closed path may be composed of only a curved line, may be composed of only a straight line, or may be composed of a combination of a curved line and a straight line.

  The second range 20B of the lower surface electrode 20 has the irradiation energy density of the laser light irradiated in the first range 20A and the first range 20A in the laser annealing process performed to improve the ohmic properties of the lower surface electrode 20 and the silicon carbide substrate 12. It is a region adjusted to be lower than the 3 range 20C. Thereby, the thickness of the bonding layer between lower surface electrode 20 and silicon carbide substrate 12 in second range 20B is smaller than the thickness of the bonding layer between lower surface electrode 20 and silicon carbide substrate 12 in each of first range 20A and third range. Become thin. It should be noted that the phrase "the thickness of the bonding layer is thin" as used herein includes the case where the bonding layer does not exist. Further, the bonding layer refers to a region of the lower surface electrode 20 that is silicidized by laser annealing.

  A process of forming the lower surface electrode 20 of the silicon carbide semiconductor device 10 will be described with reference to FIGS. 6 to 8. First, as shown in FIG. 6, a silicon carbide substrate 12 having a surface structure (various semiconductor regions, various electrodes, etc.) formed thereon is prepared. As a method for manufacturing the surface structure, a known manufacturing method can be appropriately adopted.

  Next, as shown in FIG. 7, an electrode material layer forming step of forming an electrode material layer 120 in which molybdenum and nickel are laminated on the lower surface 12b of the silicon carbide substrate 12 is performed using a sputtering technique. The thickness of the electrode material layer 120 is, for example, 50 to 300 nm. The electrode material layer 120 finally becomes the lower surface electrode 20, and like the lower surface electrode 20, is divided into a first range 20A, a second range 20B, and a third range 20C.

Next, as shown in FIG. 8, a laser annealing step of irradiating the electrode material layer 120 with the laser light 72 is performed. The laser for irradiation is not particularly limited, but for example, a YAG laser, an excimer laser or the like may be used. In this laser annealing step, the first range 20A and the third range 20C of the electrode material layer 120 are irradiated with the laser light 72, and the second range 20B of the electrode material layer 120 is not irradiated with the laser light 72. The irradiation energy density of the laser light 72 with which the first range 20A and the third range 20C are irradiated is adjusted to, for example, 1.5 to 4.0 J / cm ² . If the irradiation energy density of the laser light 72 applied to the second range 20B is within a range smaller than the irradiation energy density of the laser light 72 applied to the first range 20A and the third range 20C, as necessary, The second range 20B may be irradiated with the laser light 72. In any case, this laser annealing step is performed so that the temperature of the interface between the electrode material layer 120 and the silicon carbide substrate 12 is lower in the second range 20B than in the first range 20A and the third range 20C. After the laser annealing process, titanium and gold are deposited on the surface to complete the lower surface electrode 20.

  When the laser annealing step is performed, the electrode material layer 120 reacts with the silicon carbide substrate 12, and a part of the electrode material layer 120 is silicidized. The silicided region of the completed lower surface electrode 20 is called a reaction layer. In the above laser annealing step, the thickness of the reaction layer formed in the second range 20B of the lower surface electrode 20 becomes smaller than the thickness of the reaction layer formed in the first range 20A and the third range 20C of the lower surface electrode 20. ..

  Thus, in the first range 20A and the third range 20C, the completed lower surface electrode 20 and the silicon carbide substrate 12 can make good ohmic contact. On the other hand, in the second range 20B, although the ohmic properties of the completed lower surface electrode 20 and the silicon carbide substrate 12 are not good, according to the study by the present inventors, the reaction between the lower surface electrode 20 and the silicon carbide substrate 12 is suppressed, Even before and after the laser annealing process, the bending strength of the silicon carbide semiconductor device 10 in this portion is maintained. Through these steps, lower surface electrode 20 of silicon carbide semiconductor device 10 described above can be formed.

  Returning to FIG. In semiconductor module 100, lower surface electrode 20 of silicon carbide semiconductor device 10 is bonded to lower lead frame 32 through lower solder layer 42, and upper surface electrode 14 of silicon carbide semiconductor device 10 is interposed through upper solder layer 44. Are joined to the conductor block 34. Further, in the semiconductor module 100, the conductor block 34 and the upper lead frame 36 are joined via the solder layer 46. The lower lead frame 32 is exposed to the outside on the lower surface 52b of the sealing body 52. The upper lead frame 36 is also exposed to the outside on the upper surface 52a of the sealing body 52. Each of lower lead frame 32 and upper lead frame 36 not only constitutes a part of an electric circuit of semiconductor module 100, but also functions as a heat dissipation plate for radiating heat of silicon carbide semiconductor device 10 to the outside. Thus, the semiconductor module 100 has a double-sided cooling structure in which the heat dissipation plate is exposed on each of the upper surface 52a and the lower surface 52b of the sealing body 52.

  Lower solder layer 42 is formed by coating the entire lower surface electrode 20 of silicon carbide semiconductor device 10, and is located between lower lead frame 32 and silicon carbide semiconductor device 10 to join them. .. The upper solder layer 44 is formed by coating the entire upper surface electrode 14 of the silicon carbide semiconductor device 10, and is located between the silicon carbide semiconductor device 10 and the conductor block 34 to join them. Therefore, the shape of lower solder layer 42 in plan view matches the shape of lower surface electrode 20 of silicon carbide semiconductor device 10 (or the shape of silicon carbide semiconductor device 10). Further, the shape of upper solder layer 44 in plan view matches the upper surface electrode 14 (or the shape of the conductor block 34) of the silicon carbide semiconductor device 10.

  As shown in FIGS. 1 and 3, when viewed in a plan view, silicon carbide semiconductor device 10 is located inside lower lead frame 32, and conductor block 34 (that is, an upper surface electrode of silicon carbide semiconductor device 10). (Corresponding to the position of 14) is located inside the silicon carbide semiconductor device 10. Therefore, when viewed in a plan view, the lower solder layer 42 and the upper solder layer 44 do not have the same shape, and the lower solder layer 42 has a form in which the lower solder layer 42 is wider than the upper solder layer 44 in the surface direction. There is.

  In semiconductor module 100, when the silicon carbide semiconductor device 10 is intermittently energized, the temperature of semiconductor module 100 repeatedly changes (cooling cycle). Along with this temperature change, each component of the semiconductor module 100 repeats expansion and contraction. At this time, each constituent element of semiconductor module 100 has a different linear expansion coefficient from each other, so that the stress distribution generated in semiconductor module 100 is not uniform and a high stress is locally generated in silicon carbide semiconductor device 10. obtain. In semiconductor module 100, the linear expansion coefficients of lower lead frame 32, conductor block 34, and upper lead frame 36 are all larger than the linear expansion coefficient of silicon carbide of silicon carbide substrate 12. For example, copper is used as the material of each of the lower lead frame 32, the conductor block 34, and the upper lead frame 36, and the coefficient of linear expansion thereof is 17.7 [ppm / ° C.]. On the other hand, the linear expansion coefficient of silicon carbide of silicon carbide substrate 12 is 5.1 [ppm / ° C.].

  FIG. 5 shows a state of silicon carbide semiconductor device 10 when the temperature of semiconductor module 100 repeatedly changes.

  Since the lower lead frame 32 and the conductor block 34 have large linear expansion coefficients, they repeatedly expand in the surface direction when the temperature of the semiconductor module 100 rises and contract in the surface direction when the temperature of the semiconductor module 100 decreases. On the other hand, since silicon carbide substrate 12 of silicon carbide semiconductor device 10 has a small linear expansion coefficient, expansion and contraction in the surface direction are small. As a result of such a cooling / heating cycle, the solder forming the lower solder layer 42 aggregates and becomes dense at the center CT and the periphery of the silicon carbide semiconductor device 10, and flows so as to become rough between them. On the other hand, the solder forming upper solder layer 44 becomes dense at the peripheral edge of conductor block 34 and flows so as to become coarse at center CT of silicon carbide semiconductor device 10. As described above, the positions of the sparse and dense portions of the solder forming the lower solder layer 42 and the sparse and dense portions of the solder forming the upper solder layer 44 do not match in the stacking direction.

  At the center CT of silicon carbide semiconductor device 10, the solder amount of solder forming lower solder layer 42 is dense, and the solder amount of solder forming upper solder layer 44 is coarse. Further, around the center CT of silicon carbide semiconductor device 10, the solder amount of the solder forming lower solder layer 42 is coarse, and the solder amount of the solder forming upper solder layer 44 is dense. Thereby, silicon carbide semiconductor device 10 is deformed in a convex shape toward the upper side at its center CT, and is deformed in a convex shape toward the lower side at the periphery thereof. The portion that deforms in a convex shape toward the lower side is substantially ring-shaped so as to surround the periphery of the center CT of silicon carbide semiconductor device 10. The portion that deforms in a convex shape toward the lower side has a large deformation amount in the pulling direction, and a tensile stress is applied. Silicon carbide, which is the material of silicon carbide substrate 12, is a material having a large Young's modulus, and there is a possibility that breakage may occur in the portion that deforms convexly downward. In silicon carbide semiconductor device 10 of the present embodiment, second range 20B of lower surface electrode 20 is partitioned corresponding to the position where the amount of deformation that deforms convexly downward is maximum. The position at which the amount of deformation of the silicon carbide semiconductor device 10 convexly deforms to the maximum varies depending on the material and size of each constituent element. Alternatively, it can be grasped by simulation.

  As described above, in silicon carbide semiconductor device 10, lower surface electrode 20 is divided into first range 20A, second range 20B and third range 20C. First range 20A of lower surface electrode 20 corresponds to an active region (a region in which a gate structure is formed on the surface of silicon carbide substrate 12) having the highest current density. As described in the manufacturing method, in the silicon carbide semiconductor device 10, in the first range 20A, the irradiation energy density of the laser light irradiated per unit area of the electrode material layer 120 for forming the lower surface electrode 20 is The temperature of the interface between the electrode material layer 120 and the silicon carbide substrate 12 is sufficiently increased, and the reaction between the electrode material layer 120 and the silicon carbide substrate 12 is sufficiently advanced to complete the lower surface electrode 20. And the silicon carbide substrate 12 are in good ohmic contact with each other. Therefore, silicon carbide semiconductor device 10 can exhibit low on-resistance.

  Second range 20B of lower surface electrode 20 corresponds to a region including a position where the amount of deformation in which silicon carbide semiconductor device 10 is convexly deformed downward is maximum. As described in the manufacturing method, in the silicon carbide semiconductor device 10, in the second range 20B, the irradiation energy density of the laser beam irradiated per unit area of the electrode material layer 120 for forming the lower surface electrode 20 is The temperature of the interface between the electrode material layer 120 and the silicon carbide substrate 12 is low, and the reaction between the electrode material layer 120 and the silicon carbide substrate 12 is not sufficiently advanced. According to the research conducted by the present inventors, in this second range 20B, the bending strength of silicon carbide semiconductor device 10 is maintained high before and after laser annealing. Therefore, silicon carbide semiconductor device 10 is prevented from being damaged even if the temperature of semiconductor module 100 repeatedly changes.

  Third region 20C of lower surface electrode 20 is a region where the deformation amount of silicon carbide semiconductor device 10 is small. In the third range 20C, the irradiation energy density of the laser light irradiated per unit area of the electrode material layer 120 for forming the lower surface electrode 20 is adjusted to a large extent, whereby the electrode material layer 120 and the silicon carbide. The temperature of the interface of substrate 12 becomes sufficiently high, the reaction between electrode material layer 120 and silicon carbide substrate 12 sufficiently proceeds, and completed lower surface electrode 20 and silicon carbide substrate 12 are in good ohmic contact. Therefore, silicon carbide semiconductor device 10 can exhibit low on-resistance.

  As described above, in silicon carbide semiconductor device 10, at least in first range 20A and second range 20B, by adjusting the irradiation energy density of the laser light irradiated per unit area of electrode material layer 120, Silicon carbide semiconductor device 10 has a low on-resistance due to good ohmic properties in first range 20A, and the bending strength of silicon carbide substrate 12 can be increased in second range 20B to prevent damage to silicon carbide semiconductor device 10. Has been.

  In silicon carbide semiconductor device 10, second range 20B of lower surface electrode 20 was partitioned so as to include a position where the amount of deformation in which silicon carbide semiconductor device 10 was deformed in a convex shape to the lower side was the maximum. However, it is not limited to this example. The first range is defined at a position including the center CT of the lower surface electrode 20, and the second range 20B is defined at a position around the first range 20A and surrounding the center CT of the lower surface electrode 20. Device 10 exhibits low on-resistance, and damage to silicon carbide semiconductor device 10 is suppressed. If second range 20B of lower surface electrode 20 is partitioned so as to include a position where silicon carbide semiconductor device 10 is deformed in a convex shape downward, the amount of deformation is maximum, silicon carbide semiconductor device 10 is damaged. Is significantly suppressed. The positions and shapes of first range 20A, second range 20B, and third range 20C can be appropriately set according to the characteristics desired for silicon carbide semiconductor device 10.

  In the manufacturing method described above, when forming the lower surface electrode 20, the irradiation energy density of the laser light irradiated per unit area of the electrode material layer 120 is adjusted. Instead of this example, as shown in FIG. 9, in the electrode material layer deposition step, the electrode material layer 120 is formed such that the thickness of the electrode material layer 120 becomes thicker in the second range 20B than in the first range 20A and the third range 20C. The material layer 120 may be formed. The thickness of the second range 20B is adjusted to be several tens of nm thicker than the thickness of the first range 20A and the third range 20C. According to this example, in the laser annealing step, even if the irradiation energy density of the laser light is the same for the entire electrode material layer 120, the temperature of the interface between the electrode material layer 120 and the silicon carbide substrate 12 is in the first range 20A. And it becomes lower in the second range 20B than in the third range 20C. The silicon carbide semiconductor device 10 described above can also be manufactured by this manufacturing method. Note that, after the laser annealing step, the protruding portion in the second range 20B may be removed using an etching technique.

  Further, instead of the above example, as shown in FIG. 10, a mask layer for forming a mask layer 62 on the electrode material layer 120 corresponding to the second range 20B between the lower surface electrode forming step and the laser annealing step. You may implement a formation process. The material of the mask layer 62 is not particularly limited as long as the irradiation energy reaching the second range 20B of the electrode material layer 120 is reduced in the laser annealing process. As the material of the mask layer 62, it is desirable to use a material having a smaller absorptance for laser light than the electrode material layer 120, a material having a large heat capacity, and a material having a small thermal conductivity. For example, as the material of the mask layer 62, molybdenum, nickel, titanium, aluminum, iron, silicon, carbon, or a material containing them is used. According to this example, in the laser annealing step, even if the irradiation energy density of the laser light is the same for the entire electrode material layer 120, the temperature of the interface between the electrode material layer 120 and the silicon carbide substrate 12 is in the first range 20A. And it becomes lower in the second range 20B than in the third range 20C. The silicon carbide semiconductor device 10 described above can also be manufactured by this manufacturing method.

  The technical elements disclosed in this specification are listed below. The following technical elements are useful independently of each other.

  The method for manufacturing a semiconductor module disclosed in this specification is applicable to a semiconductor module including a silicon carbide semiconductor device, a lead frame, and a conductor block. The silicon carbide semiconductor device has a silicon carbide substrate, a lower surface electrode is provided on a lower surface of the silicon carbide substrate, and an upper surface electrode is provided on an upper surface of the silicon carbide substrate. The type of the silicon carbide semiconductor device is not particularly limited and may be, for example, MOSFET, IGBT, or diode. The lead frame is joined to the lower surface electrode of the silicon carbide semiconductor device via a lower solder layer. The conductor block is joined to the upper surface electrode of the silicon carbide semiconductor device via an upper solder layer. The linear expansion coefficient of each of the material of the lead frame and the conductor block may be larger than that of silicon carbide. When viewed from the stacking direction of the lead frame, the silicon carbide semiconductor device, and the conductor block, the silicon carbide semiconductor device is located inside the lead frame, and the conductor block is more than the silicon carbide semiconductor device. Is also located inside. This method of manufacturing a semiconductor module may include an electrode material layer forming step of forming an electrode material layer on the lower surface of the silicon carbide substrate, and a laser annealing step of irradiating the electrode material layer with laser light. it can. The electrode material layer may have a first range including a center of the electrode material layer and a second range surrounding the first range and surrounding the center of the electrode material layer. The positions and shapes of the first range and the second range can be appropriately set according to the characteristics required for the silicon carbide semiconductor device. The laser annealing step is performed such that the temperature of the interface between the electrode material layer and the silicon carbide substrate is lower in the second range than in the first range.

  In the method of manufacturing a semiconductor module, the laser annealing step may be performed so that the laser beam is not applied to the second range. According to this manufacturing method, in the laser annealing step, the temperature of the interface between the electrode material layer and the silicon carbide substrate can be lower in the second range than in the first range.

  The semiconductor module manufacturing method further includes a mask layer forming step of forming a mask layer on the electrode material layer corresponding to the second range between the electrode material layer forming step and the laser annealing step. You may have it. By forming the mask layer, in the laser annealing step, the temperature of the interface between the electrode material layer and the silicon carbide substrate can be lower in the second range than in the first range.

  In the method of manufacturing a semiconductor module, in the electrode material layer film forming step, the electrode material layer may be formed such that the thickness of the electrode material layer is thicker in the second range than in the first range. According to this manufacturing method, in the laser annealing step, the temperature of the interface between the electrode material layer and the silicon carbide substrate can be lower in the second range than in the first range.

  In the method for manufacturing a semiconductor module described above, the second range may include a position where a deformation amount in which the silicon carbide semiconductor device is deformed downward in a convex shape due to a cooling / heating cycle is maximum. In this case, the first range may be circular and the second range may be ring-shaped. According to this, breakage of the silicon carbide semiconductor device can be significantly suppressed.

  The semiconductor module disclosed in this specification can include a silicon carbide semiconductor device, a lead frame, and a conductor block. The silicon carbide semiconductor device has a silicon carbide substrate, a lower surface electrode is provided on a lower surface of the silicon carbide substrate, and an upper surface electrode is provided on an upper surface of the silicon carbide substrate. The type of the silicon carbide semiconductor device is not particularly limited and may be, for example, MOSFET, IGBT, or diode. The lead frame is joined to the lower surface electrode of the silicon carbide semiconductor device via a lower solder layer. The conductor block is joined to the upper surface electrode of the silicon carbide semiconductor device via an upper solder layer. The linear expansion coefficient of each of the material of the lead frame and the conductor block may be larger than that of silicon carbide. When viewed from the stacking direction of the lead frame, the silicon carbide semiconductor device, and the conductor block, the silicon carbide semiconductor device is located inside the lead frame, and the conductor block is more than the silicon carbide semiconductor device. Is also located inside. The lower surface electrode may have a first range including the center of the lower surface electrode and a second range surrounding the first range and surrounding the center of the lower surface electrode. The positions and shapes of the first range and the second range can be appropriately set according to the characteristics required for the silicon carbide semiconductor device. The thickness of the lower electrode and the reaction layer of the silicon carbide substrate is smaller in the second range than in the first range.

  In the above-mentioned semiconductor module, the second range may include a position where a deformation amount in which the silicon carbide semiconductor device is deformed in a downward convex shape due to a cooling / heating cycle is maximum. In this case, the first range may be circular and the second range may be ring-shaped. According to this, breakage of the silicon carbide semiconductor device can be significantly suppressed.

  Specific examples of the present invention have been described above in detail, but these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above. Further, the technical elements described in the present specification or the drawings exert technical utility alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technique illustrated in the present specification or the drawings can achieve a plurality of purposes at the same time, and achieving one of the purposes has technical utility.

10: silicon carbide semiconductor device 12: silicon carbide substrate 14: upper surface electrode 20: lower surface electrode 20A: first range 20B: second range 20C: third range 32: lower lead frame 34: conductor block 36: upper lead frame 42 : Lower solder layer 44: Upper solder layer 100: Semiconductor module

Claims (9)

A silicon carbide semiconductor device having a silicon carbide substrate, wherein a lower surface electrode is provided on a lower surface of the silicon carbide substrate and an upper surface electrode is provided on an upper surface of the silicon carbide substrate,
A lead frame joined to the lower surface electrode of the silicon carbide semiconductor device via a lower solder layer;
A conductor block joined to the upper surface electrode of the silicon carbide semiconductor device via an upper solder layer,
When viewed from the stacking direction of the lead frame, the silicon carbide semiconductor device, and the conductor block, the silicon carbide semiconductor device is located inside the lead frame, and the conductor block is more than the silicon carbide semiconductor device. Is a method of manufacturing a semiconductor module, which is also located inside,
An electrode material layer forming step of forming an electrode material layer on the lower surface of the silicon carbide substrate;
A laser annealing step of irradiating the electrode material layer with a laser beam,
The electrode material layer has a first range including the center of the electrode material layer, and a second range around the first range and surrounding the center of the electrode material layer,
The laser annealing step is a method for manufacturing a semiconductor module, wherein the temperature of the interface between the electrode material layer and the silicon carbide substrate is lower in the second range than in the first range.   The method of manufacturing a semiconductor module according to claim 1, wherein the laser annealing step is performed so as not to irradiate the laser beam on the second range.   The mask layer forming step of forming a mask layer on the electrode material layer corresponding to the second range is further provided between the electrode material layer forming step and the laser annealing step. 2. The method for manufacturing a semiconductor module according to item 2.   The method of manufacturing a semiconductor module according to claim 1, wherein in the electrode material layer film forming step, the electrode material layer is formed such that the thickness of the electrode material layer is thicker in the second range than in the first range. ..   The semiconductor module according to any one of claims 1 to 4, wherein the second range includes a position in which a deformation amount in which the silicon carbide semiconductor device is deformed in a downward convex shape is maximum due to a heat cycle. Manufacturing method.   The method for manufacturing a semiconductor module according to claim 5, wherein the first range is circular and the second range is ring-shaped. A silicon carbide semiconductor device having a silicon carbide substrate, wherein a lower surface electrode is provided on a lower surface of the silicon carbide substrate and an upper surface electrode is provided on an upper surface of the silicon carbide substrate,
A lead frame joined to the lower surface electrode of the silicon carbide semiconductor device via a lower solder layer;
A conductor block joined to the upper surface electrode of the silicon carbide semiconductor device via an upper solder layer,
When viewed from the stacking direction of the lead frame, the silicon carbide semiconductor device, and the conductor block, the silicon carbide semiconductor device is located inside the lead frame, and the conductor block is more than the silicon carbide semiconductor device. Is also located inside,
The lower surface electrode has a first range including the center of the lower surface electrode, and a second range around the first range and surrounding the center of the lower surface electrode,
A semiconductor module, wherein a thickness of a reaction layer of the lower surface electrode and the silicon carbide substrate is thinner in the second range than in the first range.   The semiconductor module according to claim 7, wherein the second range includes a position where a deformation amount in which the silicon carbide semiconductor device is deformed in a downward convex shape is maximum due to a thermal cycle.   The semiconductor module according to claim 8, wherein the first range has a circular shape and the second range has a ring shape.

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