JP2011054698A - Semiconductor device and method of manufacturing the same - Google Patents

Semiconductor device and method of manufacturing the same Download PDF

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JP2011054698A
JP2011054698A JP2009201246A JP2009201246A JP2011054698A JP 2011054698 A JP2011054698 A JP 2011054698A JP 2009201246 A JP2009201246 A JP 2009201246A JP 2009201246 A JP2009201246 A JP 2009201246A JP 2011054698 A JP2011054698 A JP 2011054698A
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semiconductor device
barrier film
sic substrate
metal
nitride
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JP5448652B2 (en
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Masayoshi Taruya
政良 多留谷
Takeharu Kuroiwa
丈晴 黒岩
Akira Maeda
晃 前田
Akira Yamada
朗 山田
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Mitsubishi Electric Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a silicon carbide (SiC) semiconductor device with a back electrode that can obtain excellent ohmic characteristics with an SiC substrate and is superior in adhesion and durability. <P>SOLUTION: The SiC semiconductor substrate has the back electrode 11 including a nickel film 3 formed on a reverse surface of the SiC substrate 1, and a barrier film 2 interposed between the SiC substrate 1 and the nickel film 3 and having an opening part 2a. A reaction layer 4 of nickel silicide is formed between the SiC substrate 1 and the nickel film 3 at the opening part 2a of the barrier film 2. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

本発明は、炭化珪素基板を用いた半導体装置およびその製造方法に関し、特に、基板の裏面に設ける電極(裏面電極)の形成技術に関するものである。   The present invention relates to a semiconductor device using a silicon carbide substrate and a method for manufacturing the same, and more particularly to a technique for forming an electrode (back electrode) provided on the back surface of a substrate.

従来、炭化珪素(SiC)基板を用いた半導体装置(SiC半導体装置)において、基板の裏面に電極(裏面電極)を形成する際、基板の裏面上に直接、電極材料としてのニッケル膜を形成し、その後、ニッケル膜と基板との間でオーミック特性を得るために、高温の熱処理を行ってニッケル膜と基板との反応層を形成している。   Conventionally, in a semiconductor device (SiC semiconductor device) using a silicon carbide (SiC) substrate, when an electrode (back surface electrode) is formed on the back surface of the substrate, a nickel film as an electrode material is directly formed on the back surface of the substrate. Thereafter, in order to obtain ohmic characteristics between the nickel film and the substrate, a high-temperature heat treatment is performed to form a reaction layer between the nickel film and the substrate.

この反応層は、ニッケルシリサイドの他に、ニッケルの炭化物や炭素粒子などの中間生成物を含んでいる。反応層に中間生成物が含まれると、当該反応層の膜質が荒くなり、構造的に脆いものとなる。その結果、反応層上に形成する電極や配線のための金属膜と反応層との密着強度が低下し、金属膜が剥離する問題があった。そのため、この問題を解決するための手法が提案されている。   In addition to nickel silicide, the reaction layer includes intermediate products such as nickel carbide and carbon particles. When an intermediate product is contained in the reaction layer, the film quality of the reaction layer becomes rough and structurally brittle. As a result, there is a problem that the adhesion strength between the metal film for the electrode or wiring formed on the reaction layer and the reaction layer is lowered, and the metal film is peeled off. For this reason, methods for solving this problem have been proposed.

例えば下記の特許文献1では、上記の熱処理により裏面電極に発生した中間生成物を、電極や配線となる金属膜の形成前に、酸素アッシングやアルゴンスパッタなどの物理的手段で除去することが示されている。   For example, Patent Document 1 below shows that the intermediate product generated on the back electrode by the above heat treatment is removed by physical means such as oxygen ashing or argon sputtering before forming a metal film to be an electrode or wiring. Has been.

他にも、例えば特許文献2では、SiC基板の裏面に第1の金属としてニッケル膜を形成した後、その上を第2の金属としてチタン、タンタルもしくはタングステンで覆ってから、高温の熱処理をする技術が開示されている。この技術によれば、炭素成分は第2の金属と反応して炭化物を形成するため、炭素成分が表面(第2の金属の表面)に析出してこない。これにより、第2の金属層上に形成する電極や配線となる金属層の剥がれを防止することができる。   In addition, for example, in Patent Document 2, after a nickel film is formed as the first metal on the back surface of the SiC substrate, it is covered with titanium, tantalum or tungsten as the second metal, and then a high temperature heat treatment is performed. Technology is disclosed. According to this technique, since the carbon component reacts with the second metal to form a carbide, the carbon component does not precipitate on the surface (the surface of the second metal). Thereby, peeling of the metal layer used as the electrode and wiring formed on the 2nd metal layer can be prevented.

特許第3871607号公報Japanese Patent No. 3871607 特開2006−344688号公報JP 2006-344688 A

特許文献1のSiC半導体装置では、中間生成物を完全には除去できるわけではない上、酸素アッシング時に裏面電極が酸化されたり、アルゴンスパッタ時のイオン照射により裏面電極に損傷層が生じたりすることで、裏面電極のオーミック特性が劣化する可能性がある。   In the SiC semiconductor device of Patent Document 1, the intermediate product cannot be completely removed, and the back electrode is oxidized during oxygen ashing, or a damaged layer is formed on the back electrode due to ion irradiation during argon sputtering. Therefore, the ohmic characteristics of the back electrode may be deteriorated.

また特許文献2のSiC半導体装置において、熱処理で生じた炭素成分が第2の金属と反応して炭化物層を形成したとしても、中間生成物は裏面電極の全面に発生するため、裏面電極の脆化を充分に抑えることができない場合がある。特に、中間生成物が全面に残留していると、裏面電極の付着強度(密着性)および耐久性において、充分に良好な特性を得ることは困難である。また、裏面電極を構成する第1の金属と第2の金属との間に炭化物層が介在するため、裏面電極のオーミック特性が低下する懸念もある。   Further, in the SiC semiconductor device of Patent Document 2, even if the carbon component generated by the heat treatment reacts with the second metal to form a carbide layer, the intermediate product is generated on the entire surface of the back electrode. In some cases, it cannot be sufficiently suppressed. In particular, if the intermediate product remains on the entire surface, it is difficult to obtain sufficiently good characteristics in the adhesion strength (adhesion) and durability of the back electrode. In addition, since the carbide layer is interposed between the first metal and the second metal constituting the back electrode, there is a concern that the ohmic characteristics of the back electrode are deteriorated.

本発明は以上のような課題を解決するためになされたものであり、炭化珪素(SiC)半導体装置において、SiC基板との良好なオーミック特性が得られると共に、密着性および耐久性に優れた裏面電極を提供することを目的とする。   The present invention has been made to solve the above problems, and in a silicon carbide (SiC) semiconductor device, a good ohmic characteristic with a SiC substrate can be obtained, and a back surface excellent in adhesion and durability. An object is to provide an electrode.

本願発明に係る半導体装置は、SiC基板と、前記SiC基板の裏面に形成された第1金属の電極と、前記SiC基板と前記電極との間の一部に介在するバリア膜とを備え、前記SiC基板と前記電極との間における前記バリア膜以外の部分に、前記第1金属のシリサイドが形成されているものである。   A semiconductor device according to the present invention includes a SiC substrate, a first metal electrode formed on a back surface of the SiC substrate, and a barrier film interposed in a part between the SiC substrate and the electrode, The silicide of the first metal is formed in a portion other than the barrier film between the SiC substrate and the electrode.

本願発明に係る半導体装置の製造方法は、SiC基板の裏面の一部に選択的にバリア膜を形成する工程と、前記バリア膜上に第1金属の電極を形成する工程と、前記SiC基板を熱処理することで、前記第1基板と前記SiC基板とを反応させる工程とを備えるものである。   A method of manufacturing a semiconductor device according to the present invention includes a step of selectively forming a barrier film on a part of a back surface of an SiC substrate, a step of forming an electrode of a first metal on the barrier film, and the SiC substrate. The step of reacting the first substrate and the SiC substrate by heat treatment is provided.

本発明によれば、良好なオーミック特性が得られるとともに、特に密着性に優れたSiC基板の裏面電極を得ることができる   According to the present invention, a good ohmic characteristic can be obtained, and a back electrode of a SiC substrate having particularly excellent adhesion can be obtained.

実施の形態1に係るSiC半導体装置の製造工程図である。6 is a manufacturing process diagram of the SiC semiconductor device according to the first embodiment. FIG. 実施の形態1に係るSiC半導体装置のバリア膜のパターンを示す図である。3 is a diagram showing a pattern of a barrier film of the SiC semiconductor device according to the first embodiment. FIG. 実施の形態2に係るSiC半導体装置の製造工程図である。FIG. 10 is a manufacturing process diagram of the SiC semiconductor device according to the second embodiment. 実施の形態3に係るSiC半導体装置の断面図である。6 is a cross-sectional view of an SiC semiconductor device according to a third embodiment. FIG. 本発明に係るSiC半導体装置の評価試験に用いたサンプルの構成図である。It is a block diagram of the sample used for the evaluation test of the SiC semiconductor device which concerns on this invention. ダイシェアー強度試験の結果を示すグラフである。It is a graph which shows the result of a die shear strength test. ヒートサイクル強度試験の結果を示すグラフである。It is a graph which shows the result of a heat cycle intensity test.

<実施の形態1>
図1は、本発明の実施の形態1に係るSiC半導体装置の製造方法を示す工程図である。上記のとおり本発明は、SiC基板の裏面に設けられる電極(裏面電極)の構造およびその形成手法に関するものであるため、本明細書では特に裏面電極の形成を説明し、SiC基板の上面側に形成される半導体デバイスについての説明は省略する。
<Embodiment 1>
FIG. 1 is a process diagram showing a method of manufacturing an SiC semiconductor device according to the first embodiment of the present invention. As described above, the present invention relates to the structure of the electrode (back surface electrode) provided on the back surface of the SiC substrate and the formation method thereof, and therefore, in this specification, the formation of the back surface electrode is particularly described, and the upper surface side of the SiC substrate is described. A description of the formed semiconductor device is omitted.

以下、本実施の形態に係るSiC半導体装置の製造方法を説明する。まずSiC基板1を用意し、当該SiC基板1の上面側に、イオン注入等による通常の方法で所定の半導体デバイス構造(不図示)を形成する。半導体デバイスとしては、例えばショットキーバリアダイオードや電界効果型トランジスタ(MOSFET)等があり、その形成手法は、例えば特開2008−130811号公報、特開2008−210938号公報等に開示されている。   A method for manufacturing the SiC semiconductor device according to the present embodiment will be described below. First, the SiC substrate 1 is prepared, and a predetermined semiconductor device structure (not shown) is formed on the upper surface side of the SiC substrate 1 by an ordinary method such as ion implantation. Semiconductor devices include, for example, Schottky barrier diodes and field effect transistors (MOSFETs), and their formation methods are disclosed in, for example, Japanese Patent Application Laid-Open Nos. 2008-130811 and 2008-210938.

SiC基板1の裏面は、上記の上面の反対側の面、すなわち半導体デバイス構造を形成するためのイオン注入等が施されていない側の面として定義される。本実施の形態では、SiC(000−1)面が裏面となるSiC基板1を用いた。また本実施の形態では、裏面電極形成の前処理として、有機溶剤と酸による有機物除去およびフッ酸浸漬による表面酸化層の除去などにより、SiC基板1の裏面の清浄化処理を行った。   The back surface of the SiC substrate 1 is defined as a surface on the opposite side to the above-described upper surface, that is, a surface on which no ion implantation or the like for forming a semiconductor device structure is performed. In the present embodiment, SiC substrate 1 having the SiC (000-1) surface as the back surface is used. In the present embodiment, as a pretreatment for forming the back electrode, the back surface of SiC substrate 1 is cleaned by removing organic substances with an organic solvent and acid and removing the surface oxide layer by dipping in hydrofluoric acid.

前処理の後、図1(a)の如く、SiC基板1の裏面全面にバリア膜2を形成する。本実施の形態では、バリア膜2として100nm程度の窒化珪素(SiN)膜を用い、その形成は珪素(Si)ターゲットを窒素雰囲気中で放電させるスパッタリング法で行った。   After the pretreatment, a barrier film 2 is formed on the entire back surface of the SiC substrate 1 as shown in FIG. In the present embodiment, a silicon nitride (SiN) film having a thickness of about 100 nm is used as the barrier film 2, and the formation is performed by a sputtering method in which a silicon (Si) target is discharged in a nitrogen atmosphere.

バリア膜2の上にリソグラフィー法により所定形状にパターニングしたレジスト6aを形成し、それをマスクとするリアクティブイオンエッチング(RIE)によりバリア膜2の一部を選択的に除去することで、当該バリア膜2に開口部2aを形成する(図1(b))。   A resist 6a patterned in a predetermined shape by a lithography method is formed on the barrier film 2, and a part of the barrier film 2 is selectively removed by reactive ion etching (RIE) using the resist 6a as a mask. An opening 2a is formed in the film 2 (FIG. 1B).

バリア膜2に形成する開口部2aの形状およびパターンは任意でよいが、図2にその例を示す。図2の各図では、SiC半導体装置の1つのチップの裏面が示されている。例えば図2(a)は、1つのチップに対して1つ、円形の開口部2aを設けた例である。図2(b)は、複数の矩形の開口部2aを行列状に配設した例である。図2(c)は、六角形の開口部2aを蜂の巣構造に配設した例である。例えば、チップの大きさを3mm角程度とすると、0.5mm径程度の開口部2aを1つ以上設けるとよい。より好ましくは、100μm径程度の開口部2aを多数設けるとよい。   The shape and pattern of the opening 2a formed in the barrier film 2 may be arbitrary, but FIG. 2 shows an example thereof. In each drawing of FIG. 2, the back surface of one chip of the SiC semiconductor device is shown. For example, FIG. 2A shows an example in which one circular opening 2a is provided for one chip. FIG. 2B shows an example in which a plurality of rectangular openings 2a are arranged in a matrix. FIG. 2C shows an example in which hexagonal openings 2a are arranged in a honeycomb structure. For example, if the size of the chip is about 3 mm square, one or more openings 2 a having a diameter of about 0.5 mm may be provided. More preferably, a large number of openings 2a having a diameter of about 100 μm are provided.

個々の開口部2aの形状は、これらの例のように鋭角な部分を含まないことが好ましい。複数の開口部2aを設ける場合に、大きさ・形態の異なるものが混在していてもよい。なお、裏面全体に対する開口部2aの面積率は、オーミック特性の確保の観点からは50%以上であることが望ましく、密着性を向上させる観点からは90%以下であることが望ましい。   It is preferable that the shape of each opening 2a does not include an acute angle portion as in these examples. When providing the several opening part 2a, the thing from which a magnitude | size and a form differ may be mixed. The area ratio of the opening 2a with respect to the entire back surface is desirably 50% or more from the viewpoint of ensuring ohmic characteristics, and desirably 90% or less from the viewpoint of improving adhesion.

またここでは開口部2aをリアクティブイオンエッチングで形成したが、開口部2aの形成手法はそれに限られず、例えばフッ酸によるウェットエッチングなどでもよい。またレジスト6aの形成方法も、リソグラフィー法に限られず、例えばスクリーン印刷法やシール転写法などを用いてもよい。またメタルマスクを用いたエッチングにより開口部2aを形成してもよい。   Here, the opening 2a is formed by reactive ion etching, but the method of forming the opening 2a is not limited thereto, and wet etching using hydrofluoric acid, for example, may be used. The method for forming the resist 6a is not limited to the lithography method, and for example, a screen printing method, a seal transfer method, or the like may be used. Alternatively, the opening 2a may be formed by etching using a metal mask.

続いて、レジスト6aを除去し、再びSiC基板1の裏面の清浄化処理を行った後、図1(c)の如く、SiC基板1の裏面全面にニッケル(Ni)膜3を形成する。本実施の形態では裏面電極となるニッケル膜3(第1金属)を、Ar雰囲気中でのスパッタリング法により、100nm〜1μm程度の膜厚で形成した。ニッケル膜3は、ニッケルの合金であってもよい。   Subsequently, after the resist 6a is removed and the back surface of the SiC substrate 1 is cleaned again, a nickel (Ni) film 3 is formed on the entire back surface of the SiC substrate 1 as shown in FIG. In the present embodiment, the nickel film 3 (first metal) serving as the back electrode is formed with a film thickness of about 100 nm to 1 μm by sputtering in an Ar atmosphere. The nickel film 3 may be a nickel alloy.

次に、オーミック特性を得るために、高温(600〜1100℃)での熱処理を行う。ここではランプアニール装置を用いて真空中で1000℃、1分間の高温加熱処理を行った。このとき開口部2aの部分(バリア膜2以外の部分)では、ニッケル膜3とSiC基板1とが接触しているため、図1(d)に示すように反応層4が形成される。反応層4は主に、ニッケルとSiC基板1に含まれる珪素とが反応してできたニッケルシリサイドである。   Next, in order to obtain ohmic characteristics, heat treatment is performed at a high temperature (600 to 1100 ° C.). Here, a high temperature heat treatment was performed at 1000 ° C. for 1 minute in a vacuum using a lamp annealing apparatus. At this time, since the nickel film 3 and the SiC substrate 1 are in contact with each other in the opening 2a (the part other than the barrier film 2), the reaction layer 4 is formed as shown in FIG. The reaction layer 4 is mainly nickel silicide formed by a reaction between nickel and silicon contained in the SiC substrate 1.

これらニッケル膜3および反応層4により、裏面電極11が構成される。SiC半導体装置の特徴は、裏面電極11が、SiC基板1との間でオーミック特性が得られる反応層4(ニッケルシリサイド)を備えていることである。つまりニッケル膜3とSiC基板1との間に反応層4が介在することにより、良好なオーミック特性が得られる。   These nickel film 3 and reaction layer 4 constitute a back electrode 11. The feature of the SiC semiconductor device is that the back electrode 11 includes a reaction layer 4 (nickel silicide) that can obtain ohmic characteristics with the SiC substrate 1. That is, good ohmic characteristics can be obtained when the reaction layer 4 is interposed between the nickel film 3 and the SiC substrate 1.

また上記の高温加熱処理の際、反応層4が形成される過程で、裏面電極11(反応層4およびニッケル膜3)の内部に、中間生成物5が発生する。中間生成物5はニッケルの炭化物(炭化ニッケル(NiC))や炭素粒子(グラファイト(C))など、炭素を主成分とする物質である。   In the process of forming the reaction layer 4 during the high-temperature heat treatment, an intermediate product 5 is generated inside the back electrode 11 (reaction layer 4 and nickel film 3). The intermediate product 5 is a substance whose main component is carbon, such as nickel carbide (nickel carbide (NiC)) or carbon particles (graphite (C)).

本実施の形態では、反応層4は、裏面電極11の全面でなく、バリア膜2の開口部2aおよびその近傍に選択的に形成される(バリア膜2が存する部分には、ニッケル膜3が合金化による浸食を受けずにそのまま残る)。従って、反応層4が形成される反応の過程で生じる中間生成物5も同様に、開口部2aの近傍にのみ発生する。   In the present embodiment, the reaction layer 4 is selectively formed not on the entire surface of the back electrode 11 but on the opening 2a of the barrier film 2 and the vicinity thereof (the nickel film 3 is formed in the portion where the barrier film 2 exists). It remains intact without being eroded by alloying). Accordingly, the intermediate product 5 generated in the process of forming the reaction layer 4 is also generated only in the vicinity of the opening 2a.

この構成によれば、開口部2aの近傍において、ニッケル膜3とSiC基板1との間に反応層4(ニッケルシリサイド)が形成されているため、裏面電極11の良好なオーミック特性が得られる。また、それ以外の領域では中間生成物5が生成されないため、裏面電極11は密着性および耐久性に優れたものとなる。つまり、オーミック特性と密着性および耐久性の両方に優れた裏面電極11が得られる。   According to this configuration, since the reaction layer 4 (nickel silicide) is formed between the nickel film 3 and the SiC substrate 1 in the vicinity of the opening 2a, good ohmic characteristics of the back electrode 11 can be obtained. Moreover, since the intermediate product 5 is not produced | generated in the area | region other than that, the back surface electrode 11 becomes the thing excellent in adhesiveness and durability. That is, the back electrode 11 excellent in both ohmic characteristics, adhesion and durability can be obtained.

なお本実施の形態では、バリア膜2として、窒化珪素(SiN)を用いたが、反応層4を形成するための高温(1000℃程度)の熱処理が行われても構造が安定し、ニッケル膜3を劣化させる酸化作用のない材料であれば、他のものを用いてもよい。その例としては、窒化ホウ素、窒化アルミニウム、窒化チタン、窒化タンタル、窒化ジルコニウム、窒化ハフニウム、窒化セリウム等の窒化物や、炭化アルミニウム、炭化チタン、炭化タンタル、炭化ジルコニウム、炭化ハフニウム、炭化セリウム等の炭化物などが挙げられる。   In this embodiment, silicon nitride (SiN) is used as the barrier film 2, but the structure is stable even when heat treatment at a high temperature (about 1000 ° C.) for forming the reaction layer 4 is performed, and the nickel film Other materials may be used as long as they do not have an oxidizing action that degrades 3. Examples include nitrides such as boron nitride, aluminum nitride, titanium nitride, tantalum nitride, zirconium nitride, hafnium nitride, cerium nitride, aluminum carbide, titanium carbide, tantalum carbide, zirconium carbide, hafnium carbide, cerium carbide, etc. Carbide etc. are mentioned.

またバリア膜2の膜厚が不足すると1000℃程度の加熱に耐えられないため、ある程度の厚さを確保することが好ましい。逆に、バリア膜2が厚過ぎると各プロセスに要する時間が長くなる問題が生じる。本実施の形態ではバリア膜2の膜厚は10nm〜200nm程度が好適であった。   In addition, if the thickness of the barrier film 2 is insufficient, it cannot withstand heating at about 1000 ° C., so it is preferable to secure a certain thickness. Conversely, if the barrier film 2 is too thick, there is a problem that the time required for each process becomes long. In the present embodiment, the thickness of the barrier film 2 is preferably about 10 nm to 200 nm.

<実施の形態2>
実施の形態2では、本発明に係る裏面電極11の他の形成手法を示す。図3は、本発明の実施の形態2に係るSiC半導体装置の製造方法を示す工程図である。
<Embodiment 2>
In the second embodiment, another method of forming the back electrode 11 according to the present invention will be described. FIG. 3 is a process diagram showing a method of manufacturing the SiC semiconductor device according to the second embodiment of the present invention.

まず実施の形態1と同様に、SiC基板1を用意し、当該SiC基板1の上面側に、通常の方法で所定の半導体デバイス構造(不図示)を形成し、前処理としてSiC基板1の裏面の洗浄化処理を行う。   First, similarly to the first embodiment, an SiC substrate 1 is prepared, a predetermined semiconductor device structure (not shown) is formed on the upper surface side of the SiC substrate 1 by a normal method, and the back surface of the SiC substrate 1 is preprocessed. The cleaning process is performed.

次に、SiC基板1の裏面上にリソグラフィー法により所定形状にパターニングしたレジスト6bを形成する。実施の形態1で用いたレジスト6bは、開口部2aの形成領域を除去した形状であったが、本実施の形態で用いるレジスト6bは逆に、開口部2aの形成領域以外を除去した形状にする。   Next, a resist 6b patterned in a predetermined shape is formed on the back surface of SiC substrate 1 by lithography. Although the resist 6b used in the first embodiment has a shape in which the formation region of the opening 2a is removed, the resist 6b used in the present embodiment has a shape in which the region other than the formation region of the opening 2a is removed. To do.

そして、SiC基板1の裏面全面にバリア膜2を形成する(図3(a))。本実施の形態でも、バリア膜2として100nm程度の窒化珪素(SiN)膜を用い、その形成は珪素(Si)ターゲットを窒素雰囲気中で放電させるスパッタリング法で行った。   Then, a barrier film 2 is formed on the entire back surface of the SiC substrate 1 (FIG. 3A). Also in this embodiment, a silicon nitride (SiN) film having a thickness of about 100 nm is used as the barrier film 2, and the formation is performed by a sputtering method in which a silicon (Si) target is discharged in a nitrogen atmosphere.

その後、レジスト6bを除去することで、レジスト6b上のバリア膜2の部分をリフトオフにより除去する。その結果、バリア膜2に開口部2aが形成される(図3(b))。そして再びSiC基板1の裏面の清浄化処理を行う。   Thereafter, by removing the resist 6b, the portion of the barrier film 2 on the resist 6b is removed by lift-off. As a result, an opening 2a is formed in the barrier film 2 (FIG. 3B). And the cleaning process of the back surface of SiC substrate 1 is performed again.

バリア膜2に形成する開口部2aの形状およびパターンは、実施の形態1と同様でよい。またレジスト6aの形成方法は、リソグラフィー法に限られず、例えばスクリーン印刷法やシール転写法などを用いてもよい。   The shape and pattern of the opening 2a formed in the barrier film 2 may be the same as in the first embodiment. The method for forming the resist 6a is not limited to the lithography method, and for example, a screen printing method or a seal transfer method may be used.

以下、実施の形態1と同様に、SiC基板1の裏面全面にニッケル膜3を形成し(図3(c))、高温加熱処理を行って反応層4を形成することで、裏面電極11を形成する(図3(d))。   Thereafter, similarly to the first embodiment, the nickel film 3 is formed on the entire back surface of the SiC substrate 1 (FIG. 3C), and the reaction layer 4 is formed by performing high-temperature heat treatment, whereby the back electrode 11 is formed. It forms (FIG.3 (d)).

以上の工程で形成された裏面電極11は、実施の形態1と同様の構造となる。つまり、オーミック特性と密着性および耐久性の両方に優れた裏面電極11が得られる。   The back electrode 11 formed by the above steps has a structure similar to that of the first embodiment. That is, the back electrode 11 excellent in both ohmic characteristics, adhesion and durability can be obtained.

本実施の形態においても、バリア膜2として窒化珪素(SiN)を用いたが、反応層4を形成するための高温(例えば1000℃程度)の熱処理が行われても構造が安定し、ニッケル膜3を劣化させる酸化作用のない材料であれば、他のものを用いてもよい。   Also in the present embodiment, silicon nitride (SiN) is used as the barrier film 2, but the structure is stable even when heat treatment at a high temperature (for example, about 1000 ° C.) for forming the reaction layer 4 is performed, and the nickel film Other materials may be used as long as they do not have an oxidizing action that degrades 3.

<実施の形態3>
図4は、実施の形態3に係るSiC半導体の構造を示す断面図である。実施の形態3の当該SiC半導体装置は、実施の形態1または2で作成したSiC半導体装置の裏面電極11に、これに接続させる配線や半田との接合用の電極として、さらに金属層7(第2金属)および保護膜8を設けたものである。
<Embodiment 3>
FIG. 4 is a cross-sectional view showing the structure of the SiC semiconductor according to the third embodiment. The SiC semiconductor device according to the third embodiment further includes a metal layer 7 (first electrode) as an electrode for joining to the back surface electrode 11 of the SiC semiconductor device produced in the first or second embodiment. 2 metal) and a protective film 8 are provided.

金属層7は、裏面電極11上に形成され、ここではニッケル(Ni)膜を用いた。金属層7は、厚過ぎると膜応力により剥離しやすいため、1500nm以下の厚さが望ましい。また、バリア膜2と開口部2aとの段差や、反応層4(ニッケルシリサイド)形状の凹凸の影響をなくして表面を平坦化するために、金属層7は500nm以上の厚さが望ましい。ここでは金属層7の厚さを700nmとした。金属層7の材料はニッケルの他、アルミニウム(Al)や銅(Cu)、およびこれらの合金を用いてもよい。   The metal layer 7 is formed on the back electrode 11, and a nickel (Ni) film is used here. If the metal layer 7 is too thick, the metal layer 7 is liable to be peeled off due to film stress. In addition, the metal layer 7 desirably has a thickness of 500 nm or more so as to flatten the surface without being affected by the step between the barrier film 2 and the opening 2a and the unevenness of the reaction layer 4 (nickel silicide) shape. Here, the thickness of the metal layer 7 was 700 nm. In addition to nickel, the metal layer 7 may be made of aluminum (Al), copper (Cu), or an alloy thereof.

保護膜8は、金属層7上に形成され、当該金属層7の酸化を防止する目的で設けられている。よってその材料は、金(Au)や銀(Ag)などの貴金属を用いることができる。ここでは厚さ100nmの金を用いた。   The protective film 8 is formed on the metal layer 7 and is provided for the purpose of preventing oxidation of the metal layer 7. Therefore, a noble metal such as gold (Au) or silver (Ag) can be used as the material. Here, gold having a thickness of 100 nm was used.

本発明者は、図4の構造のSiC半導体装置を用いて、裏面電極11の密着性の評価試験を行った。以下、この評価試験について説明する。   The inventor performed an adhesion evaluation test of the back electrode 11 using the SiC semiconductor device having the structure shown in FIG. Hereinafter, this evaluation test will be described.

図5は評価試験に用いられたサンプルの構成を示す図である。図5の如く、当該サンプルは、大きさが10mm角、厚さが1mmの銅片に、ニッケル(Ni)膜17および金(Au)膜18を順次スパッタ法で形成した固定用電極を備える。この固定用電極上に、4mm角程度の面積で塗布された金属接着剤15を介して、大きさ3mm角のSiC半導体装置23が固定されることで、サンプルが完成する。なお、SiC半導体装置23を固定電極に固定する際には、金属接着剤15を硬化させるために、200℃で2時間の加熱処理を行った。   FIG. 5 is a diagram showing a configuration of a sample used in the evaluation test. As shown in FIG. 5, the sample includes a fixing electrode in which a nickel (Ni) film 17 and a gold (Au) film 18 are sequentially formed on a copper piece having a size of 10 mm square and a thickness of 1 mm by a sputtering method. A 3 mm square SiC semiconductor device 23 is fixed on the fixing electrode via a metal adhesive 15 applied in an area of about 4 mm square to complete a sample. In addition, when fixing the SiC semiconductor device 23 to a fixed electrode, in order to harden the metal adhesive 15, the heat processing for 2 hours were performed at 200 degreeC.

まず第1の評価試験として、ダイシェアー強度試験機を用いて、裏面電極の密着性評価試験を行った。ダイシェアー強度試験とは、SiC半導体素子23に対し、横方向から剥ぎ取るように荷重ストレスを掛け、剥離が生じる荷重を測定する試験である。   First, as a first evaluation test, a back electrode adhesion test was performed using a die shear strength tester. The die shear strength test is a test in which a load stress is applied to the SiC semiconductor element 23 so as to be peeled off from the lateral direction, and a load at which peeling occurs is measured.

図6は、300℃で高温保存したサンプルのダイシェアー強度の測定結果であり、SiC半導体装置23として、従来のものを用いた場合と、本発明に係るものを用いた場合の測定結果を示している。具体的には、300℃大気中にて200時間〜1400時間保存した複数のサンプルのダイシェアー強度を測定した結果を、300℃加熱していないサンプルのダイシェアー強度で規格化して示している。   FIG. 6 is a measurement result of die shear strength of a sample stored at a high temperature at 300 ° C., and shows a measurement result when using a conventional SiC semiconductor device 23 and using a device according to the present invention. ing. Specifically, the results of measuring the die shear strength of a plurality of samples stored in the atmosphere at 300 ° C. for 200 hours to 1400 hours are shown normalized by the die shear strength of the samples not heated at 300 ° C.

従来のSiC半導体装置23では、高温保存時間が1000時間を越えるとダイシェアー強度が大きく低下したが、本発明のSiC半導体装置23では、1400時間までの間に大きな強度低下は観察されなかった。   In the conventional SiC semiconductor device 23, the die shear strength greatly decreased when the high-temperature storage time exceeded 1000 hours. However, in the SiC semiconductor device 23 of the present invention, no significant decrease in strength was observed until 1400 hours.

また第2の評価試験として、ヒートサイクル試験を行った。図7はその測定結果であり、−50℃から200℃の温度負荷を繰り返しかけて、ダイシェアー強度測定を測定した結果を、ヒートサイクル前のダイシェアー強度で規格化して示している。ここでもSiC半導体装置23として、従来のものを用いた場合と、本発明に係るものを用いた場合との比較を行ったが、特に、本発明に係るSiC半導体装置23では、0.5mm径の開口部2aを1つ設けた場合(図2(a))と、100μm径の開口部2aを複数配置した場合(図2(b))との比較も行った。   Moreover, the heat cycle test was done as a 2nd evaluation test. FIG. 7 shows the measurement results. The results of measuring the die shear strength by repeatedly applying a temperature load of −50 ° C. to 200 ° C. are shown normalized by the die shear strength before the heat cycle. Here again, a comparison was made between the case where the conventional SiC semiconductor device 23 was used and the case where the SiC semiconductor device 23 according to the present invention was used. In particular, the SiC semiconductor device 23 according to the present invention has a diameter of 0.5 mm. Comparison was also made between the case where one opening 2a was provided (FIG. 2A) and the case where a plurality of openings 2a having a diameter of 100 μm were arranged (FIG. 2B).

図7に示すように、従来のSiC半導体装置23を用いたサンプルでは、試験回数(ヒートサイクル)が500回程度で、ダイシェアー強度が大きく低下した。これに対し、本発明のSiC半導体装置23を用いたサンプルでは、開口部2aが1つの場合は、試験回数1000回程度までダイシェアー強度が維持され、開口部2aが複数の場合はさらにその寿命が延びた。   As shown in FIG. 7, in the sample using the conventional SiC semiconductor device 23, the number of tests (heat cycle) was about 500 times, and the die shear strength was greatly reduced. On the other hand, in the sample using the SiC semiconductor device 23 of the present invention, when there is one opening 2a, the die shear strength is maintained up to about 1000 times of the test, and when there are a plurality of openings 2a, the lifetime is further increased. Extended.

以上、第1および第2の評価試験から、本発明に係るSiC半導体装置では、裏面電極11の密着性および耐久性が、従来例に比べて飛躍的に向上することが確認できた。   As described above, from the first and second evaluation tests, it was confirmed that in the SiC semiconductor device according to the present invention, the adhesion and durability of the back electrode 11 are dramatically improved as compared with the conventional example.

1 SiC基板、2 バリア膜、2a 開口部、3 ニッケル膜、4 反応層、5 中間生成物、6a レジスト、6b レジスト、7 金属層、8 保護膜、11 裏面電極。   1 SiC substrate, 2 barrier film, 2a opening, 3 nickel film, 4 reaction layer, 5 intermediate product, 6a resist, 6b resist, 7 metal layer, 8 protective film, 11 back electrode.

Claims (13)

SiC基板と、
前記SiC基板の裏面に形成された第1金属の電極と、
前記SiC基板と前記電極との間の一部に介在するバリア膜とを備え、
前記SiC基板と前記電極との間における前記バリア膜以外の部分に、前記第1金属のシリサイドが形成されている
ことを特徴とする半導体装置。
A SiC substrate;
A first metal electrode formed on the back surface of the SiC substrate;
A barrier film interposed in a part between the SiC substrate and the electrode;
A semiconductor device, wherein a silicide of the first metal is formed in a portion other than the barrier film between the SiC substrate and the electrode.
前記バリア膜は、少なくとも1つの開口部を有する形状である
請求項1に記載の半導体装置。
The semiconductor device according to claim 1, wherein the barrier film has a shape having at least one opening.
前記第1金属は、ニッケルまたはその合金である
請求項1または請求項2に記載の半導体装置。
The semiconductor device according to claim 1, wherein the first metal is nickel or an alloy thereof.
前記電極上に、第2金属による金属層をさらに備える
請求項1から請求項3のいずれか1つに記載の半導体装置。
The semiconductor device according to claim 1, further comprising a metal layer made of a second metal on the electrode.
前記第2金属は、ニッケル、アルミニウム、銅およびこれらの合金のいずれかである
請求項4記載の半導体装置。
The semiconductor device according to claim 4, wherein the second metal is any one of nickel, aluminum, copper, and an alloy thereof.
前記バリア膜は、
窒化物または炭化物である
請求項1から請求項5のいずれか1つに記載の半導体装置。
The barrier film is
The semiconductor device according to claim 1, wherein the semiconductor device is a nitride or a carbide.
前記窒化物は、窒化珪素、窒化ホウ素、窒化アルミニウム、窒化チタン、窒化タンタル、窒化ジルコニウム、窒化ハフニウムおよび窒化セリウムのいずれかであり、
前記炭化物は、炭化アルミニウム、炭化チタン、炭化タンタル、炭化ジルコニウム、炭化ハフニウム、炭化セリウムのいずれかである
請求項6記載の半導体装置。
The nitride is any one of silicon nitride, boron nitride, aluminum nitride, titanium nitride, tantalum nitride, zirconium nitride, hafnium nitride and cerium nitride,
The semiconductor device according to claim 6, wherein the carbide is any one of aluminum carbide, titanium carbide, tantalum carbide, zirconium carbide, hafnium carbide, and cerium carbide.
前記バリア膜の厚さは、10nm以上200nm以下である
請求項1から請求項7のいずれか1つに記載の半導体装置。
The semiconductor device according to claim 1, wherein a thickness of the barrier film is 10 nm or more and 200 nm or less.
SiC基板の裏面の一部に選択的にバリア膜を形成する工程と、
前記バリア膜が形成された前記SiC基板の裏面に第1金属の電極を形成する工程と、
前記SiC基板を熱処理することで、前記第1金属と前記SiC基板とを反応させる工程とを備える
ことを特徴とする半導体装置の製造方法。
Selectively forming a barrier film on a part of the back surface of the SiC substrate;
Forming a first metal electrode on the back surface of the SiC substrate on which the barrier film is formed;
A method of manufacturing a semiconductor device, comprising: a step of reacting the first metal and the SiC substrate by heat-treating the SiC substrate.
前記第1金属は、ニッケルまたはその合金であり、
前記熱処理の温度は、600℃以上1100℃未満である
請求項9記載の半導体装置の製造方法。
The first metal is nickel or an alloy thereof;
The method for manufacturing a semiconductor device according to claim 9, wherein a temperature of the heat treatment is 600 ° C. or higher and lower than 1100 ° C.
前記バリア膜は、1つ以上の開口部を有する形状に形成される
請求項9または請求項10記載の半導体装置の製造方法。
The method for manufacturing a semiconductor device according to claim 9, wherein the barrier film is formed in a shape having one or more openings.
前記バリア膜を形成する工程は、
前記SiC基板の裏面全面にバリア膜を形成する工程と、
当該バリア膜の一部をエッチングにより選択的に除去する工程とを含む
請求項9から請求項11のいずれか1つに記載の半導体装置の製造方法。
The step of forming the barrier film includes
Forming a barrier film on the entire back surface of the SiC substrate;
The method for manufacturing a semiconductor device according to claim 9, further comprising a step of selectively removing a part of the barrier film by etching.
前記バリア膜を形成する工程は、
レジストを前記SiC基板の裏面の一部に選択的に形成する工程と、
前記レジストマスクが形成された前記SiC基板の裏面全面にバリア膜を形成する工程と、
前記レジストマスクとその上に形成された当該バリア膜を除去する工程とを含む
請求項9から請求項11のいずれか1つに記載の半導体装置の製造方法。
The step of forming the barrier film includes
Selectively forming a resist on a part of the back surface of the SiC substrate;
Forming a barrier film on the entire back surface of the SiC substrate on which the resist mask is formed;
The method for manufacturing a semiconductor device according to claim 9, further comprising a step of removing the resist mask and the barrier film formed thereon.
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