JP2020053587A - Multilayer substrate and component mounting substrate, and manufacturing method thereof - Google Patents

Abstract

To provide a multilayer substrate and a component mounting substrate excellent in connection reliability, and to provide a manufacturing method thereof.SOLUTION: A multilayer substrate 100 includes an insulation substrate 15 with circuit pattern having an insulation substrate 4 and a surface circuit pattern 2 and a backside circuit pattern 3 provided on the surface and the backside of the insulation substrate 4, and conductive paste 6 filling a through hole 1, and electrically connected with the surface circuit pattern 2 and the backside circuit pattern 3, has an exposure part 20 where the insulation substrate 4 is exposed around the through hole 1, in at least one of the surface and the backside of the insulation substrate 4, where the exposure part 20 has multiple extension parts extending in the peripheral direction of the through hole 1, in the plan view, and at least a part of the exposure part 20 is coated with the conductive paste 6.SELECTED DRAWING: Figure 1B

Description

  The present disclosure relates to a multilayer board and a component mounting board, and a method for manufacturing the same.

  The interlayer connection portion of the multilayer board needs to have connection reliability that can withstand heat treatment in a component mounting process and thermal shock in a soldering operation. For example, in Patent Literature 1, a circuit board and a method of manufacturing a circuit board having improved connection reliability by changing the inner diameter of both end openings of a through hole penetrating an insulating substrate and having a small diameter portion in the through hole. Is disclosed.

JP-A-2-33996

  However, there is room for further improvement in connection reliability in the technology of the above-mentioned patent document.

  It is an object of embodiments of the present disclosure to provide a multilayer board and a component mounting board having excellent connection reliability, and a method for manufacturing the same.

  A multilayer substrate according to an embodiment of the present disclosure has an insulating substrate and a circuit pattern provided on the front surface and the back surface of the insulating substrate, an insulating substrate with a circuit pattern having a through hole formed therein, and the through hole is filled. A conductive paste electrically connected to the circuit pattern, and at least one of a front surface and a back surface of the insulating substrate has an exposed portion where the insulating substrate is exposed around the through hole. The exposed portion has a plurality of extending portions extending in the outer peripheral direction of the through hole in plan view, and at least a part of the exposed portion is covered with the conductive paste.

  A component mounting board according to an embodiment of the present disclosure is obtained by mounting components on the multilayer board described above.

  A method for manufacturing a multilayer substrate according to an embodiment of the present disclosure includes an insulating substrate and a circuit pattern provided on the front surface and the back surface of the insulating substrate, and a step of preparing an insulating substrate with a circuit pattern in which a through hole is formed. Filling the through-hole with a conductive paste, the step of preparing the insulating substrate with a circuit pattern, at least one of the front surface and the back surface of the insulating substrate, around the through-hole, Forming an exposed portion having a plurality of extended portions extending in an outer peripheral direction of the through hole, wherein the insulating substrate is exposed, and filling the conductive paste with at least a part of the exposed portion; Cover with paste.

  A method of manufacturing a component mounting board according to an embodiment of the present disclosure includes a step of forming a resist on the front and back surfaces of a multilayer board manufactured by the method of manufacturing a multilayer board described above, and a step of forming a component on the multilayer board formed with the resist. And mounting.

  The multilayer board and the component mounting board of the embodiment according to the present disclosure, and their manufacturing methods have high connection reliability.

It is a top view showing typically composition of a multilayer substrate concerning an embodiment. FIG. 1B is a cross-sectional view schematically illustrating a configuration of the multilayer substrate according to the embodiment, illustrating a cross-section corresponding to line IB-IB in FIG. 1A. FIG. 4 is a plan view schematically showing an exposed portion and a formation position of a conductive paste in the multilayer substrate according to the embodiment. FIG. 3 is a perspective view schematically showing an exposed portion and a formation position of a conductive paste in the multilayer substrate according to the embodiment. FIG. 9 is a plan view illustrating a positional shift of a mask when printing a conductive paste on a conventional multilayer substrate. FIG. 5 is a plan view illustrating a positional shift of a mask when printing a conductive paste in the multilayer substrate according to the embodiment. 4 is a flowchart of a method for manufacturing a multilayer substrate according to an embodiment. FIG. 4 is a cross-sectional view showing a state before a circuit pattern is formed in the method for manufacturing a multilayer substrate according to the embodiment. FIG. 4 is a cross-sectional view illustrating a step of forming a circuit pattern in the method for manufacturing a multilayer substrate according to the embodiment. FIG. 6 is a cross-sectional view illustrating a step of forming a through hole in the method for manufacturing a multilayer substrate according to the embodiment. It is sectional drawing which shows the process of filling a conductive paste in the manufacturing method of the multilayer board which concerns on embodiment, and fills a through-hole with a conductive paste, and shows the process of covering an exposed part with a conductive paste. It is. FIG. 4 is a cross-sectional view illustrating a step of filling a conductive paste in the method for manufacturing a multilayer substrate according to the embodiment, and is a cross-sectional view illustrating a step of performing heat and pressure treatment on the conductive paste. It is sectional drawing which shows the process of grinding | polishing a conductive paste in the manufacturing method of the multilayer substrate which concerns on embodiment. FIG. 4 is a plan view schematically showing an exposed portion before forming a through hole in the multilayer substrate according to the embodiment. FIG. 3 is a plan view schematically showing an exposed portion after forming a through hole in the multilayer substrate according to the embodiment. FIG. 4 is a plan view schematically showing an exposed portion and a formation position of a conductive paste in the multilayer substrate according to the embodiment. It is a sectional view showing typically composition of a component mounting board concerning an embodiment. FIG. 4 is a cross-sectional view showing the multilayer board before forming a resist in the method for manufacturing a component mounting board according to the embodiment. FIG. 5 is a cross-sectional view illustrating a step of forming a resist in the method of manufacturing the component mounting board according to the embodiment, and is a cross-sectional view illustrating a step of forming a resist on a surface of a multilayer substrate. FIG. 5 is a cross-sectional view illustrating a step of forming a resist in the method of manufacturing the component mounting board according to the embodiment, and is a cross-sectional view illustrating a step of forming a resist on the back surface of the multilayer substrate. FIG. 4 is a cross-sectional view illustrating a step of mounting components in the method of manufacturing the component mounting board according to the embodiment, and is a cross-sectional view illustrating a step of forming an adhesive layer. FIG. 7 is a cross-sectional view illustrating a step of mounting components in the method of manufacturing the component mounting board according to the embodiment, and is a cross-sectional view illustrating a state after the components are mounted. It is an image which shows the board | substrate for interlayer connection part evaluation before filling a conductive paste used in the Example. It is an image which expands and shows a part of FIG. 8A. It is a perspective view which shows typically the connection state of the interlayer connection part in the board for interlayer connection part evaluation after filling with the conductive paste used in the Example. It is a graph showing the connection resistance value and the resistance value variation in the interlayer connection portion evaluation substrate after filling the conductive paste used in the examples, the exposed portion shape is annular and cross-shaped 4 is a graph when the paste print mask alignment is appropriate. It is a graph showing the connection resistance value and the resistance value variation in the interlayer connection portion evaluation substrate after filling the conductive paste used in the examples, the exposed portion shape is annular and cross-shaped 7 is a graph when the paste print mask position is shifted. FIG. 10 is a plan view schematically showing an exposed portion before forming a through hole in a multilayer substrate according to another embodiment. It is a top view which shows typically the exposure part after forming the through-hole in the multilayer substrate which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. FIG. 10 is a plan view schematically showing an exposed portion before forming a through hole in a multilayer substrate according to another embodiment. It is a top view which shows typically the exposure part after forming the through-hole in the multilayer substrate which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. FIG. 10 is a plan view schematically showing an exposed portion before forming a through hole in a multilayer substrate according to another embodiment. It is a top view which shows typically the exposure part after forming the through-hole in the multilayer substrate which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. FIG. 10 is a plan view schematically showing an exposed portion before forming a through hole in a multilayer substrate according to another embodiment. It is a top view which shows typically the exposure part after forming the through-hole in the multilayer substrate which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. FIG. 10 is a plan view schematically showing an exposed portion before forming a through hole in a multilayer substrate according to another embodiment. It is a top view which shows typically the exposure part after forming the through-hole in the multilayer substrate which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. FIG. 10 is a plan view schematically showing an exposed portion before forming a through hole in a multilayer substrate according to another embodiment. It is a top view which shows typically the exposure part after forming the through-hole in the multilayer substrate which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. FIG. 10 is a plan view schematically showing an exposed portion before forming a through hole in a multilayer substrate according to another embodiment. It is a top view which shows typically the exposure part after forming the through-hole in the multilayer substrate which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. FIG. 10 is a plan view schematically showing an exposed portion before forming a through hole in a multilayer substrate according to another embodiment. It is a top view which shows typically the exposure part after forming the through-hole in the multilayer substrate which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. FIG. 10 is a plan view schematically showing an exposed portion before forming a through hole in a multilayer substrate according to another embodiment. It is a top view which shows typically the exposure part after forming the through-hole in the multilayer substrate which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. FIG. 10 is a plan view schematically showing an exposed portion before forming a through hole in a multilayer substrate according to another embodiment. It is a top view which shows typically the exposure part after forming the through-hole in the multilayer substrate which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. FIG. 10 is a plan view schematically showing an exposed portion before forming a through hole in a multilayer substrate according to another embodiment. It is a top view which shows typically the exposure part after forming the through-hole in the multilayer substrate which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. It is a top view which shows typically the formation part of the exposure part and the conductive paste in the multilayer board which concerns on other embodiment. It is sectional drawing which shows typically the structure of the component mounting board which concerns on other embodiment. It is sectional drawing which shows typically the structure of the component mounting board which concerns on other embodiment.

<Embodiment>
Embodiments will be described below with reference to the drawings. However, the embodiments described below exemplify a multilayer board and a component mounting board for embodying the technical idea of the present embodiment, and a manufacturing method thereof, and are not limited to the following. Further, the dimensions, materials, shapes, relative arrangements, and the like of the components described in the embodiments are not intended to limit the scope of the present invention thereto, unless otherwise specified, and are merely examples. It's just In addition, the size, the positional relationship, and the like of the members illustrated in each drawing may be exaggerated for clarity of description.

[Multilayer substrate]
First, the multilayer substrate according to the present embodiment will be described.
FIG. 1A is a plan view schematically showing the configuration of the multilayer substrate according to the embodiment. FIG. 1B is a cross-sectional view schematically showing the configuration of the multilayer substrate according to the embodiment, and shows a cross-section corresponding to line IB-IB in FIG. 1A. FIG. 1C is a plan view schematically showing the positions where the exposed portions and the conductive paste are formed in the multilayer substrate according to the embodiment. FIG. 1D is a perspective view schematically illustrating a formation position of an exposed portion and a conductive paste in the multilayer substrate according to the embodiment. FIG. 2A is a plan view illustrating a positional shift of a mask when printing a conductive paste on a conventional multilayer substrate. FIG. 2B is a plan view illustrating a positional shift of a mask when printing a conductive paste on the multilayer substrate according to the embodiment. 1C, 1D, 2A, and 2B, for convenience, only the outer edge of the conductive paste 6 is described.

The multilayer substrate 100 includes an insulating substrate 15 with a circuit pattern and a conductive paste 6.
The insulating substrate with a circuit pattern 15 has the insulating substrate 4, the front surface circuit pattern 2 provided on the surface of the insulating substrate 4, and the back surface circuit pattern 3 provided on the back surface of the insulating substrate 4, and penetrates the insulating substrate 4. Through hole 1 in which conductive paste 6 is provided.

The insulating substrate 4 has on its surface an exposed portion 20 where the insulating substrate 4 is exposed around the through hole 1. The insulating substrate 4 has an exposed portion 20 on the back surface where the insulating substrate 4 is exposed around the through hole 1. The exposed portion 20 is a part of the front surface circuit pattern 2 and the back surface circuit pattern 3.
The exposed part 20 has an exposed base part 20a formed on the outer periphery of the through hole 1 and a plurality of extending parts 20b extending in the outer peripheral direction of the through hole 1 in plan view.
The exposed base portion 20a is formed on the periphery of the through hole 1 in an annular shape that is recessed from the circuit surface.
The extension portion 20b is formed intermittently in the circumferential direction of the exposed base portion 20a, and is formed to be rectangularly concave in plan view. Here, the rectangular shape includes a shape in which a portion connected to the exposed base 20a is curved along the shape of the exposed base 20a. If the extending portion 20b is rectangular in plan view, the exposed portion 20 can be easily formed due to its simple shape.

The extending portion 20b is provided at a position facing the center of the through hole 1 in a plan view, and a plurality of the extending portions 20b are arranged radially at equal intervals around the through hole 1, here, the periphery of the exposed base portion 20a in a plan view. (Eight in the figure). Thereby, the exposed part 20 is formed in a gear shape in a plan view.
Since the extension portion 20b is provided at a position facing the center of the through hole 1, the electrical connection between the conductive paste 6 and the surface circuit pattern 2 and the connection between the conductive paste 6 and the The resin bonding with the insulating substrate 4 becomes more uniform around the through hole 1. Further, since the extending portions 20b are provided at equal intervals on the peripheral edge of the through hole 1, the above-described electrical connection and resin bonding become more uniform around the through hole 1.
It is sufficient that at least two extension portions 20b are provided for one through hole 1, and it is preferable that four or more extension portions 20b are provided. By providing four or more extending portions 20b, the above-described electrical connection and resin bonding are further improved.
The size of the exposed portion 20 is appropriately adjusted according to the size of the through hole 1 and the like, but the minimum length from the outer edge of the through hole 1 to the tip of the extension portion 20b is preferably 10 μm to 200 μm.

As the insulating substrate 4, one or a plurality of glass cloths are impregnated with a thermosetting insulating resin such as an epoxy resin, and the thermosetting insulating resin is cured, such as glass epoxy, film-like polyimide, and liquid crystal polymer. And the like. The insulating substrate 4 is generally manufactured as a double-sided copper-clad laminate having copper foils attached to both sides.
When the insulating substrate 4 is made of glass epoxy, the thickness can be set to 50 μm to 1000 μm. When the insulating substrate 4 is made of polyimide, the thickness can be set to 12 μm to 50 μm. As described above, the insulating substrate 4 can be used from a plate having a certain thickness to a thin plate.

  The surface circuit pattern 2 is formed on the surface of the insulating substrate 4. The back surface circuit pattern 3 is formed on the back surface of the insulating substrate 4. The front surface circuit pattern 2 and the back surface circuit pattern 3 are formed so as to be wired in a desired shape. The front circuit pattern 2 and the back circuit pattern 3 are made of a metallic material such as copper.

  The thickness of the front surface circuit pattern 2 and the rear surface circuit pattern 3 is preferably 12 μm to 70 μm. When the thickness of the front surface circuit pattern 2 and the rear surface circuit pattern 3 is 12 μm or more, the front surface circuit pattern 2 and the rear surface circuit pattern 3 can be easily formed. On the other hand, if the thickness is 70 μm or less, the thickness of the multilayer substrate 100 can be reduced.

  The through hole 1 is formed so as to penetrate the insulating substrate 4. The diameter of the through hole 1 is, for example, 0.05 mm to 0.3 mm. The through hole 1 has an exposed part 20 around the opening. The exposed portion 20 has an exposed base 20a formed in an annular shape at the periphery of the through hole 1 and has an extended portion 20b formed at the periphery of the exposed base 20a. That is, the through hole 1 is formed inside the exposed base 20a so as to penetrate the central portion of the exposed portion 20 so that the exposed base 20a is formed on the periphery of the through hole 1. Since the through hole 1 is formed inside the exposed base portion 20a, the surface circuit pattern 2 is not punched at the time of drilling, so that generation of burrs can be eliminated.

The conductive paste 6 fills the through holes 1 and the exposed portions 20, and is electrically connected to the front surface circuit pattern 2 and the back surface circuit pattern 3. The conductive paste 6 is a part that electrically connects the front surface circuit pattern 2 and the back surface circuit pattern 3. The conductive paste 6 filled in the through hole 1 and the exposed part 20 becomes an interlayer connection part. The conductive paste 6 is formed by filling the through hole 1, the exposed portion 20, and the periphery of the exposed portion 20, and curing the conductive paste 6 in a state of being sufficiently in contact with the surface circuit pattern 2. Here, the periphery of the exposed portion 20 is in the vicinity of the exposed portion 20, for example, within 0.5 mm, preferably within 0.1 mm, more preferably within 0.05 mm from the tip of the extension portion 20b.
Since the interlayer connection portion is formed by filling the through-hole 1 with the conductive paste 6, the connection reliability against a thermal shock in the process of mounting components and the like is improved.

The conductive paste 6 is formed in a convex shape on the surface of the insulating substrate 4. The conductive paste 6 covers the entire exposed portion 20 and also covers a part of the front surface circuit pattern 2 and the back surface circuit pattern 3. In the present embodiment, the interlayer connection portion formed of the conductive paste 6 includes a portion that covers the front surface circuit pattern 2 and the back surface circuit pattern 3.
That is, the conductive paste 6 (interlayer connection portion) has the filling portion 6a filled in the through hole 1 and the exposed portion 20, and the protrusion 6b protruding from the upper surface of the surface circuit pattern 2. . The position of the upper surface of the surface circuit pattern 2 refers to the position of the upper surface of the surface circuit pattern 2 where the surface circuit pattern 2 on the through hole 1 and the exposed portion 20 is not formed, in addition to the upper surface of the surface circuit pattern 2. Including.

As the conductive paste 6, for example, a mixture of a flake-like, flake-like or bark-like filler such as silver powder or copper powder and a thermosetting binder resin can be used.
It is preferable that the conductive paste 6 has as small a volume resistivity as possible and a small content of the binder resin and the solvent component.
As the conductive paste 6, for example, a paste having a volume resistivity of 2 × 10 ⁻⁵ Ω · cm to 1.5 × 10 ⁻⁴ Ω · cm and a binder resin content of 3% by mass to 10% by mass can be used. preferable. With such a conductive paste 6, the resistance value of the interlayer connection portion becomes smaller, and the variation of the resistance value becomes smaller. The volume resistivity is more preferably about 7.5 Ω · cm × 10 ⁻⁵ Ω · cm, and the binder resin content is more preferably 6% by mass to 7% by mass. Further, as the conductive paste 6, for example, it is preferable to use one having a solvent content of 0% by mass to 1% by mass.

  The conductive paste 6 preferably has a small heat shrinkage during curing. Specifically, it is preferable that the mass reduction rate during curing is 1% or less. With such a conductive paste 6, it is easier to control the flatness of the protruding portion 6b which will be the surface of the conductive paste 6 described later.

The portion of the conductive paste 6 on the surface of the insulating substrate 4 is formed flat. That is, the upper surface of the convex portion (projection 6b) on the surface of conductive paste 6 is formed flat. By flattening the protruding portion 6b serving as the surface of the conductive paste 6, it is easy to mount components on the interlayer connection portion.
Here, “flat” means that the thickness difference between the thinnest portion and the thickest portion of the protruding portion 6b is 20 μm or less, preferably 10 μm or less, and more preferably 5 μm or less.

The thickness of the flat portion of the conductive paste 6 on the surface of the insulating substrate 4, that is, the thickness of the protruding portion 6b serving as the surface of the insulating substrate 4 is preferably 10 μm to 30 μm. When the thickness of the protruding portion 6b is 10 μm or more, it becomes easy to form an interlayer connection portion. On the other hand, when the thickness of the protruding portion 6b is 30 μm or less, the thickness of the multilayer substrate 100 can be reduced. The thickness of the protrusion 6b on the surface of the insulating substrate 4 is the thickness from the upper surface of the surface circuit pattern 2 to the upper surface of the protrusion 6b on the surface of the insulating substrate 4.
The thickness of the protrusion 6b can be controlled by the amount of the conductive paste when filling the through hole 1. Further, it can be controlled by the pressure when the conductive paste 6 is subjected to the pressure treatment. Further, it can be controlled by polishing the protruding portion 6b.

As described above, in the present embodiment, the exposed portion 20 having a predetermined shape is formed on the multilayer substrate 100.
The interlayer connection portion of the multilayer board 100 needs to have connection reliability that can withstand heat treatment in a process of mounting components and thermal shock in a soldering operation. In a conventional multilayer substrate, through-hole connection by plating is often used. However, in such a multilayer substrate, cracks occur at the corners of the through holes due to the stress generated by the difference between the coefficient of thermal expansion of the substrate and the coefficient of thermal expansion of the plating in the thickness direction of the substrate, thereby reducing the connection reliability. Therefore, for example, as described in Patent Literature 1 described in the Background Art, a connection method of filling a through-hole with a conductive paste has been proposed with respect to a through-hole connection by plating.

  In the above-mentioned Patent Document 1, a conductive paste is buried in a through-hole structure in which the front and rear holes have different hole diameters and a swelling portion is provided inside the hole to improve the flowability of the paste. I have. However, when the mask is misaligned during the printing of the conductive paste, metal bonding does not occur on the semicircular portion of the conductive paste, and there is a concern that the bonding state is unbalanced and connection reliability is reduced (FIG. 2A). reference).

In the present embodiment, since the multilayer substrate 100 has the exposed portion 20 having a predetermined shape, a step is formed between the insulating substrate 4 around the through hole 1 and the surface circuit pattern 2 (see FIG. 1B). Thereby, the contact area between the conductive paste 6 and the insulating substrate 4 is increased as compared with a multilayer substrate having no exposed portion 20. In addition, since the conductor exposed portion of the surface circuit pattern 2 and the resin exposed portion of the insulating substrate 4 coexist, the electrical connection at the portion where the conductive paste 6 and the surface circuit pattern 2 are in contact with each other, and the conductive paste Resin bonding at a portion where the 6 and the exposed portion 20 come into contact occurs evenly. Therefore, the resistance value of the interlayer connection is low and stable, and the connection reliability against thermal shock is improved. The electrical connection is a connection between the metal particles in the conductive paste 6 and the surface circuit pattern 2, and the resin bonding is a bonding between the binder resin in the conductive paste 6 and the resin of the insulating substrate 4.
Further, even if the mask is misaligned during printing of the conductive paste, the semicircular portion of the conductive paste 6 comes into contact with the surface circuit pattern 2 and metal bonding occurs. Thereby, the resistance value of the interlayer connection portion is low and stable, and the connection reliability against thermal shock is improved (see FIG. 2B).

[Manufacturing method of multilayer substrate]
Next, an example of a method for manufacturing a multilayer substrate according to the present embodiment will be described.
FIG. 3 is a flowchart of the method for manufacturing a multilayer substrate according to the embodiment. FIG. 4A is a cross-sectional view showing a state before a circuit pattern is formed in the method for manufacturing a multilayer substrate according to the embodiment. FIG. 4B is a cross-sectional view illustrating a step of forming a circuit pattern in the method for manufacturing a multilayer substrate according to the embodiment. FIG. 4C is a cross-sectional view illustrating a step of forming a through hole in the method for manufacturing a multilayer substrate according to the embodiment. FIG. 4D is a cross-sectional view illustrating a step of filling the conductive paste in the method of manufacturing the multilayer substrate according to the embodiment, in which the through holes are filled with the conductive paste and the exposed portions are covered with the conductive paste. FIG. FIG. 4E is a cross-sectional view illustrating a step of filling the conductive paste in the method for manufacturing a multilayer substrate according to the embodiment, and is a cross-sectional view illustrating the step of heating and pressing the conductive paste. FIG. 4F is a cross-sectional view illustrating a step of polishing the conductive paste in the method for manufacturing a multilayer substrate according to the embodiment. FIG. 5A is a plan view schematically showing an exposed portion before forming a through hole in the multilayer substrate according to the embodiment. FIG. 5B is a plan view schematically showing an exposed portion after forming a through hole in the multilayer substrate according to the embodiment. FIG. 5C is a plan view schematically illustrating the formation positions of the exposed portions and the conductive paste on the multilayer substrate according to the embodiment. In FIG. 5C, only the outer edge of the conductive paste 6 is shown for convenience.

  The method for manufacturing a multilayer substrate according to the present embodiment includes a step S101 of preparing an insulating substrate with a circuit pattern, a step S102 of filling a conductive paste, and a step S103 of polishing the conductive paste as needed. Perform in this order. The material and arrangement of each member are the same as those described in the description of the multilayer substrate 100, and thus description thereof will be omitted as appropriate.

(Step of preparing an insulating substrate with a circuit pattern)
The step S101 of preparing an insulating substrate with a circuit pattern includes an insulating substrate 4, a front surface circuit pattern 2 provided on the surface of the insulating substrate 4, and a back surface circuit pattern 3 provided on the back surface of the insulating substrate 4. This is a step of preparing an insulating substrate 15 with a circuit pattern on which the substrate 1 is formed.
In this step S101, on the front and back surfaces of the insulating substrate 4, the exposed portion 20 having the plurality of extending portions 20b that expose the insulating substrate 4 around the through hole 1 and extend in the outer peripheral direction of the through hole 1 is formed. I do. In this step S101, first, an exposed portion 20 having an exposed base portion 20a and an extended portion 20b is formed on the front and back surfaces of the insulating substrate 4 (see FIG. 5A). In addition to the exposed portion 20, the portion where the through-hole 1 is formed and the portion where the insulating substrate 4 is exposed around the portion where the through-hole 1 is formed before forming the through-hole 1 are also exposed portions, in addition to those that are present around the through-hole 1. It is assumed to be 20. Before the through-hole 1 is formed, the central portion in plan view is an exposed base portion 20a, and a portion provided on the periphery of the exposed base portion 20a is an extended portion 20b.

In this step S101, for example, first, one or a plurality of sheet-like glass cloths are impregnated with an epoxy resin, and the front surface copper foil 2a is bonded to the front surface and the rear surface copper foil 3a is bonded to the back surface to cure the epoxy resin. A commercially available double-sided copper-clad laminate is prepared. Next, the front surface copper foil 2a and the back surface copper foil 3a are etched to form the front surface circuit pattern 2, the back surface circuit pattern 3, and the exposed portion 20 (process of forming a circuit pattern).
Instead of using a commercially available double-sided copper-clad laminate, the front surface copper foil 2a may be joined to the surface of the insulating substrate 4 and the back surface copper foil 3a may be joined to the back surface. Alternatively, a double-sided copper-clad laminate on which the front surface circuit pattern 2, the rear surface circuit pattern 3, and the exposed portion 20 are formed may be purchased in advance.

  Next, a through hole 1 that penetrates the insulating substrate 4 is formed at a portion where the exposed portion 20 is formed (a step of forming a through hole). In the step of forming the through-hole, the through-hole 1 is formed by drilling or punching using the tool 14 so that the through-hole 1 is formed inside the exposed base 20a from the surface side of the insulating substrate 4. (See FIG. 5B).

(Step of filling conductive paste)
Step S102 of filling the conductive paste is a step of filling the through-hole 1 with the conductive paste 6.
In this step S102, the conductive paste 6 is filled into the through holes 1, and the exposed portions 20 are covered with the conductive paste 6. The surface circuit pattern 2 around the exposed portion 20 is also covered with the conductive paste 6 (see FIG. 5C). In step S102, the conductive paste 6 protruding from the position of the upper surface of the surface circuit pattern 2 in the vicinity of the through hole 1 is subjected to pressure treatment. The vicinity of the through hole 1 is, for example, a portion around the through hole 1 where the conductive paste 6 exists on the insulating substrate 4 and on the surface circuit pattern 2.

  In this step S102, first, the conductive paste 6c is filled into the through holes 1 and the exposed portions 20 from the surface of the insulating substrate 4 via the mask 11 by screen printing. Screen printing conditions are, for example, a metal mask (mask 11) having a clearance of 0 mm to 2 mm, a thickness of 20 μm to 300 μm, an opening hole diameter of 0.2 mm to 0.5 mm, or a 150 mesh to 400 mesh, and an emulsion thickness of 10 μm to 20 μm. Using a screen mask (mask 11) and a urethane rubber squeegee 40 having a hardness of 70 to 80, an effective squeegee angle of 15 to 30 degrees, a printing pressure of 0.1 MPa to 0.4 MPa, and a squeegee speed of 10 mm / sec to 100 mm / sec, reciprocating squeegee printing can be performed. The reciprocating printing makes it easier to fill the through-hole 1 and the exposed portion 20 with the conductive paste 6c. In the case where the thickness of the insulating substrate 4 is small or the through hole 1 is large, the conductive paste 6c is filled in the through hole 1 and the exposed portion 20 even in one-way printing of a squeegee. In this step S102, a filling portion 6a filled in the through hole 1 and the exposed portion 20 and a projecting portion 6b projecting from a position on the upper surface of the surface circuit pattern 2 are formed.

  Thereafter, the protruding portion 6b is formed at a constant temperature of, for example, 80 ° C. to 250 ° C. and 0.1 MPa by using a heat laminator device in which a resin or metal roll 50 and a separator 51 such as paper are installed above and below. The heating and pressurizing treatment is performed at a pressure of ０．４0.4 MPa and a speed of 5 mm / sec to 50 mm / sec. Thereby, the adhesion between the conductive paste 6c and the front surface circuit pattern 2 and the back surface circuit pattern 3 and the adhesion between the conductive paste 6c and the exposed portion 20 are improved, and the interlayer connection portion including the exposed portion 20 is improved. In addition, the generation of voids and bubbles is prevented.

  Thereafter, the conductive paste 6c is heated and cured at a constant temperature of 180C to 260C for 5 minutes to 90 minutes. As a result, an interlayer connecting portion for electrically connecting the front surface circuit pattern 2 and the back surface circuit pattern 3 is formed. 4D and 4E, for convenience, the conductive paste 6 is illustrated as a state after the conductive paste 6c is cured.

  In the present embodiment, the portion of the projecting portion 6b of the conductive paste 6 on the surface of the insulating substrate 4 is flattened by the step of filling the conductive paste and the step of performing the heating and pressurizing treatment using the heat laminator device. be able to.

(Step of polishing conductive paste)
The step S103 of polishing the conductive paste is a step of flatly polishing the conductive paste 6 protruding from the upper surface of the surface circuit pattern 2. That is, this step S103 is a step of polishing the upper surface of the protruding portion 6b so that the upper surface of the protruding portion 6b on the surface of the conductive paste 6 becomes flatter, and is appropriately performed as necessary. .

  If necessary, the conductive paste 6 may be polished before the surface resist 7 is formed by printing, depending on the relationship between the electrode shape and thickness of the mounted component 10 and the thickness of the surface resist 7. In that case, physical polishing with the ceramic buff 30 is preferable. By performing the polishing treatment of the conductive paste 6, the portion of the protruding portion 6b of the conductive paste 6 can be further flattened. Step S103 of polishing the conductive paste may not be performed as an essential step.

[Component mounting board]
Next, the component mounting board according to the present embodiment will be described.
FIG. 6 is a cross-sectional view schematically illustrating the configuration of the component mounting board according to the embodiment.

  The component mounting board 101 includes a multilayer substrate 100, a front surface resist 7 provided in a partial area on the surface of the multilayer substrate 100, a back surface resist 8 provided on the back surface of the multilayer substrate 100, And a mounting component 10 provided on the conductive paste 6 via an adhesive layer 9 which is a solder paste.

  The surface resist 7 is formed around the mounted component 10. That is, the surface resist 7 is provided on the surface circuit pattern 2 excluding the conductive paste 6 and its vicinity. The back surface resist 8 is formed so as to cover the back surface circuit pattern 3 and the conductive paste 6.

  As the front surface resist 7 and the back surface resist 8, for example, a general resin obtained by mixing a solvent or an antifoaming agent with a copolymer resin such as epoxy, or a white resin obtained by adding a filler such as titanium oxide may be used. it can. In addition, the front surface resist 7 and the back surface resist 8 become an insulating layer. The thickness of the front surface resist 7 and the back surface resist 8 is, for example, 10 μm to 30 μm. The thickness of the surface resist 7 is preferably equal to or greater than the thickness of the protrusion 6b. This is because the height of the adhesive layer 9 can be suppressed by making the thickness of the protrusion 6b smaller than the thickness of the surface resist 7, and the height of the mounted component 10 can be reduced. The thickness of the protrusion 6b is preferably, for example, about 0.5 to 0.9 times, more preferably about 0.6 to 0.8 times the thickness of the surface resist 7. By setting the thickness of the protruding portion 6b to 0.5 times or more, the thickness of the conductive paste 6 can be suppressed, and by setting the thickness to 0.9 times or less, high electrical conductivity can be maintained. The thickness of the front surface resist 7 and the back surface resist 8 may be the same or may be different.

  As a material of the adhesive layer 9, for example, Sn-Ag-Cu, Au, Ag, Cu, Sn, Bi, or an alloy thereof can be used. Examples of the mounted component 10 include an LED, a chip resistor, and a capacitor.

[Method of manufacturing component mounting board]
Next, a method for manufacturing the component mounting board according to the present embodiment will be described.
FIG. 7A is a cross-sectional view showing the multilayer board before forming a resist in the method for manufacturing a component mounting board according to the embodiment. FIG. 7B is a cross-sectional view illustrating a step of forming a resist in the method of manufacturing the component mounting board according to the embodiment, and is a cross-sectional view illustrating a step of forming a resist on the surface of the multilayer substrate. FIG. 7C is a cross-sectional view illustrating a step of forming a resist in the method of manufacturing the component mounting board according to the embodiment, and is a cross-sectional view illustrating a step of forming a resist on the back surface of the multilayer substrate. FIG. 7D is a cross-sectional view illustrating a step of mounting a component in the method for manufacturing a component mounting board according to the embodiment, and is a cross-sectional view illustrating a step of forming an adhesive layer. FIG. 7E is a cross-sectional view illustrating a step of mounting the component in the method of manufacturing the component mounting board according to the embodiment, and is a cross-sectional view illustrating a state after the component is mounted. The front surface resist before curing is 7c, and the rear surface resist before curing is 8c.
In each process, the same number is assigned to the squeegee and the mask, but the same physical number is not used, but only the functions and properties are common, and different sizes and materials are used. be able to.

  As one example, the method for manufacturing a component mounting board of the present embodiment includes a step of forming a resist on the above-described multilayer board and a step of mounting components, and the steps are performed in this order. The material and arrangement of each member are the same as those described in the description of the component mounting board, and thus the description will be omitted as appropriate. In FIG. 7C, the orientation of the multilayer substrate is shown as being opposite to the upper and lower surfaces of FIG. 7B.

(Step of forming resist)
The step of forming a resist is a step of forming a front surface resist 7 and a back surface resist 8 on the front and back surfaces of the multilayer substrate 100. Here, the front surface resist 7 and the back surface resist 8 are formed in the order of the front surface and the back surface of the multilayer substrate 100. However, the back surface resist 8 and the front surface resist 7 may be formed in the order of the back surface and the front surface of the multilayer substrate 100.

  In this step, first, the surface resist 7 is formed on the surface circuit pattern 2 of the multilayer substrate 100 by a screen printing method using the screen mask 12 and the surface resist 7c on which a desired coating pattern is formed.

  The screen printing conditions are, for example, a clearance of 0.5 mm to 5.0 mm, a screen mask 12 of 100 mesh to 400 mesh, an emulsion thickness of 10 μm to 20 μm, and a squeegee 40 of urethane rubber having a hardness of 60 to 80. An effective angle of 60 to 80 degrees, a printing pressure of 0.2 MPa to 0.4 MPa, a squeegee speed of 20 mm / sec to 100 mm / sec, and squeegee one-way printing can be performed. Thereafter, the surface resist 7 is heated and cured at 50 ° C. to 250 ° C. for 5 minutes to 60 minutes.

  Subsequently, the backside resist 8 is formed on the backside circuit pattern 3 by screen printing using the screen mask 12 and the backside resist 8c. The same resist as that formed by printing from the front surface of the insulating substrate 4 can be used as the back surface resist 8, and the conditions for screen printing can be the same as those for forming the front surface resist 7. Then, the back surface resist 8 is heated and cured at 50 ° C. to 250 ° C. for 5 minutes to 60 minutes. Thereby, an insulating layer is formed in a desired range of the front surface circuit pattern 2 and the back surface circuit pattern 3.

(Process of mounting components)
The step of mounting the component is a step of mounting the component on the multilayer substrate 100 on which the front surface resist 7 and the back surface resist 8 are formed.
In this step, first, a solder paste 9c is printed using a metal mask 13 having an opening in a component mounting portion and a squeegee 40 to form an adhesive layer 9. Next, the mounted component 10 is placed on the adhesive layer 9, the adhesive layer 9 is cured, and the mounted component 10 is connected to the multilayer substrate 100 and fixed.
In this example, the solder paste 9c is applied directly on the conductive paste 6, but from the viewpoint of the bonding strength of the component, the mounting portion of the component may be subjected to plating treatment or organic rust prevention treatment in advance.

  As described above, according to the present embodiment, the interlayer connection portion is formed by filling the through hole 1 and the exposed portion 20 with the conductive paste 6. Here, focusing on the difference in the coefficient of thermal expansion between the material used for the conductive paste 6 and the substrate insulating resin, the difference in the coefficient of thermal expansion between the conductive paste 6 containing the binder resin and the insulating resin material of the insulating substrate 4 is as follows. The difference in thermal expansion coefficient between the plated metal and the insulating resin material of the substrate in through hole connection by generally used plating is small. Therefore, since the stress at the time of the thermal shock is suppressed, the connection reliability of the multilayer board 100 in the process of mounting components and the like is improved.

In addition, the presence of the exposed portion 20 lowers the resistance value of the interlayer connection portion, stabilizes it, and improves the connection reliability against thermal shock. In addition, even if the mask is misaligned during printing of the conductive paste, the resistance value of the interlayer connection is low and stable, and the connection reliability against thermal shock is improved.
Further, since the surface of the conductive paste 6 is flat, it is easy to mount components on the conductive paste 6. Therefore, the component mounting density of the multilayer board 100 can be increased. In addition, the accuracy of the mounting position of the mounting component 10, the accuracy of the inclination, and the like, which are particularly important in mounting the LED component, can be ensured by the flatness of the surface of the conductive paste 6. Further, the present invention can be applied to a flexible substrate having a thin insulating layer, and can contribute to miniaturization, thinning, and narrowing of a frame of an electronic device and a display.

Hereinafter, examples will be described.
FIG. 8A is an image showing a substrate for interlayer connection evaluation before filling the conductive paste used in the example. FIG. 8B is an image showing a part of FIG. 8A in an enlarged manner. FIG. 8C is a perspective view schematically illustrating a connection state of the interlayer connection portion in the substrate for evaluating an interlayer connection portion after being filled with the conductive paste used in the example. FIG. 8D is a graph showing the connection resistance value and the variation in the resistance value of the interlayer connection portion evaluation substrate after filling the conductive paste used in the examples, wherein the shape of the exposed portion is annular and cross-shaped. 7 is a graph in a case where the paste print mask alignment for a shape-like object is appropriate. FIG. 8E is a graph showing the connection resistance value and the variation in the resistance value of the interlayer connection portion evaluation board after filling the conductive paste used in the examples, wherein the exposed portions are annular and cross-shaped. 9 is a graph when a paste print mask position is shifted for a shape-like object.

  The evaluation of the interlayer connection portion was performed using the interlayer connection portion evaluation substrate. The board for evaluating the interlayer connection part has a board outer dimension of 40 mm × 190 mm, and has a total of 40 interlayer connection parts connected in series in a daisy chain at 0.9 mm intervals between the upper left and lower left measurement lands at 0.9 mm intervals. It is a structure that connects columns. A plurality of types of exposed portions are formed on the surface circuit pattern for each of the 40 rows (one type of exposed portion for each row), and measurement lands are provided at both ends of the row. In addition, it has a structure in which the total number of interlayer connection portions in one substrate is 5,600. In addition, the board | substrate for an interlayer connection part evaluation made the through-hole diameter 0.2mm. In addition, for the substrate for evaluating the interlayer connection portion, the position of the paste print mask was adjusted for the exposed portion having an annular shape (see FIG. 2A) and the cross shape having no exposed base portion (see FIG. 10C). Each of them was manufactured in two rows. Also, regarding the interlayer connection portion evaluation board, the exposed portion shape is circular (see FIG. 2A) and cross-shaped (see FIG. 10C) having no exposed base portion, and the paste print mask position is set in the horizontal direction (see FIG. 10C). Two rows each of which was shifted by about 50 μm to the right (see FIG. 2A) in a top view were produced.

The board for interlayer connection evaluation was manufactured by the above-described method for manufacturing a multilayer board. Specifically, it is as follows.
First, a copper foil having a thickness of 35 μm was bonded to the front and back surfaces of an insulating substrate (glass epoxy) having a thickness of 400 μm, and the total thickness of the multilayer substrate at the interlayer connection portion was set to 470 μm. Next, the copper foil on both surfaces was etched to form a front circuit pattern, a back circuit pattern, and an exposed portion. Next, a through hole having a through hole diameter of φ0.2 mm was formed by drilling a hole from the front surface side of the insulating substrate using an NC processing machine.

Next, the conductive paste was filled into the through-holes and the exposed portions by a screen printing method from the surface of the insulating substrate through a mask. Screen printing conditions were as follows: clearance 0 mm to 1 mm, a metal mask having a thickness of 20 μm to 30 μm, an opening hole diameter of φ0.3 mm and 0.4 mm, and a urethane rubber squeegee having a hardness of 80, and a squeegee effective angle of 15 ° to 25 °. And printing pressure 0.15 MPa to 0.3 MPa, squeegee speed 10 mm / sec to 100 mm / sec, and squeegee reciprocal printing. Thereafter, the conductive paste protruding from the upper surface of the surface circuit pattern was subjected to a pressure treatment at 120 ° C., a pressure of 0.2 MPa, and a speed of 5 mm / sec to 10 mm / sec by a heat laminator. The conductive paste is a mixture of flake silver and flake silver-coated copper powder filler and a thermosetting binder resin, and has a volume resistivity of 7.5 × 10 ⁻⁵ Ω · cm, A binder resin having a binder resin content of 6% to 7% by mass, a solvent content of 0% by mass, and a mass reduction rate of less than 1% upon curing was used.

  Thereafter, the conductive paste was heated and cured at a constant temperature of 230 ° C. for 60 minutes. As a result, an interlayer connecting portion for electrically connecting the front surface circuit pattern and the back surface circuit pattern was formed.

The interlayer connection evaluation board obtained in this manner was subjected to four-terminal measurement of the connection part resistance with an electric inspection device for eight rows having the above-described exposed parts having a ring shape and a cross shape. 8D and the result of FIG. 8E were obtained. When the paste print mask alignment is proper (FIG. 8D), the connection resistance value is in the range of 6.9 mΩ to 8.7 mΩ regardless of the shape of the exposed portion being annular or cross-shaped, and the resistance value varies. Was similar. However, when the paste print mask position was shifted by about 50 μm in the horizontal direction (FIG. 8E), the connection resistance of the ring-shaped one was shifted to a high resistance, and the variation in the resistance was increased by about 2.5 times. On the other hand, in the case of the cross shape, the result obtained was almost the same as that in the case where the printing alignment was appropriate. From this result, it was confirmed that the connection state between the front and back circuit patterns and the conductive paste was reduced due to the misalignment of the paste printing mask in the case of the ring-shaped one, whereas a stable connection state could be secured in the case of the cross-shaped one. Was.
In addition, when the paste print mask alignment was appropriate, the connection resistance value of the exposed portion having a cross shape was lower than the connection resistance value of the exposed portion having an annular shape. From these results, it can be said that the multilayer board and the component mounting board of the present embodiment have high connection reliability.

  As described above, the multi-layer board and the component mounting board according to the present embodiment, and the method of manufacturing the same have been specifically described by the embodiments for carrying out the invention, but the gist of the present invention is limited to these descriptions. Rather, they must be interpreted broadly based on the claims. Various changes and modifications based on these descriptions are also included in the gist of the present invention.

The shape of the exposed portion is not limited to the above embodiment.
FIGS. 9A, 10A, 11A, 12A, 13A, 14A, 15A, 16A, 17A, 18A, and 19A show a multi-layer substrate according to another embodiment before forming a through hole. It is a top view which shows the exposed part typically. 9B, FIG. 10B, FIG. 11B, FIG. 12B, FIG. 13B, FIG. 14B, FIG. 15B, FIG. 16B, FIG. 17B, FIG. 18B, and FIG. It is a top view which shows the exposed part typically. 9C, 10C, 11C, 12C, 13C, 14C, 15C, 16C, 17C, 18C, and 19C show an exposed portion and a conductive paste in a multilayer substrate according to another embodiment. FIG. 3 is a plan view schematically showing the formation position of the. For convenience, only the outer edge of the conductive paste 6 is described.
20A to 23 are plan views schematically showing exposed portions and formation positions of a conductive paste in a multilayer substrate according to another embodiment. 20A to 22B show the extension of the exposed portion extending to the end of the surface circuit pattern, and FIG. 23 shows that the conductive paste is applied to the exposed portion of the embodiment described above. It shows a form in which a part of the protrusion is covered.

The exposed portion 20 may have a shape in which four extending portions 20b are provided at positions facing the center of the through hole 1 (see FIGS. 9A to 9C and the like).
The exposed portion 20 may have a shape without the exposed base portion 20a (see FIGS. 10A to 11C and the like). That is, the exposed portion 20 may be composed of only the extending portion 20b. With such a form, the formation of the exposed portion 20 becomes easy. In this case, for example, in the step of forming a circuit pattern, the shape of the exposed portion 20 is adjusted, and in the step of forming the through hole, the through hole 1 is formed so as to eliminate the exposed base portion 20a. As a result, an extended portion 20b (exposed portion 20) is formed on the outer periphery of the through hole 1.

The exposed portion 20 may have a triangular shape in the extending portion 20b in plan view (see FIGS. 12A to 12C and the like). That is, the exposed portion 20 may be formed in a spike shape. Note that the triangle here includes a portion where the portion connected to the exposed base 20a curves along the shape of the exposed base 20a. If the extending portion 20b is triangular in plan view, the exposed portion 20 can be easily formed because of the simple shape.
The exposed portion 20 may have a shape such that the extending portion 20b becomes wider in plan view toward the outer peripheral direction of the through hole 1 (see FIGS. 16A to 17C). The exposed portion 20 may have a shape in which the extension portion 20b lacks a part of an ellipse in plan view or a shape lacking a part of a circle (see FIGS. 18A to 19C). Further, the extension portion 20b may have another shape such as a star shape or a rhombus shape in a plan view.

The exposed part 20 may be such that a part of the extending part 20b extends to the end of the surface circuit pattern 2 (see FIGS. 20A to 22B). Here, in the drawing, the four extending portions 20b in the upper, lower, left, and right directions are formed in a long shape. In this case, the upper, lower, and left extensions 20b extend to the upper end, lower end, and left end of the surface circuit pattern 2. With such a form, stable connection is possible even in a conductive paste containing a large amount of binder resin or a high-viscosity conductive paste. In this case as well, the size and position of the through hole 1 and the formation range of the conductive paste 6 may be adjusted as appropriate.
Further, the conductive paste 6 may cover a part of the exposed portion 20 (see FIG. 23). Here, the conductive paste 6 is formed in a circular shape in plan view so as to cover a part of the extension 20b. In such a form, it is not necessary to cover the entire exposed portion 20 with the conductive paste 6, and the formation of the conductive paste 6 is facilitated.
Furthermore, the exposed portion may have other arrangements and shapes depending on the size of the through hole, the thickness of the circuit pattern, the thickness of the insulating substrate, and the like. Further, the exposed base after forming the through hole is not limited to an annular shape, and may be another annular shape such as an elliptical annular shape or a square annular shape, or may have another shape.

The multilayer board and the component mounting board may be other embodiments.
FIG. 24A is a cross-sectional view schematically illustrating a configuration of a component mounting board according to another embodiment. FIG. 24B is a cross-sectional view schematically illustrating a configuration of a component mounting board according to another embodiment.

The exposed portion 20 may be formed only on the surface of the insulating substrate 4 like the multilayer substrate 100A and the component mounting substrate 101A. In this case, the through hole 1 is formed so as to penetrate the insulating substrate 4 and the back surface circuit pattern 3. Further, the exposed portion 20 may be formed only on the back surface of the insulating substrate 4 like the multilayer substrate 100B and the component mounting substrate 101B. In this case, the through hole 1 is formed so as to penetrate the insulating substrate 4 and the surface circuit pattern 2.
Even in these forms, a multilayer board and a component mounting board having excellent connection reliability can be obtained.

  In the method for manufacturing the multilayer substrate, the conductive paste is filled into the through holes from the front surface of the insulating substrate. However, the conductive paste may be filled into the through holes from both the front surface and the rear surface of the insulating substrate. In this manner, the protrusion may be provided on the back surface of the insulating substrate. If the projection on the back surface of the conductive paste 6 is flat, it is easy to form a resist on the interlayer connection (below the interlayer connection), and the insulation is enhanced.

  In addition, in the method of manufacturing the multilayer board and the method of manufacturing the component mounting board, the location of the exposed portion, the shape of the exposed portion, and the like may be appropriately adjusted according to the form of the multilayer board and the component mounted board. In addition, the method for manufacturing a multilayer substrate and the method for manufacturing a component mounting board may include other steps before, during, or after each of the steps as long as the steps are not adversely affected. For example, a foreign matter removing step of removing foreign matter mixed during the manufacturing may be included.

  The multilayer board and the component mounting board according to the embodiments of the present disclosure can be used for electronic devices, displays, and the like.

REFERENCE SIGNS LIST 1 through hole 2 surface circuit pattern 2a front surface copper foil 3 back surface circuit pattern 3a back surface copper foil 4 insulating substrate 6a filling portion 6b projecting portion 6, 6c conductive paste 7, 7c surface resist 8, 8c back surface resist 9, adhesive layer 9c solder paste DESCRIPTION OF SYMBOLS 10 Mounting component 11 Mask 12 Screen mask 13 Metal mask 14 Tool 15 Insulating board 20 with a circuit pattern Exposed part 20a Exposed base 20b Extension part 30 Ceramic buff 40 Squeegee 50 Roll 51 Separator 100, 100A, 100B Multilayer substrate 101, 101A, 101B Component mounting board

Claims (16)

Having an insulating substrate and a circuit pattern provided on the front and back surfaces of the insulating substrate, an insulating substrate with a circuit pattern having a through hole formed therein,
A conductive paste filled in the through-hole and electrically connected to the circuit pattern,
At least one of the front surface and the back surface of the insulating substrate has an exposed portion where the insulating substrate is exposed around the through hole, and the exposed portion extends in an outer peripheral direction of the through hole in a plan view. A multi-layer substrate having a plurality of extending portions, wherein at least a part of the exposed portion is covered with the conductive paste.   The multilayer substrate according to claim 1, wherein the extension is provided at a position facing a center of the through hole in a plan view.   The multilayer substrate according to claim 1, wherein at least four extending portions are provided for one through hole.   4. The multilayer substrate according to claim 1, wherein the extension portions are provided at equal intervals on a periphery of the through hole in a plan view. 5.   The multilayer substrate according to claim 1, wherein the extension is a rectangle or a triangle in plan view. The said conductive paste has volume resistivity of 2 * 10 < ^-5 > (ohm * cm) -1.5 * 10 < ^-4 > (ohm * cm), and binder resin content is 3 mass% ^-10 mass%. 6. The multilayer substrate according to any one of 5.   The insulating substrate is a glass epoxy having a thickness of 50 μm to 1000 μm or a polyimide having a thickness of 12 μm to 50 μm, and the circuit pattern formed on the front and back surfaces of the insulating substrate has a thickness of 12 μm to 70 μm. The multilayer substrate according to claim 1.   A component mounting board comprising a multilayer board according to any one of claims 1 to 7, on which a mounting component is mounted. A step of preparing an insulating substrate with a circuit pattern having an insulating substrate and a circuit pattern provided on the front surface and the back surface of the insulating substrate, and having a through hole formed therein,
Filling the through-hole with a conductive paste,
The step of preparing the insulating substrate with a circuit pattern includes the step of: exposing the insulating substrate around at least one of the front surface and the back surface of the insulating substrate around the through hole, and extending in a peripheral direction of the through hole. Forming an exposed portion having an extension portion of
The step of filling the conductive paste is a method of manufacturing a multilayer substrate in which at least a part of the exposed portion is covered with the conductive paste.   The method according to claim 9, wherein the step of filling the conductive paste presses the conductive paste protruding from a position on an upper surface of the circuit pattern in the vicinity of the through hole.   The method according to claim 9, wherein after the step of filling the conductive paste, a step of flatly polishing the conductive paste protruding from a position on an upper surface of the circuit pattern is performed.   The method according to claim 9, wherein in the step of preparing the insulating substrate with a circuit pattern, the extending portion is formed at a position facing a center of the through hole in a plan view. A method for manufacturing a multilayer substrate.   The manufacturing of the multilayer substrate according to any one of claims 9 to 12, wherein in the step of preparing the insulating substrate with a circuit pattern, at least four extending portions are formed for one of the through holes. Method.   The multi-layer substrate according to claim 9, wherein in the step of preparing the insulating substrate with a circuit pattern, the extending portions are formed at equal intervals on a periphery of the through hole in a plan view. Production method.   The method of manufacturing a multilayer substrate according to any one of claims 9 to 14, wherein in the step of preparing the insulating substrate with a circuit pattern, the extension is formed in a rectangular shape or a triangular shape in plan view. A step of forming a resist on the front surface and the back surface of the multilayer substrate manufactured by the method for manufacturing a multilayer substrate according to any one of claims 9 to 15,
Mounting a component on the multi-layer substrate on which the resist is formed.