JP2019520639A5 - - Google Patents

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Publication number
JP2019520639A5
JP2019520639A5 JP2018561677A JP2018561677A JP2019520639A5 JP 2019520639 A5 JP2019520639 A5 JP 2019520639A5 JP 2018561677 A JP2018561677 A JP 2018561677A JP 2018561677 A JP2018561677 A JP 2018561677A JP 2019520639 A5 JP2019520639 A5 JP 2019520639A5
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JP
Japan
Prior art keywords
memory
error
response
data
ecc
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JP2018561677A
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English (en)
Japanese (ja)
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JP6956115B2 (ja
JP2019520639A (ja
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Priority claimed from US15/168,045 external-priority patent/US10042700B2/en
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Publication of JP2019520639A5 publication Critical patent/JP2019520639A5/ja
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JP2018561677A 2016-05-28 2016-09-22 インテグラルポストパッケージリペア Active JP6956115B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/168,045 US10042700B2 (en) 2016-05-28 2016-05-28 Integral post package repair
US15/168,045 2016-05-28
PCT/US2016/053138 WO2017209781A1 (en) 2016-05-28 2016-09-22 Integral post package repair

Publications (3)

Publication Number Publication Date
JP2019520639A JP2019520639A (ja) 2019-07-18
JP2019520639A5 true JP2019520639A5 (https=) 2019-11-07
JP6956115B2 JP6956115B2 (ja) 2021-10-27

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ID=60417909

Family Applications (1)

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JP2018561677A Active JP6956115B2 (ja) 2016-05-28 2016-09-22 インテグラルポストパッケージリペア

Country Status (5)

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US (1) US10042700B2 (https=)
JP (1) JP6956115B2 (https=)
KR (1) KR102460513B1 (https=)
CN (1) CN109155146A (https=)
WO (1) WO2017209781A1 (https=)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102410022B1 (ko) * 2017-11-24 2022-06-21 에스케이하이닉스 주식회사 에러스크럽방법 및 이를 이용한 반도체모듈
KR102623234B1 (ko) * 2018-08-14 2024-01-11 삼성전자주식회사 스토리지 장치 및 그것의 동작 방법
EP3864500A4 (en) * 2018-10-12 2022-10-12 Supermem, Inc. ERROR CORRECTING MEMORY SYSTEMS
US11494087B2 (en) 2018-10-31 2022-11-08 Advanced Micro Devices, Inc. Tolerating memory stack failures in multi-stack systems
US10770164B1 (en) 2019-05-02 2020-09-08 International Business Machines Corporation Soft post package repair function validation
US11416334B2 (en) * 2019-05-24 2022-08-16 Texas Instmments Incorporated Handling non-correctable errors
KR102669545B1 (ko) * 2019-07-23 2024-05-27 삼성전자주식회사 휘발성 메모리 장치의 리페어 제어 방법 및 이를 수행하는 스토리지 장치
KR102748832B1 (ko) * 2019-08-29 2025-01-02 삼성전자주식회사 반도체 메모리 장치, 이를 포함하는 메모리 시스템 및 이의 리페어 제어 방법
KR102706482B1 (ko) * 2019-08-30 2024-09-12 삼성전자주식회사 휘발성 메모리 장치의 리페어 제어 방법 및 이를 수행하는 스토리지 장치
KR102657760B1 (ko) * 2019-09-23 2024-04-17 에스케이하이닉스 주식회사 메모리 시스템 및 그 메모리 시스템의 동작 방법
US11989106B2 (en) 2019-12-11 2024-05-21 Intel Corporation Inline buffer for in-memory post package repair (PPR)
KR102787324B1 (ko) 2020-01-07 2025-03-27 삼성전자주식회사 반도체 메모리 장치 및 이를 포함하는 메모리 시스템 및 반도체 메모리 장치의 동작 방법
TWI708248B (zh) * 2020-02-11 2020-10-21 華邦電子股份有限公司 記憶體裝置和調整用於記憶體裝置的參數的方法
CN113284533B (zh) * 2020-02-20 2023-10-13 华邦电子股份有限公司 存储器装置和调整用于存储器装置的参数的方法
US11127481B1 (en) * 2020-07-10 2021-09-21 Micron Technology, Inc. Managing execution of scrub operations in a memory sub-system
KR102883336B1 (ko) * 2020-12-29 2025-11-07 삼성전자주식회사 반도체 메모리 장치 및 반도체 메모리 장치의 동작 방법
US11573854B2 (en) * 2021-02-02 2023-02-07 Nvidia Corporation Techniques for data scrambling on a memory interface
CN113900847A (zh) * 2021-10-15 2022-01-07 深圳市金泰克半导体有限公司 基于fpga的内存修复系统
WO2023091377A1 (en) * 2021-11-22 2023-05-25 Rambus Inc. Logging burst error information of a dynamic random access memory (dram) using a buffer structure and signaling
US11940872B2 (en) 2022-04-21 2024-03-26 Analog Devices International Unlimited Company Error correction code validation
US12333158B2 (en) 2022-06-29 2025-06-17 Advanced Micro Devices, Inc. Efficient memory power control operations
CN115831209B (zh) * 2022-10-25 2025-10-03 山东云海国创云计算装备产业创新中心有限公司 一种兼容ram读写逻辑与ecc逻辑的功能验证装置及系统
US12158827B2 (en) * 2022-12-29 2024-12-03 Advanced Micro Devices, Inc. Full dynamic post-package repair
CN116302659B (zh) * 2023-04-27 2023-08-08 摩尔线程智能科技(北京)有限责任公司 Gpu显存错误处理方法及装置、电子设备和存储介质

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5267242A (en) * 1991-09-05 1993-11-30 International Business Machines Corporation Method and apparatus for substituting spare memory chip for malfunctioning memory chip with scrubbing
JPH113290A (ja) * 1997-06-11 1999-01-06 Hitachi Ltd メモリ制御方式
US7236269B2 (en) 2001-11-05 2007-06-26 Chrontel, Inc. System and method for dithering with reduced memory
US6848063B2 (en) 2001-11-20 2005-01-25 Hewlett-Packard Development Company, L.P. System and method for scrubbing errors in very large memories
US6718444B1 (en) 2001-12-20 2004-04-06 Advanced Micro Devices, Inc. Read-modify-write for partial writes in a memory controller
US7600165B2 (en) 2002-02-13 2009-10-06 Taiwan Semiconductor Manufacturing Co., Ltd. Error control coding method and system for non-volatile memory
US7043679B1 (en) 2002-06-27 2006-05-09 Advanced Micro Devices, Inc. Piggybacking of ECC corrections behind loads
US7496823B2 (en) 2005-03-16 2009-02-24 Hewlett-Packard Development Company, L.P. Hardware based memory scrubbing
US9171585B2 (en) * 2005-06-24 2015-10-27 Google Inc. Configurable memory circuit system and method
US20070089032A1 (en) 2005-09-30 2007-04-19 Intel Corporation Memory system anti-aliasing scheme
US7386771B2 (en) 2006-01-06 2008-06-10 International Business Machines Corporation Repair of memory hard failures during normal operation, using ECC and a hard fail identifier circuit
US8255772B1 (en) 2008-06-18 2012-08-28 Cisco Technology, Inc. Adaptive memory scrub rate
US8756486B2 (en) * 2008-07-02 2014-06-17 Micron Technology, Inc. Method and apparatus for repairing high capacity/high bandwidth memory devices
JP5601256B2 (ja) * 2011-03-20 2014-10-08 富士通株式会社 メモリコントローラ及び情報処理装置
KR101873526B1 (ko) 2011-06-09 2018-07-02 삼성전자주식회사 에러 정정회로를 구비한 온 칩 데이터 스크러빙 장치 및 방법
US9003102B2 (en) * 2011-08-26 2015-04-07 Sandisk Technologies Inc. Controller with extended status register and method of use therewith
US20130139008A1 (en) 2011-11-29 2013-05-30 Advanced Micro Devices, Inc. Methods and apparatus for ecc memory error injection
JP2015207329A (ja) * 2014-04-21 2015-11-19 マイクロン テクノロジー， インク． 半導体装置およびその制御方法
US10891185B2 (en) * 2014-08-08 2021-01-12 Hewlett Packard Enterprise Development Lp Error counters on a memory device
US9251909B1 (en) * 2014-09-29 2016-02-02 International Business Machines Corporation Background threshold voltage shifting using base and delta threshold voltage shift values in flash memory
US10228990B2 (en) * 2015-11-12 2019-03-12 Sandisk Technologies Llc Variable-term error metrics adjustment

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