CN109155146A - 一体式封装后修复装置 - Google Patents

一体式封装后修复装置 Download PDF

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Publication number
CN109155146A
CN109155146A CN201680085880.4A CN201680085880A CN109155146A CN 109155146 A CN109155146 A CN 109155146A CN 201680085880 A CN201680085880 A CN 201680085880A CN 109155146 A CN109155146 A CN 109155146A
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CN
China
Prior art keywords
memory
data
response
error
ecc
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Pending
Application number
CN201680085880.4A
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English (en)
Chinese (zh)
Inventor
凯文·M·布朗德
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of CN109155146A publication Critical patent/CN109155146A/zh
Pending legal-status Critical Current

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Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G06F11/106Correcting systematically all correctable errors, i.e. scrubbing
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614Improving the reliability of storage systems
    • G06F3/0619Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638Organizing or formatting or addressing of data
    • G06F3/064Management of blocks
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4093Input/output [I/O] data interface arrangements, e.g. data buffers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38Response verification devices
    • G11C29/42Response verification devices using error correcting codes [ECC] or parity check
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44Indication or identification of errors, e.g. for repair
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44Indication or identification of errors, e.g. for repair
    • G11C29/4401Indication or identification of errors, e.g. for repair for self repair
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/52Protection of memory contents; Detection of errors in memory contents
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0411Online error correction
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/76Masking faults in memories by using spares or by reconfiguring using address translation or modifications

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Detection And Correction Of Errors (AREA)
  • Memory System (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
CN201680085880.4A 2016-05-28 2016-09-22 一体式封装后修复装置 Pending CN109155146A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/168,045 US10042700B2 (en) 2016-05-28 2016-05-28 Integral post package repair
US15/168,045 2016-05-28
PCT/US2016/053138 WO2017209781A1 (en) 2016-05-28 2016-09-22 Integral post package repair

Publications (1)

Publication Number Publication Date
CN109155146A true CN109155146A (zh) 2019-01-04

Family

ID=60417909

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201680085880.4A Pending CN109155146A (zh) 2016-05-28 2016-09-22 一体式封装后修复装置

Country Status (5)

Country Link
US (1) US10042700B2 (https=)
JP (1) JP6956115B2 (https=)
KR (1) KR102460513B1 (https=)
CN (1) CN109155146A (https=)
WO (1) WO2017209781A1 (https=)

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TWI708248B (zh) * 2020-02-11 2020-10-21 華邦電子股份有限公司 記憶體裝置和調整用於記憶體裝置的參數的方法
CN112542202A (zh) * 2019-09-23 2021-03-23 爱思开海力士有限公司 存储系统以及操作该存储系统的方法
CN113284533A (zh) * 2020-02-20 2021-08-20 华邦电子股份有限公司 存储器装置和调整用于存储器装置的参数的方法
CN113900847A (zh) * 2021-10-15 2022-01-07 深圳市金泰克半导体有限公司 基于fpga的内存修复系统
CN114840455A (zh) * 2021-02-02 2022-08-02 辉达公司 存储器接口上的数据加扰技术
CN115831209A (zh) * 2022-10-25 2023-03-21 山东云海国创云计算装备产业创新中心有限公司 一种兼容ram读写逻辑与ecc逻辑的功能验证装置及系统
CN116302659A (zh) * 2023-04-27 2023-06-23 摩尔线程智能科技(北京)有限责任公司 Gpu显存错误处理方法及装置、电子设备和存储介质

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KR102410022B1 (ko) * 2017-11-24 2022-06-21 에스케이하이닉스 주식회사 에러스크럽방법 및 이를 이용한 반도체모듈
KR102623234B1 (ko) * 2018-08-14 2024-01-11 삼성전자주식회사 스토리지 장치 및 그것의 동작 방법
EP3864500A4 (en) * 2018-10-12 2022-10-12 Supermem, Inc. ERROR CORRECTING MEMORY SYSTEMS
US11494087B2 (en) 2018-10-31 2022-11-08 Advanced Micro Devices, Inc. Tolerating memory stack failures in multi-stack systems
US10770164B1 (en) 2019-05-02 2020-09-08 International Business Machines Corporation Soft post package repair function validation
US11416334B2 (en) * 2019-05-24 2022-08-16 Texas Instmments Incorporated Handling non-correctable errors
KR102669545B1 (ko) * 2019-07-23 2024-05-27 삼성전자주식회사 휘발성 메모리 장치의 리페어 제어 방법 및 이를 수행하는 스토리지 장치
KR102748832B1 (ko) * 2019-08-29 2025-01-02 삼성전자주식회사 반도체 메모리 장치, 이를 포함하는 메모리 시스템 및 이의 리페어 제어 방법
KR102706482B1 (ko) * 2019-08-30 2024-09-12 삼성전자주식회사 휘발성 메모리 장치의 리페어 제어 방법 및 이를 수행하는 스토리지 장치
US11989106B2 (en) 2019-12-11 2024-05-21 Intel Corporation Inline buffer for in-memory post package repair (PPR)
KR102787324B1 (ko) 2020-01-07 2025-03-27 삼성전자주식회사 반도체 메모리 장치 및 이를 포함하는 메모리 시스템 및 반도체 메모리 장치의 동작 방법
US11127481B1 (en) * 2020-07-10 2021-09-21 Micron Technology, Inc. Managing execution of scrub operations in a memory sub-system
KR102883336B1 (ko) * 2020-12-29 2025-11-07 삼성전자주식회사 반도체 메모리 장치 및 반도체 메모리 장치의 동작 방법
WO2023091377A1 (en) * 2021-11-22 2023-05-25 Rambus Inc. Logging burst error information of a dynamic random access memory (dram) using a buffer structure and signaling
US11940872B2 (en) 2022-04-21 2024-03-26 Analog Devices International Unlimited Company Error correction code validation
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US12158827B2 (en) * 2022-12-29 2024-12-03 Advanced Micro Devices, Inc. Full dynamic post-package repair

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CN102820049A (zh) * 2011-06-09 2012-12-12 三星电子株式会社 用于刷新以及数据清理存储器件的方法和装置
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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112542202A (zh) * 2019-09-23 2021-03-23 爱思开海力士有限公司 存储系统以及操作该存储系统的方法
CN112542202B (zh) * 2019-09-23 2024-05-28 爱思开海力士有限公司 存储系统以及操作该存储系统的方法
TWI708248B (zh) * 2020-02-11 2020-10-21 華邦電子股份有限公司 記憶體裝置和調整用於記憶體裝置的參數的方法
CN113284533A (zh) * 2020-02-20 2021-08-20 华邦电子股份有限公司 存储器装置和调整用于存储器装置的参数的方法
CN113284533B (zh) * 2020-02-20 2023-10-13 华邦电子股份有限公司 存储器装置和调整用于存储器装置的参数的方法
CN114840455A (zh) * 2021-02-02 2022-08-02 辉达公司 存储器接口上的数据加扰技术
CN113900847A (zh) * 2021-10-15 2022-01-07 深圳市金泰克半导体有限公司 基于fpga的内存修复系统
CN115831209A (zh) * 2022-10-25 2023-03-21 山东云海国创云计算装备产业创新中心有限公司 一种兼容ram读写逻辑与ecc逻辑的功能验证装置及系统
CN116302659A (zh) * 2023-04-27 2023-06-23 摩尔线程智能科技(北京)有限责任公司 Gpu显存错误处理方法及装置、电子设备和存储介质
CN116302659B (zh) * 2023-04-27 2023-08-08 摩尔线程智能科技(北京)有限责任公司 Gpu显存错误处理方法及装置、电子设备和存储介质

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Publication number Publication date
WO2017209781A1 (en) 2017-12-07
JP6956115B2 (ja) 2021-10-27
KR20190003591A (ko) 2019-01-09
JP2019520639A (ja) 2019-07-18
US10042700B2 (en) 2018-08-07
US20170344421A1 (en) 2017-11-30
KR102460513B1 (ko) 2022-10-31

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Application publication date: 20190104