JP2019169637A - Semiconductor device, manufacturing method of the same, and power conversion circuit - Google Patents

Abstract

To provide a semiconductor device capable of achieving at a high level all items of reverse surge power resistance, noise suppression during recovery, and a forward voltage and V-Qtrade-off characteristics as compared to a semiconductor device including a semiconductor substrate formed from a wafer having a general configuration.SOLUTION: The semiconductor device includes: a semiconductor substrate having a first region of a first conductivity type and a second region of the first conductivity type, having impurity concentration higher than that of the first region; and a main plane side structure. A distance from a depth position of a boundary between the first region and the second region to a depth position where impurity concentration in the second region is 1000 times the impurity concentration in the first region is in a range of 20 μm to 40 μm.SELECTED DRAWING: Figure 4

Description

  The present invention relates to a semiconductor device, a semiconductor device manufacturing method, and a power conversion circuit.

  Conventionally, a semiconductor device including a semiconductor substrate having a first region of a first conductivity type and a second region having a first conductivity type and an impurity concentration higher than that of the first region is widely known (see, for example, Patent Document 1). ).

  The semiconductor substrate as described above is generally formed from a wafer (hereinafter referred to as an Epi wafer) in which the impurity concentration in the first region is different from the impurity concentration in the second region by epitaxial growth, A wafer formed from a wafer (hereinafter referred to as a diffusion wafer) in which the impurity concentration in the first region is different from the impurity concentration in the second region due to impurity diffusion is used.

  In the semiconductor substrate formed from the Epi wafer, compared to the semiconductor substrate formed from the diffusion wafer, the impurity concentration in the second region is a certain value from the depth position of the boundary between the first region and the second region (for example, The distance to the depth position until the impurity concentration reaches 1000 times in the first region is shortened (the concentration gradient becomes steep. Refer to Comparative Examples 1 and 2 in FIG. 4 described later).

Japanese Patent No. 5333241

By the way, when the semiconductor device is a diode (in particular, a high breakdown voltage diode having a breakdown voltage of 600 V or more for use in the power field), a diode including a semiconductor substrate formed from an Epi wafer has a reverse surge power (P _RSM ). There is a tendency that the withstand amount tends to be low (see Comparative Example 1 in FIG. 5A to be described later), and a large noise (particularly voltage noise) may occur during recovery (comparison in FIG. 5B to be described later). See Example 1.)

On the other hand, in a diode including a semiconductor substrate formed from a conventional diffusion wafer, the forward voltage (V _F ) tends to increase (see Comparative Example 2 in FIG. 6A described later), and V _F -Q. _{The rr} trade-off may worsen (see Comparative Example 2 in FIG. 6B described later).

For this reason, a reverse surge is not applied to a diode having a semiconductor substrate formed from a conventionally used Epi wafer or a conventional diffusion wafer (hereinafter collectively referred to as a wafer having a general configuration). There is a problem that it is difficult to make all the characteristics of power tolerance, suppression of noise generation during recovery, forward voltage, and V _F -Q _rr trade-off at a high level.

  Further, even in a semiconductor device other than a diode, it is considered that a problem similar to the above-described problem occurs when a semiconductor substrate formed from a wafer having a general configuration is provided.

Therefore, the present invention has been made to solve the above-described problems. Compared to a semiconductor device including a semiconductor substrate formed from a wafer having a general configuration, the reverse surge power withstand capability and noise during recovery are improved. It is an object of the present invention to provide a semiconductor device capable of coexisting all characteristics of generation suppression, forward voltage and V _F -Q _rr trade-off at a high level. Another object of the present invention is to provide a semiconductor device manufacturing method for manufacturing the semiconductor device described above. Another object of the present invention is to provide a power conversion circuit using the above-described semiconductor device.

[1] A semiconductor device of the present invention includes a first substrate of a first conductivity type, a semiconductor substrate having a first conductivity type and a second region having an impurity concentration higher than that of the first region, and a main surface of the first region. A main surface side structure formed over the main surface of the first region from the side, and an impurity concentration in the second region from the depth position of the boundary between the first region and the second region is the first region. The distance to the depth position that is 1000 times the impurity concentration in one region is in the range of 20 μm to 40 μm.

[2] In the semiconductor device of the present invention, it is preferable that the total thickness of the first region and the thickness of the second region is in a range of 150 μm to 250 μm.

[3] In the semiconductor device of the present invention, the semiconductor device is a diode, and the main surface side structure is a third region of a second conductivity type that is selectively formed on the main surface side of the first region. And a conductor film in contact with the first region and the third region.

[4] In the semiconductor device of the present invention, the conductor film is preferably made of silicon-containing aluminum or platinum.

[5] In the semiconductor device of the present invention, when the thickness of the first region is Wa and the thickness of the second region is Wb, the relationship of 0.6 ≦ Wa / Wb ≦ 0.9 is satisfied. It is preferable.

[6] In the semiconductor device of the present invention, when the thickness of the first region is Wa and the sum of the thickness of the first region and the second region is Wt, 0.4 ≦ Wa / It is preferable to satisfy the relationship of Wt ≦ 0.5.

[7] A method of manufacturing a semiconductor device according to the present invention includes a first conductivity type first region and a first conductivity type second region having an impurity concentration higher than that of the first region. The distance from the depth position of the boundary with the second region to the depth position where the impurity concentration in the second region becomes 1000 times the impurity concentration in the first region is in the range of 20 μm to 40 μm And a main surface side structure forming step of forming a main surface side structure from the main surface side of the first region to the main surface of the first region.

[8] A power conversion circuit according to the present invention includes a diode, a switching element, and an inductive load, and the diode has a first conductivity type first region and a first conductivity type, and is more impurity than the first region. A semiconductor substrate having a second region having a high concentration, and a main surface side structure formed from the main surface side of the first region to the main surface of the first region, the first region and the second region The distance from the depth position of the boundary to the depth position where the impurity concentration in the second region becomes 1000 times the impurity concentration in the first region is in the range of 20 μm to 40 μm. .

First, in the semiconductor device of the present invention, the distance from the depth position of the boundary between the first region and the second region to the depth position where the impurity concentration in the second region is 1000 times the impurity concentration in the first region. (Hereinafter referred to as an evaluation distance in the meaning of a distance for evaluating the concentration gradient) is 20 μm or more, and therefore the evaluation distance is larger than that of a semiconductor device including a semiconductor substrate formed from an Epi wafer. Longer (concentration gradient becomes gentle).
For this reason, according to the semiconductor device of the present invention, it is possible to suppress reach through at a low voltage and to perform soft recovery at the time of recovery. It is possible to suppress the decrease in noise and the generation of noise during recovery.

In the semiconductor device of the present invention, since the evaluation distance is 40 μm or less, the evaluation distance becomes shorter (concentration gradient becomes steeper) than a semiconductor device including a semiconductor substrate formed from a conventional diffusion wafer. ).
For this reason, according to the semiconductor device of the present invention, it is possible to make the second region thinner as compared with a semiconductor device including a semiconductor substrate formed from a conventional diffusion wafer. Thus, it is possible to suppress an increase in the forward voltage (V _F ) and to suppress the deterioration of the V _F -Q _rr trade-off.

Therefore, the semiconductor device of the present invention has a reverse surge power capability, noise generation suppression during recovery, forward voltage and V _F − as compared with a semiconductor device including a semiconductor substrate formed from a wafer having a general configuration. It becomes a semiconductor device capable of paralleling all the characteristics of the Q _rr trade-off at a high level.

The semiconductor device manufacturing method according to the present invention provides a distance from the depth position of the boundary between the first region and the second region to the depth position where the impurity concentration in the second region is 1000 times the impurity concentration in the first region. Includes a semiconductor substrate preparation step of preparing a semiconductor substrate having a thickness in the range of 20 μm to 40 μm. Therefore, compared to a semiconductor device including a semiconductor substrate formed from a wafer having a general configuration, reverse surge power withstand capability and recovery Semiconductor device manufacturing method capable of manufacturing a semiconductor device (semiconductor device of the present invention) capable of paralleling all characteristics of noise generation suppression, forward voltage and V _F -Q _rr trade-off at a high level It becomes.

The power conversion circuit of the present invention is a diode that can parallelize all characteristics of reverse surge power capability, noise generation suppression during recovery, forward voltage, and V _F -Q _rr trade-off at a high level (the present invention A high-quality power conversion circuit including a diode that is a semiconductor device is obtained.

1 is a cross-sectional view of a semiconductor device 1 according to an embodiment. Since the range necessary for the description is displayed in FIG. 1, both ends of the semiconductor device 1 illustrated in FIG. 1 do not necessarily coincide with the actual both ends of the semiconductor device 1. The same applies to FIG. 7 described later. It is a figure shown in order to demonstrate the manufacturing method of the semiconductor device 1 which concerns on embodiment. 2A to 2C are process diagrams. It is a circuit diagram showing power converter circuit 100 concerning an embodiment. It is a figure which shows the concentration profile of the semiconductor substrate in the semiconductor device which concerns on an Example, and the semiconductor device which concerns on the comparative examples 1 and 2. FIG. The horizontal axis of FIG. 4 indicates the depth with reference to the main surface of the first region (in FIG. 4, simply described as “depth”; unit: μm), and the vertical axis indicates the impurity concentration of the first conductivity type (FIG. 4 is simply described as “impurity concentration.” Unit: cm ⁻³ ). In FIG. 4, Wa represents the depth position of the boundary between the first region and the second region, Ca represents the impurity concentration at the depth position of the boundary between the first region and the second region, and Cb is 1000 times Ca. D1 represents a depth position where the impurity concentration in the second region of the semiconductor device according to the example becomes Cb, and D2 represents the impurity concentration in the second region of the semiconductor device according to Comparative Example 1 as Cb. D3 represents a depth position where the impurity concentration in the second region of the semiconductor device according to Comparative Example 2 is Cb. The distance from Wa to D1 in FIG. 4 is the evaluation distance in the example, the distance from Wa to D2 is the evaluation distance in Comparative Example 1, and the distance from Wa to D3 is the evaluation distance in Comparative Example 2. The graph in FIG. 4 is created based on actual measurement values obtained in experiments conducted under appropriate conditions. The same applies to each graph described later in that it is based on an actual measurement value obtained in an experiment conducted under an appropriate condition. Note that “appropriate conditions” are applicable to many of the semiconductor devices that are the subject of the present invention, and it is considered that a similar tendency result can be obtained for many of the semiconductor devices that are the subject of the present invention. A condition. 6 is a graph shown in order to compare the characteristics of the semiconductor device according to the example and the characteristics of the semiconductor device according to Comparative Example 1; FIG. 5A is a graph showing a reverse surge power capability (P _RSM ) distribution, and FIG. 5B is a graph showing a waveform of a recovery voltage. The horizontal axis in FIG. 5A represents the reverse surge power capability (indicated as “P _RSM ” in FIG. 5A. Unit: kW), and the vertical axis represents the percentage. In FIG. 5B, the horizontal axis indicates time (unit: ns), and the vertical axis indicates voltage (unit: V). 5 is a graph shown in order to compare the characteristics of the semiconductor device according to the example and the characteristics of the semiconductor device according to Comparative Examples 1 and 2; 6 (a) is a graph showing the _V F -I _F characteristics, FIG. 6 (b) is a graph showing a _V F _{-Q rr} tradeoff characteristic. In FIG. 6A, the horizontal axis represents V _F (unit: V), and the vertical axis represents I _F (unit: A). In FIG. 6B, the horizontal axis indicates V _F (unit: V), and the vertical axis indicates Q _rr (unit: nC). It is sectional drawing of the semiconductor device 2 which concerns on a modification.

  Hereinafter, a semiconductor device, a method for manufacturing a semiconductor device, and a power conversion circuit of the present invention will be described based on embodiments shown in the drawings. Each drawing showing the structure is a schematic diagram and does not necessarily reflect the actual structure, configuration, or the like. The embodiments described below do not limit the invention according to the claims. In addition, all the elements and combinations described in the embodiments are not necessarily essential for the solution means of the present invention.

[Embodiment]
1. Configuration of Semiconductor Device 1 First, the configuration of the semiconductor device 1 according to the first embodiment will be described.
The semiconductor device 1 according to the embodiment is a diode.
As shown in FIG. 1, the semiconductor device 1 according to the embodiment includes a semiconductor substrate 10, a main surface side structure 20, and an electrode 30.

  The semiconductor device 1 may include components other than those described above. However, they are not directly related to the present invention, and thus will not be described or illustrated.

The semiconductor substrate 10 includes a first conductivity type first region 12 and a first conductivity type second region 14 having an impurity concentration higher than that of the first region 12.
In the embodiment, the first conductivity type is an N type. As the first conductivity type impurity, for example, phosphorus can be used.
The impurity concentration in the first region 12 can be, for example, in the range of 5 × 10 ¹³ cm ⁻³ to 1 × 10 ¹⁶ cm ⁻³ . In the first region 12, the impurity concentration is basically uniform over the entire region. Note that this does not apply to regions formed later in the semiconductor device manufacturing process, such as a portion into which an impurity of the second conductivity type is introduced, such as a third region 22 described later.
The thickness of the first region 12 can be in the range of 75 μm to 120 μm, for example.

The boundary between the first region 12 and the second region 14 is a place where the impurity concentration starts to increase from the value of the impurity concentration of the first region 12. Therefore, the impurity concentration in the second region 14 is changed from the impurity concentration at the boundary between the first region 12 and the second region 14 (substantially the same concentration as the impurity concentration in the first region 12) to the main surface of the second region 14. It becomes higher as it goes to the side (electrode 30 side) (see FIG. 4 described later).
The impurity concentration at the end of the second region 14 on the electrode 30 side can be, for example, in the range of 1 × 10 ¹⁹ cm ⁻³ to 1 × 10 ²¹ cm ⁻³ .
The thickness of the 2nd field 14 can be in the range of 75 micrometers-175 micrometers, for example.

  In the semiconductor device 1, the sum of the thickness of the first region 12 and the thickness of the second region 14 (the thickness of the semiconductor substrate 10) is in the range of 150 μm to 250 μm.

In the semiconductor device 1, when the thickness of the first region 12 is Wa and the thickness of the second region 14 is Wb, the relationship of 0.6 ≦ Wa / Wb ≦ 0.9 is satisfied.
Further, in the semiconductor device 1, when the total thickness of the first region 12 and the second region 14 is Wt, the relationship of 0.4 ≦ Wa / Wt ≦ 0.5 is satisfied.

  In the semiconductor device 1, the distance from the depth position of the boundary between the first region 12 and the second region 14 to the depth position where the impurity concentration in the second region 14 is 1000 times the impurity concentration in the first region 12. (Evaluation distance) is in the range of 20 μm to 40 μm (see FIG. 4 described later).

  The main surface side structure 20 is formed from the main surface side of the first region 12 to the main surface of the first region 12. The main surface side structure 20 includes a third region 22, a conductor film 24, and an oxide film 26. The main surface side structure 20 in the semiconductor device 1 may be referred to as an MPS structure or a JBS structure.

Note that “the main surface side of the first region” can also be referred to as “a place inside the first region and close to the main surface of the first region”.
Further, “on the main surface of the first region” can also be referred to as “on the surface of the first region outside the first region”.

The third region 22 is a second conductivity type region selectively formed on the main surface side of the first region 12. In the embodiment, the second conductivity type is P type. As the second conductivity type impurity, for example, boron can be used. “Selectively formed third region” means that the third region 22 is formed in a partial region between the main surface of the first region 12 and the conductor film 24. For example, the third region 22 is formed in an island shape or a stripe shape when seen in a plan view.
The surface impurity concentration of the third region 22 can be set to, for example, 1 × 10 ¹⁶ cm ⁻³ to 1 × 10 ¹⁹ cm ⁻³ .
The first region 12 and the third region 22 form a PN junction.

The conductor film 24 is formed on the main surface of the first region 12 and is in contact with the first region 12 and the third region 22. The conductor film 24 is made of silicon-containing aluminum or platinum. The thickness of the conductor film 24 can be set to 1 μm to 5 μm, for example. The conductor film 24 in the semiconductor device 1 is sometimes referred to as a barrier metal.
The first region 12 and the conductor film 24 form a Schottky junction.
The conductor film 24 also serves as an anode electrode.
The oxide film 26 is formed on the main surface of the first region 12 so as to surround a portion of the conductor film 24 that is in contact with the semiconductor substrate 10. The oxide film 26 is made of, for example, SiO ₂ .

  The electrode 30 is a cathode electrode. The electrode 30 is made of nickel, for example. The thickness of the electrode 30 can be set to 2 μm, for example.

2. Semiconductor Device Manufacturing Method Next, a semiconductor device manufacturing method according to the embodiment will be described.
The manufacturing method of the semiconductor device according to the embodiment is a manufacturing method for manufacturing the semiconductor device 1 according to the first embodiment.

The method for manufacturing a semiconductor device according to the embodiment includes a semiconductor substrate preparation step S1, a main surface side structure formation step S2, and an electrode formation step S3.
In the present specification, a process having high relevance to the present invention will be described. That is, the entire semiconductor device is not necessarily manufactured only by the steps described in this specification. The method for manufacturing a semiconductor device of the present invention may include steps other than those described in this specification before and after the steps described in this specification and between the steps described in this specification.

  The semiconductor substrate preparation step S1, as shown in FIG. 2A, has a first conductivity type first region 12 and a first conductivity type second region 14 having an impurity concentration higher than that of the first region 12. The distance from the depth position of the boundary between the first region 12 and the second region 14 to the depth position where the impurity concentration in the second region 14 becomes 1000 times the impurity concentration in the first region 12 is 20 μm to 40 μm. This is a step of preparing the semiconductor substrate 10 within the range.

Moreover, since the semiconductor substrate 10 prepared in the semiconductor substrate preparation step S1 in the embodiment is for manufacturing the semiconductor device 1 according to the embodiment, the thickness and the impurity concentration have been described in the description regarding the semiconductor device 1. The same as the semiconductor substrate 10.
When describing the thickness again, the semiconductor substrate 10 prepared in the semiconductor substrate preparation step S1 has a total thickness of the first region 12 and the second region 14 (thickness of the semiconductor substrate 10) in the range of 150 μm to 250 μm. And satisfy the relationship of 0.6 ≦ Wa / Wb ≦ 0.9 and the relationship of 0.4 ≦ Wa / Wt ≦ 0.5.

The main surface side structure forming step S2 is a step of forming the main surface side structure 20 from the main surface side of the first region 12 to the main surface of the first region 12 as shown in FIG.
In the main surface side structure 20 in the embodiment, for example, a step of forming a mask or an oxide film (including the oxide film 26), a second conductivity type (P-type) impurity is selectively introduced into the semiconductor substrate 10 and the first structure 20 is formed. It can be formed by carrying out a step of forming the three regions 22, a step of performing a heat treatment, a step of forming the conductor film 24, and the like. The main surface side structure 20 itself is a known structure, and the steps described in the above examples are also known steps, and since the order and combination of performing the various steps are already known, detailed description thereof is omitted.

  The electrode forming step S3 is a step of forming the electrode 30 as shown in FIG. Since the electrode 30 in the embodiment has a known structure and can be formed by a known method, detailed description thereof is omitted.

  The semiconductor device 1 according to the embodiment can be manufactured by performing the method for manufacturing a semiconductor device according to the embodiment including at least the above steps.

3. Configuration of Power Conversion Circuit 100 Next, the power conversion circuit 100 according to the embodiment will be described.
As shown in FIG. 3, the power conversion circuit 100 according to the embodiment includes a semiconductor device 1 that is a diode, a switching element 110, an inductive load (reactor) 120, a power supply 130, and a smoothing capacitor 140. A load 150 is connected to an external terminal of the power conversion circuit 100.
The semiconductor device 1 is treated as a so-called free wheel diode.

The switching element 110 controls opening and closing of a circuit composed of the switching element 110, the inductive load 120, and the power supply 130. The switching element 110 in the embodiment is made of a MOSFET.
The switching element 110 performs switching in response to a clock signal applied to the gate electrode of the switching element 110 from a drive circuit (not shown). When the switching element 110 is turned on, a circuit including the switching element 110, the inductive load 120, and the power source 130 is closed, and a current from the power source 130 flows through the inductive load 120.

The inductive load 120 is a passive element (inductor) that can store energy in a magnetic field formed by an electric current.
The anode of the power source 130 is electrically connected to one end of the inductive load 120, and the negative electrode of the power source 130 is electrically connected to the source electrode of the switching element 110. The drain electrode of the switching element 110 is electrically connected to the other end of the inductive load 120 and the electrode 30 (anode electrode) of the semiconductor device 1.

4). Effects of Semiconductor Device 1, Semiconductor Device Manufacturing Method, and Power Conversion Circuit According to Embodiments Hereinafter, effects of the semiconductor device 1, the semiconductor device manufacturing method, and the power conversion circuit according to the embodiments will be described.

First, in the semiconductor device 1 according to the embodiment, since the evaluation distance is 20 μm or more, the evaluation distance becomes longer (concentration gradient becomes gentler) than a semiconductor device including a semiconductor substrate formed from an Epi wafer. ).
For this reason, according to the semiconductor device 1 according to the embodiment, it is possible to suppress reach through at a low voltage and to perform soft recovery at the time of recovery. As a result, as shown in an example described later, the reverse surge It is possible to suppress a decrease in power withstand capability and to suppress noise generation during recovery.

Further, in the semiconductor device 1 according to the embodiment, the evaluation distance is 40 μm or less, and therefore the evaluation distance is shorter (concentration gradient is steep) compared to a semiconductor device including a semiconductor substrate formed from a conventional diffusion wafer. Becomes).
For this reason, in the semiconductor device 1 according to the embodiment, the second region 14 can be made thinner as compared with a semiconductor device including a semiconductor substrate formed from a conventional diffusion wafer. As can be seen, increase in the forward voltage (V _F ) can be suppressed and deterioration of the V _F -Q _rr trade-off can be suppressed.

Therefore, the semiconductor device 1 according to the embodiment has a reverse surge power resistance, noise generation suppression at the time of recovery, a forward voltage, and V as compared with a semiconductor device including a semiconductor substrate formed from a wafer having a general configuration. It becomes a semiconductor device capable of juxtaposing all the characteristics of the _F- Q _rr trade-off at a high level.

In addition, according to the semiconductor device 1 according to the embodiment, it is possible to suppress a reduction in reverse surge power withstand capability without increasing the thickness of the first region 12 or adopting a complicated configuration such as inclination / double Epi. And noise during recovery can be suppressed. For this reason, according to the semiconductor device 1 which concerns on embodiment, compared with the semiconductor device provided with the semiconductor base | substrate formed from the Epi wafer which made the 1st area | region thick or employ | adopted the complicated structure, forward voltage ( It is possible to achieve a reduction in V _F ) and cost reduction.

  In addition, according to the semiconductor device 1 according to the embodiment, the diffusion depth of the N-type impurity viewed from the main surface side of the second region 14 compared to a semiconductor device including a semiconductor substrate formed from a conventional diffusion wafer. It can be shallow (in other words, there is no need to increase the diffusion depth). For this reason, according to the semiconductor device 1 according to the embodiment, it is possible to achieve cost reduction and improvement in variation in characteristics as compared with a semiconductor device including a semiconductor substrate formed from a conventional diffusion wafer.

In the semiconductor device 1 according to the embodiment, the thickness of the semiconductor substrate 10 is in the range of 150 μm to 250 μm. According to the semiconductor device 1 according to the embodiment, since the thickness of the semiconductor substrate 10 is 150 μm or more, it becomes possible to ensure a sufficient breakdown voltage by sufficiently securing the thickness of the semiconductor substrate 10, It is possible to suppress the occurrence of a situation where the semiconductor substrate 10 is destroyed during manufacturing (so-called wafer cracking). Moreover, in the semiconductor device 1 according to the embodiment, since the thickness of the semiconductor substrate 10 is 250 μm or less, an increase in the forward voltage (V _F ) is further suppressed, and the characteristics of the semiconductor device 1 are further enhanced. Can be juxtaposed.

Further, according to the semiconductor device 1 according to the embodiment, the semiconductor device 1 is a diode, and the main surface side structure 20 is a second conductivity type second electrode selectively formed on the main surface side of the first region 12. Since the three regions 22 and the conductor film 24 in contact with the first region 12 and the third region 22 are provided, it is possible to further suppress the reduction of the reverse surge power withstand capability, and the forward voltage V _F can be further reduced.

  In addition, according to the semiconductor device 1 according to the embodiment, the conductor film 24 is made of silicon-containing aluminum or platinum, so that it operates in comparison with the case where a conductor film made of aluminum that is often used conventionally is used. It becomes possible to improve the reverse direction characteristic at the time (at high temperature).

  In the semiconductor device 1 according to the embodiment, the relationship of 0.6 ≦ Wa / Wb ≦ 0.9 is satisfied. According to the semiconductor device 1 according to the embodiment, since the relationship of 0.6 ≦ Wa / Wb is satisfied, the thickness of the semiconductor substrate 10 can be sufficiently reduced by sufficiently thinning the second region 14. . Further, according to the semiconductor device 1 according to the embodiment, in order to satisfy the relationship of Wa / Wb ≦ 0.9, the characteristics and the breakdown voltage of the semiconductor device 1 are reduced without excessively thinning the second region 14. It can be sufficiently suppressed.

  In the semiconductor device 1 according to the embodiment, the relationship of 0.4 ≦ Wa / Wt ≦ 0.5 is satisfied. According to the semiconductor device 1 according to the embodiment, in order to satisfy the relationship of 0.4 ≦ Wa / Wt, the thickness of the first region 12 in the semiconductor substrate 10 is sufficiently ensured and the performance as the semiconductor device is sufficiently obtained. It can be secured. Further, according to the semiconductor device 1 according to the embodiment, in order to satisfy the relationship of Wa / Wt ≦ 0.5, the characteristics of the semiconductor device 1 and the second region 14 and the semiconductor substrate 10 should not be excessively thinned. It is possible to sufficiently suppress the decrease in breakdown voltage.

  Since the semiconductor device manufacturing method according to the embodiment includes the semiconductor substrate preparation step S1 for preparing the semiconductor substrate 10 having an evaluation distance in the range of 20 μm to 40 μm, the semiconductor device 1 according to the embodiment can be manufactured. This is a method for manufacturing a semiconductor device.

In the power conversion circuit 100 according to the embodiment, since the diode in the circuit is the semiconductor device 1 according to the embodiment, the reverse surge power resistance, noise generation suppression during recovery, the forward voltage, and the V _F -Q _rr trade-off Thus, a high-quality power conversion circuit including the semiconductor device 1 capable of arranging all the characteristics of the above in parallel at a high level is obtained.

[Example]
Hereinafter, the semiconductor device according to the present invention will be described based on the result of actually measuring the characteristics.

  In order to confirm the effect of the semiconductor device of the present invention, the inventor of the present invention has a configuration similar to that of the semiconductor device 1 according to the embodiment (hereinafter referred to as a semiconductor device according to an example), an Epi wafer. A semiconductor device (hereinafter referred to as a semiconductor device according to Comparative Example 1) including a semiconductor substrate formed from the above and a semiconductor device (hereinafter referred to as a semiconductor device according to Comparative Example 2) including a semiconductor substrate formed from a conventional diffusion wafer. 3 types of semiconductor devices were prepared, and their characteristics were measured.

  The semiconductor device according to the example and the semiconductor devices according to comparative examples 1 and 2 have the same configuration with respect to points (main surface side structure, etc.) other than the configuration of the semiconductor substrate (thickness and impurity concentration distribution). It was.

In order to facilitate the evaluation of the results, the impurity concentration in the first region of each semiconductor device is the same. Specifically, the impurity concentration was set to 1 × 10 ¹⁴ cm ⁻³ in all semiconductor devices (see reference symbol Ca in FIG. 4).
Therefore, 1000 times the impurity concentration in the first region is 1 × 10 ¹⁷ cm ⁻³ (see the symbol Cb in FIG. 4).

In the semiconductor device according to the example, the distance from the depth position of the boundary between the first region and the second region to the depth position where the impurity concentration in the second region becomes 1000 times the impurity concentration in the first region ( Evaluation distance) is about 29 μm (within a range of 20 μm to 40 μm) (see reference numeral D1 in FIG. 4).
On the other hand, the evaluation distance is about 5 μm in the semiconductor device according to Comparative Example 1 (see reference symbol D2 in FIG. 4), and the evaluation distance is about 48 μm in the semiconductor device according to Comparative Example 2 (reference symbol D3 in FIG. 4). reference.).

In order to facilitate the evaluation of the results, the thickness Wa of the first region of each semiconductor device is the same. As the thickness Wb of the second region, a thickness that is considered appropriate for each semiconductor device, that is, a thickness that is considered appropriate for the operation of each semiconductor device is employed.
Specifically, the thickness Wa of the first region is 90 μm in all the semiconductor devices.
The thickness Wb of the second region was 110 μm in the semiconductor device according to the example, 525 μm in the semiconductor device according to Comparative Example 1, and 175 μm in the semiconductor device according to Comparative Example 2.

Specifically, in the semiconductor device according to the example, Wa / Wb = 0.82 and Wa / Wt = 0.45.
In the semiconductor device according to Comparative Example 1, Wa / Wb≈0.17 and Wa / Wt≈0.15.
In the semiconductor device according to Comparative Example 2, Wa / Wb≈0.51 and Wa / Wt≈0.34.

First, the reverse surge power capability (P _RSM ) distribution was measured for the semiconductor device according to the example and the semiconductor device according to comparative example 1. The measurement was performed according to JEITA standard ED-4511B, page 17, 4.2.5 Triangular wave method.
As a result, as shown in FIG. 5A, the reverse surge power withstand capability of the semiconductor device according to Comparative Example 1 was extremely low (approximately 1 kW or less), whereas that of the semiconductor device according to the example was The reverse surge power capability was about 8 kW to 10 kW, which was confirmed to be a sufficiently high value. For this reason, it can be said that the semiconductor device according to the example is superior in characteristics regarding the reverse surge power withstand capability as compared with the semiconductor device according to Comparative Example 1.

Next, the recovery voltage waveform was measured for the semiconductor device according to the example and the semiconductor device according to comparative example 1. The measurement was performed by a conventional method. Measurement conditions _{were I F = 30a, V R =} 600V, -di / dt = 250A / μs.
As a result, as shown in FIG. 5B, a large voltage noise is generated in the semiconductor device according to Comparative Example 1, whereas the voltage noise is very small in the semiconductor device according to the example. It could be confirmed. For this reason, it can be said that the semiconductor device according to the example is superior in characteristics related to noise reduction during recovery as compared with the semiconductor device according to Comparative Example 1.

Next, a semiconductor device according to a semiconductor device and Comparative Examples 1 and 2 according to the embodiment, the forward voltage - measured forward current characteristics (V _F -I _F characteristics). The measurement was performed by a conventional method.
Semiconductor As a result, as shown in FIG. _{6 (a), V F -I} F characteristics of the semiconductor device according to the embodiment of close to V _F -I _F characteristics of the semiconductor device according to Comparative Example 1, according to Comparative Example 2 it was confirmed that it is possible to sufficiently reduce the V _F per I _F as compared to device. For this reason, it can be said that the semiconductor device according to the example is superior in characteristics regarding the forward voltage as compared with the semiconductor device according to Comparative Example 2.

Furthermore, the trade-off between V _F and Q _rr was calculated for the semiconductor device according to the example and the semiconductor devices according to comparative examples 1 and 2.
As a result, as shown in FIG. 6B, the V _F -Q _rr trade-off characteristic of the semiconductor device according to the example is close to the V _F -Q _rr trade-off characteristic of the semiconductor device according to Comparative Example 1, it was confirmed that it is possible to sufficiently reduce the V _F as compared with the semiconductor device according to Comparative example 2. For this reason, it can be said that the semiconductor device according to the example is superior in the V _F -Q _rr trade-off characteristic as compared with the semiconductor device according to Comparative Example 2.

From the above results, the semiconductor device of the present invention has a reverse surge power withstand capability, suppression of noise generation during recovery, forward voltage, and a semiconductor device including a semiconductor substrate formed from a wafer having a general configuration. It has been confirmed that the semiconductor device is capable of paralleling all the characteristics of the V _F -Q _rr trade-off at a high level.

  As mentioned above, although this invention was demonstrated based on said embodiment, this invention is not limited to said embodiment. The present invention can be implemented in various modes without departing from the spirit thereof, and for example, the following modifications are possible.

(1) The shape, number, position, and the like of the constituent elements described in the above embodiment are exemplifications, and can be changed within a range not impairing the effects of the present invention.

(2) In the above embodiment, the main surface side structure 20 includes the third region 22 of the second conductivity type selectively formed on the main surface side of the first region 12, the first region 12, and the third region. However, the present invention is not limited to this. For example, like the semiconductor device 2 shown in FIG. 7, another main surface side structure may be provided. The semiconductor device 2 according to the modification shown in FIG. 7 is a PN junction type diode, and the main surface side structure 40 includes a P-type third region 42, a conductor film 44, and an oxide film 26.

(3) In the semiconductor device of the present invention, a lifetime killer (structural defect) may be formed (introduced) in the semiconductor substrate.

(4) The present invention is established even when the N-type and the P-type are opposite to the above embodiments.

(5) In each of the above embodiments, the semiconductor device is a diode, but the present invention is not limited to this. The present invention can also be applied to other semiconductor devices such as various transistors, thyristors, and triacs. However, when the semiconductor device of the present invention is applied to the power conversion circuit of the present invention, the semiconductor device is a diode.

DESCRIPTION OF SYMBOLS 1, 2 ... Semiconductor device, 10 ... Semiconductor base | substrate, 12 ... 1st area | region, 14 ... 2nd area | region, 20, 40 ... Main surface side structure, 22, 42 ... 3rd area | region, 24, 44 ... Conductor film | membrane, 26 DESCRIPTION OF SYMBOLS ... Oxide film, 30 ... Electrode, 100 ... Power conversion circuit, 110 ... Switching element, 120 ... Inductive load, 130 ... Power source, 140 ... Smoothing capacitor, 150 ... Load

Claims (8)

A semiconductor substrate having a first region of a first conductivity type and a second region having a first conductivity type and an impurity concentration higher than that of the first region;
A main surface side structure formed over the main surface of the first region from the main surface side of the first region,
The distance from the depth position of the boundary between the first region and the second region to the depth position where the impurity concentration in the second region becomes 1000 times the impurity concentration in the first region is 20 μm to 40 μm A semiconductor device characterized by being in a range.   2. The semiconductor device according to claim 1, wherein a sum of a thickness of the first region and a thickness of the second region is in a range of 150 μm to 250 μm. The semiconductor device is a diode,
The main surface side structure includes a third region of a second conductivity type that is selectively formed on the main surface side of the first region, and a conductor film in contact with the first region and the third region. The semiconductor device according to claim 1, further comprising:   The semiconductor device according to claim 3, wherein the conductor film is made of silicon-containing aluminum or platinum. When the thickness of the first region is Wa and the thickness of the second region is Wb,
The semiconductor device according to claim 1, wherein a relationship of 0.6 ≦ Wa / Wb ≦ 0.9 is satisfied. When the thickness of the first region is Wa, and the total of the thickness of the first region and the thickness of the second region is Wt,
The semiconductor device according to claim 1, wherein a relationship of 0.4 ≦ Wa / Wt ≦ 0.5 is satisfied. A first conductivity type first region and a first conductivity type and a second region having an impurity concentration higher than that of the first region, the first region from the depth position of the boundary between the first region and the second region; A semiconductor substrate preparation step of preparing a semiconductor substrate in which the distance to a depth position where the impurity concentration in the two regions is 1000 times the impurity concentration in the first region is in the range of 20 μm to 40 μm;
And a main surface side structure forming step of forming a main surface side structure from the main surface side of the first region to the main surface of the first region. A diode,
A switching element;
With inductive load,
The diode includes a first region of a first conductivity type, a semiconductor substrate having a first conductivity type and a second region having an impurity concentration higher than that of the first region, and the first region from the main surface side of the first region. A main surface side structure formed over the main surface of the first region, and the impurity concentration in the second region from the depth position of the boundary between the first region and the second region is equal to the impurity concentration in the first region. A power conversion circuit characterized in that a distance to a depth position that is 1000 times is in a range of 20 μm to 40 μm.

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