JP2019050263A - ウェーハの加工方法 - Google Patents
ウェーハの加工方法 Download PDFInfo
- Publication number
- JP2019050263A JP2019050263A JP2017173190A JP2017173190A JP2019050263A JP 2019050263 A JP2019050263 A JP 2019050263A JP 2017173190 A JP2017173190 A JP 2017173190A JP 2017173190 A JP2017173190 A JP 2017173190A JP 2019050263 A JP2019050263 A JP 2019050263A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- sealing material
- cutting groove
- alignment
- thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000003672 processing method Methods 0.000 title abstract description 6
- 239000003566 sealing material Substances 0.000 claims abstract description 42
- 238000000034 method Methods 0.000 claims abstract description 25
- 238000003384 imaging method Methods 0.000 claims abstract description 20
- 238000007789 sealing Methods 0.000 claims abstract description 13
- 230000001678 irradiating effect Effects 0.000 claims abstract description 3
- 230000001681 protective effect Effects 0.000 claims description 11
- 239000006229 carbon black Substances 0.000 description 9
- 230000002093 peripheral effect Effects 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 239000000565 sealant Substances 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 5
- 239000000377 silicon dioxide Substances 0.000 description 3
- ADCOVFLJGNWWNZ-UHFFFAOYSA-N antimony trioxide Chemical compound O=[Sb]O[Sb]=O ADCOVFLJGNWWNZ-UHFFFAOYSA-N 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 238000009966 trimming Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 239000008393 encapsulating agent Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 230000003760 hair shine Effects 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 229910000000 metal hydroxide Inorganic materials 0.000 description 1
- 150000004692 metal hydroxides Chemical class 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
- H01L21/3043—Making grooves, e.g. cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Dicing (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Grinding Of Cylindrical And Plane Surfaces (AREA)
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
- Constituent Portions Of Griding Lathes, Driving, Sensing And Control (AREA)
Abstract
Description
(1)半導体ウェーハ(以下、ウェーハと略称することがある)の表面にデバイス(回路)及びバンプと呼ばれる外部接続端子を形成する。
(2)ウェーハの表面側から分割予定ラインに沿ってウェーハを切削し、デバイスチップの仕上がり厚さに相当する深さの切削溝を形成する。
(3)ウェーハの表面をカーボンブラック入りの封止材で封止する。
(4)ウェーハの裏面側をデバイスチップの仕上がり厚さまで研削して切削溝中の封止材を露出させる。
(5)ウェーハの表面はカーボンブラック入りの封止材で封止されているため、ウェーハ表面の外周部分の封止材を除去してターゲットパターン等のアライメントマークを露出させ、このアライメントマークに基づいて切削すべき分割予定ラインを検出するアライメントを実施する。
(6)アライメントに基づいて、ウェーハの表面側から分割予定ラインに沿ってウェーハを切削して、表面及び全側面が封止材で封止された5Sモールドパッケージに分割する。
11 半導体ウェーハ
13 分割予定ライン
14,14A 切削ブレード
15 デバイス
16 アライメントユニット
17 電極バンプ
18 撮像ユニット
20 封止材
23 第1の切削溝
25 第2の切削溝
26 研削ユニット
27 デバイスチップ
31 斜光手段
34 研削ホイール
38 研削砥石
Claims (1)
- 交差して形成された複数の分割予定ラインによって区画された表面の各領域にそれぞれ複数のバンプを有するデバイスが形成されたウェーハの加工方法であって、
該ウェーハの表面側から該分割予定ラインに沿って第1の厚さを有する第1の切削ブレードによってデバイスチップの仕上がり厚さに相当する深さの第1の切削溝を形成する第1切削溝形成工程と、
該第1切削溝形成工程を実施した後、該第1の切削溝を含む該ウェーハの表面を封止材で封止する封止工程と、
該封止工程を実施した後、該ウェーハの表面側から可視光撮像手段によって該封止材を透過してアライメントマークを検出し、該アライメントマークに基づいて切削すべき該分割予定ラインを検出するアライメント工程と、
該アライメント工程を実施した後、該ウェーハの表面側から該分割予定ラインに沿って該第1の切削ブレードの該第1の厚さより小さい第2の厚さを有する第2の切削ブレードによって該第1の切削溝中の該封止材にデバイスチップの仕上がり厚さに相当する深さの第2の切削溝を形成する第2切削溝形成工程と、
該第2切削溝形成工程を実施した後、該ウェーハの表面に保護部材を貼着する保護部材貼着工程と、
該保護部材貼着工程を実施した後、該ウェーハの裏面側から該デバイスチップの仕上がり厚さまで該ウェーハを研削して該第2の切削溝を露出させ、該封止材によって表面及び4側面が囲繞された個々の該デバイスチップに分割する分割工程と、を備え、
該アライメント工程は、該可視光撮像手段によって撮像する領域に斜光手段によって斜めから光を照射しながら実施することを特徴とするウェーハの加工方法。
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017173190A JP6976651B2 (ja) | 2017-09-08 | 2017-09-08 | ウェーハの加工方法 |
KR1020180104535A KR102581127B1 (ko) | 2017-09-08 | 2018-09-03 | 웨이퍼의 가공 방법 |
CN201811035752.6A CN109473394B (zh) | 2017-09-08 | 2018-09-06 | 晶片的加工方法 |
TW107131246A TWI766092B (zh) | 2017-09-08 | 2018-09-06 | 晶圓之加工方法 |
SG10201807753SA SG10201807753SA (en) | 2017-09-08 | 2018-09-07 | Wafer processing method |
DE102018215251.9A DE102018215251A1 (de) | 2017-09-08 | 2018-09-07 | Bearbeitungsverfahren für einen Wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017173190A JP6976651B2 (ja) | 2017-09-08 | 2017-09-08 | ウェーハの加工方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2019050263A true JP2019050263A (ja) | 2019-03-28 |
JP6976651B2 JP6976651B2 (ja) | 2021-12-08 |
Family
ID=65638756
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2017173190A Active JP6976651B2 (ja) | 2017-09-08 | 2017-09-08 | ウェーハの加工方法 |
Country Status (6)
Country | Link |
---|---|
JP (1) | JP6976651B2 (ja) |
KR (1) | KR102581127B1 (ja) |
CN (1) | CN109473394B (ja) |
DE (1) | DE102018215251A1 (ja) |
SG (1) | SG10201807753SA (ja) |
TW (1) | TWI766092B (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2021034393A (ja) * | 2019-08-13 | 2021-03-01 | 株式会社ディスコ | パッケージの製造方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012023259A (ja) * | 2010-07-16 | 2012-02-02 | Casio Comput Co Ltd | 半導体装置及びその製造方法 |
JP2014003274A (ja) * | 2012-05-25 | 2014-01-09 | Nitto Denko Corp | 半導体装置の製造方法及びアンダーフィル材 |
JP2017005056A (ja) * | 2015-06-08 | 2017-01-05 | 株式会社ディスコ | ウエーハの加工方法 |
JP2017117990A (ja) * | 2015-12-25 | 2017-06-29 | 株式会社ディスコ | ウエーハの加工方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0756877B2 (ja) * | 1990-01-24 | 1995-06-14 | 三菱電機株式会社 | 半導体装置のリード平坦性測定装置 |
JP2004200258A (ja) * | 2002-12-17 | 2004-07-15 | Shinko Electric Ind Co Ltd | バンプ検査装置および検査方法 |
JP5895332B2 (ja) * | 2010-04-01 | 2016-03-30 | 株式会社ニコン | 位置検出装置、重ね合わせ装置、位置検出方法およびデバイスの製造方法 |
JP5948034B2 (ja) | 2011-09-27 | 2016-07-06 | 株式会社ディスコ | アライメント方法 |
US9085685B2 (en) * | 2011-11-28 | 2015-07-21 | Nitto Denko Corporation | Under-fill material and method for producing semiconductor device |
JP2016015438A (ja) | 2014-07-03 | 2016-01-28 | 株式会社ディスコ | アライメント方法 |
JP2017028160A (ja) * | 2015-07-24 | 2017-02-02 | 株式会社ディスコ | ウエーハの加工方法 |
JP2017103405A (ja) * | 2015-12-04 | 2017-06-08 | 株式会社ディスコ | ウエーハの加工方法 |
-
2017
- 2017-09-08 JP JP2017173190A patent/JP6976651B2/ja active Active
-
2018
- 2018-09-03 KR KR1020180104535A patent/KR102581127B1/ko active IP Right Grant
- 2018-09-06 TW TW107131246A patent/TWI766092B/zh active
- 2018-09-06 CN CN201811035752.6A patent/CN109473394B/zh active Active
- 2018-09-07 SG SG10201807753SA patent/SG10201807753SA/en unknown
- 2018-09-07 DE DE102018215251.9A patent/DE102018215251A1/de active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012023259A (ja) * | 2010-07-16 | 2012-02-02 | Casio Comput Co Ltd | 半導体装置及びその製造方法 |
JP2014003274A (ja) * | 2012-05-25 | 2014-01-09 | Nitto Denko Corp | 半導体装置の製造方法及びアンダーフィル材 |
JP2017005056A (ja) * | 2015-06-08 | 2017-01-05 | 株式会社ディスコ | ウエーハの加工方法 |
JP2017117990A (ja) * | 2015-12-25 | 2017-06-29 | 株式会社ディスコ | ウエーハの加工方法 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2021034393A (ja) * | 2019-08-13 | 2021-03-01 | 株式会社ディスコ | パッケージの製造方法 |
JP7397598B2 (ja) | 2019-08-13 | 2023-12-13 | 株式会社ディスコ | パッケージの製造方法 |
Also Published As
Publication number | Publication date |
---|---|
SG10201807753SA (en) | 2019-04-29 |
DE102018215251A1 (de) | 2019-03-28 |
CN109473394B (zh) | 2023-07-18 |
CN109473394A (zh) | 2019-03-15 |
JP6976651B2 (ja) | 2021-12-08 |
TWI766092B (zh) | 2022-06-01 |
KR20190028310A (ko) | 2019-03-18 |
TW201913869A (zh) | 2019-04-01 |
KR102581127B1 (ko) | 2023-09-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN109473396B (zh) | 晶片的加工方法 | |
KR102631711B1 (ko) | 웨이퍼의 가공 방법 | |
KR102581138B1 (ko) | 웨이퍼의 가공 방법 | |
KR102581132B1 (ko) | 웨이퍼의 가공 방법 | |
JP7009027B2 (ja) | ウェーハの加工方法 | |
KR102581127B1 (ko) | 웨이퍼의 가공 방법 | |
KR102619266B1 (ko) | 웨이퍼의 가공 방법 | |
KR102627958B1 (ko) | 웨이퍼의 가공 방법 | |
JP7013084B2 (ja) | ウェーハの加工方法 | |
KR102627412B1 (ko) | 웨이퍼의 가공 방법 | |
KR102581128B1 (ko) | 웨이퍼의 가공 방법 | |
KR102631706B1 (ko) | 웨이퍼의 가공 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20200703 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20210621 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20210629 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20210823 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20211109 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20211109 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6976651 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |