JP2019046961A - Suction nozzle, visual inspection device including the same, and method of manufacturing circuit board - Google Patents

Suction nozzle, visual inspection device including the same, and method of manufacturing circuit board Download PDF

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JP2019046961A
JP2019046961A JP2017168264A JP2017168264A JP2019046961A JP 2019046961 A JP2019046961 A JP 2019046961A JP 2017168264 A JP2017168264 A JP 2017168264A JP 2017168264 A JP2017168264 A JP 2017168264A JP 2019046961 A JP2019046961 A JP 2019046961A
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semiconductor chip
suction
electronic component
suction nozzle
back surface
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勝俣　正史
Masashi Katsumata
正史 勝俣
松本　孝雄
Takao Matsumoto
孝雄 松本
俊也 塩島
Toshiya Shiojima
俊也 塩島
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TDK Corp
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    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
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    • B65G—TRANSPORT OR STORAGE DEVICES, e.g. CONVEYORS FOR LOADING OR TIPPING, SHOP CONVEYOR SYSTEMS OR PNEUMATIC TUBE CONVEYORS
    • B65G47/00—Article or material-handling devices associated with conveyors; Methods employing such devices
    • B65G47/74—Feeding, transfer, or discharging devices of particular kinds or types
    • B65G47/90—Devices for picking-up and depositing articles or materials
    • B65G47/91—Devices for picking-up and depositing articles or materials incorporating pneumatic, e.g. suction, grippers

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Abstract

To provide a suction nozzle suitable for detecting breaks and cracks generated in a flat plate-like electronic component such as a semiconductor chip.SOLUTION: A suction nozzle includes: a suction surface 121 in contact with a principal surface C1 of a semiconductor chip C; and suction ports 122a-122d provided on the suction surface 121. The suction surface 121 has a convex shape. Accordingly, when the principal surface C1 of the semiconductor chip C is sucked by the suction ports 122a-122d, the principal surface C1 of the semiconductor chip C is deformed into a concave shape, and a rear surface C2 of the semiconductor chip C is deformed into a convex shape, while reflecting the convex shape of the suction surface 121. Thus, when the semiconductor chip C is sucked, the rear surface C2 is deformed into a convex shape, so that breaks and cracks generated in the rear surface C2 can be expanded. Consequently, breaks and cracks generated in the rear surface C2 of the semiconductor chip C can be easily detected by an appearance inspection device.SELECTED DRAWING: Figure 6

Description

本発明は吸着ノズル及びこれを備える外観検査装置に関し、特に、平板状の電子部品を吸着するための吸着ノズル及びこれを備える外観検査装置に関する。また、本発明は、このような外観検査装置を用いた回路基板の製造方法に関する。   The present invention relates to a suction nozzle and an appearance inspection apparatus including the same, and more particularly, to a suction nozzle for sucking a flat electronic component and an appearance inspection apparatus including the suction nozzle. The present invention also relates to a circuit board manufacturing method using such an appearance inspection apparatus.

回路基板の製造工程などにおいては、基板に実装する電子部品を吸着し搬送するための吸着ノズルが広く用いられている。吸着ノズルの吸着面は、電子部品を正しく吸着できるよう、電子部品に合わせた形状が用いられる。一例として、特許文献１には、凸型形状を有する電子部品を正しく吸着できるよう、吸着面を凹型形状とした吸着ノズルが開示されている。また、特許文献２に記載されているように、半導体チップを吸着するための吸着ノズルは、吸着面が平坦であることが一般的である。   In a manufacturing process of a circuit board or the like, a suction nozzle for sucking and transporting an electronic component mounted on the board is widely used. The suction surface of the suction nozzle is shaped to match the electronic component so that the electronic component can be correctly suctioned. As an example, Patent Document 1 discloses a suction nozzle having a concave suction surface so that an electronic component having a convex shape can be correctly suctioned. Further, as described in Patent Document 2, a suction nozzle for sucking a semiconductor chip generally has a flat suction surface.

従来の半導体チップは、厚みが約７５０μｍであるシリコンウェーハをダイシングしたままの状態でパッケージング又は実装されていたことから、機械的強度が十分に保たれており、反りなどもほとんど発生しなかった。しかしながら、近年においては、半導体チップを裏面側から研削することによって、厚みを例えば１００μｍ以下に薄型化加工されることがある。半導体チップを薄型化すると、半導体材料の熱膨張係数と樹脂や導体層などの熱膨張係数の差に起因する応力バランスによって、半導体チップそのものが凹型形状に変形してしまうケースも発生していた。   Since the conventional semiconductor chip was packaged or mounted with the silicon wafer having a thickness of about 750 μm being diced, the mechanical strength was sufficiently maintained, and there was almost no warping. . However, in recent years, the semiconductor chip is sometimes ground to a thickness of, for example, 100 μm or less by grinding the semiconductor chip from the back side. When the semiconductor chip is made thinner, there is a case where the semiconductor chip itself is deformed into a concave shape due to a stress balance caused by a difference between the thermal expansion coefficient of the semiconductor material and the thermal expansion coefficient of the resin or the conductor layer.

また、半導体チップに割れやヒビが生じている場合、パッケージング前又は実装前にこれを検出する必要がある。このため、回路基板の製造工程などにおいては、カメラを用いた外観検査装置によって半導体チップの外観検査が行われ、割れやヒビが発生している半導体チップは不良品として廃棄される。   Further, when a crack or crack occurs in the semiconductor chip, it is necessary to detect this before packaging or before mounting. For this reason, in the manufacturing process of the circuit board and the like, the appearance inspection of the semiconductor chip is performed by the appearance inspection apparatus using a camera, and the semiconductor chip in which cracks or cracks are generated is discarded as a defective product.

特開２００２−２８３２６５号公報JP 2002-283265 A 特開２０１７−０５９７３６号公報JP 2017-059736 A

しかしながら、凹型に変形した半導体チップをフラットな吸着面で吸着すると、凹型形状が平面に矯正されるためクラックが見にくくなり、外観検査装置によって正しく検出できないケースがあった。   However, when a semiconductor chip deformed into a concave shape is sucked with a flat suction surface, the concave shape is corrected to a flat surface, so that cracks are difficult to see and there are cases in which it cannot be detected correctly by an appearance inspection apparatus.

したがって、本発明は、半導体チップなどの平板状の電子部品に生じている割れやヒビの検出に適した吸着ノズルこれを備える外観検査装置、並びに、回路基板の製造方法を提供することである。   Accordingly, an object of the present invention is to provide a suction nozzle suitable for detecting cracks and cracks generated in a flat electronic component such as a semiconductor chip, and an appearance inspection apparatus including the suction nozzle, and a circuit board manufacturing method.

本発明による吸着ノズルは、上面及び裏面を有する平板状の電子部品の前記上面を吸着するための吸着ノズルであって、前記電子部品の前記上面と接する吸着面と、前記吸着面に設けられた吸引口とを備え、前記吸着面は凸面形状を有し、これにより、前記吸引口によって前記電子部品の前記上面を吸引した場合に、前記吸着面の前記凸面形状を反映して、前記電子部品の前記上面が凹面に変形し、前記電子部品の前記裏面が凸面に変形することを特徴とする。   An adsorption nozzle according to the present invention is an adsorption nozzle for adsorbing the upper surface of a flat plate-like electronic component having an upper surface and a back surface, and is provided on the adsorption surface in contact with the upper surface of the electronic component and the adsorption surface The suction surface has a convex shape, and thus when the upper surface of the electronic component is sucked by the suction port, the convex shape of the suction surface is reflected to reflect the electronic component. The upper surface of the electronic component is deformed into a concave surface, and the back surface of the electronic component is deformed into a convex surface.

本発明によれば、平板状の電子部品を吸着すると裏面が凸面に変形することから、裏面に生じている割れやヒビを拡大することができる。このため、電子部品に生じている割れやヒビを外観検査装置によって容易に検出することが可能となる。電子部品の種類については特に限定されないが、割れやヒビが生じやすい半導体チップを対象とすることができる。この場合、電子部品の上面は半導体チップの主面であり、電子部品の裏面は半導体チップの研削された裏面であっても構わない。これによれば、裏面に多数の研削痕が存在する場合であっても、割れやヒビを確実に検出することが可能となる。   According to the present invention, when a flat electronic component is attracted, the back surface is deformed into a convex surface, so that cracks and cracks generated on the back surface can be enlarged. For this reason, it becomes possible to detect easily the crack and the crack which have arisen in the electronic component with an external appearance inspection apparatus. The type of electronic component is not particularly limited, but it is possible to target a semiconductor chip that is likely to be cracked or cracked. In this case, the upper surface of the electronic component may be the main surface of the semiconductor chip, and the back surface of the electronic component may be the ground back surface of the semiconductor chip. According to this, even if there are many grinding marks on the back surface, it becomes possible to reliably detect cracks and cracks.

本発明において、吸引口は吸着面の中心から離れた位置に放射状に複数個配置されていても構わない。これによれば、平板状の電子部品を確実に変形させることが可能となる。   In the present invention, a plurality of suction ports may be arranged radially at positions away from the center of the suction surface. According to this, it becomes possible to deform | transform a flat electronic component reliably.

本発明による外観検査装置は、上記の吸着ノズルと、吸着ノズルによって吸着された電子部品の裏面を凸面に変形した状態で撮影するカメラとを備えることを特徴とする。本発明によれば、電子部品の裏面に生じている割れやヒビを確実に検出することが可能となる。   An appearance inspection apparatus according to the present invention includes the above-described suction nozzle and a camera that captures an image in a state where the back surface of the electronic component sucked by the suction nozzle is deformed into a convex surface. According to the present invention, it is possible to reliably detect cracks and cracks generated on the back surface of an electronic component.

本発明による回路基板の製造方法は、上記の外観検査装置を用いて電子部品の良否判定を行う検査工程と、検査工程によって良品であると判定された電子部品を基板に実装する実装工程とを備えることを特徴とする。本発明によれば、誤って不良品を実装することがないため、回路基板の歩留まりを高めることが可能となる。   The circuit board manufacturing method according to the present invention includes an inspection process for determining the quality of an electronic component using the visual inspection apparatus described above, and a mounting process for mounting the electronic component determined to be a non-defective product by the inspection process on the substrate. It is characterized by providing. According to the present invention, since defective products are not mounted by mistake, the yield of circuit boards can be increased.

このように、本発明によれば、半導体チップなどの平板状の電子部品に生じている割れやヒビの検出に適した吸着ノズルこれを備える外観検査装置、並びに、回路基板の製造方法を提供することが可能となる。   Thus, according to the present invention, there are provided an inspection nozzle equipped with a suction nozzle suitable for detecting cracks and cracks occurring in a flat electronic component such as a semiconductor chip, and a circuit board manufacturing method. It becomes possible.

図１は、本発明の好ましい実施形態による回路基板製造装置１００の構成を説明するための模式図である。FIG. 1 is a schematic diagram for explaining a configuration of a circuit board manufacturing apparatus 100 according to a preferred embodiment of the present invention. 図２は、回路基板製造装置１００を用いた回路基板の製造方法を説明するための図である。FIG. 2 is a diagram for explaining a circuit board manufacturing method using the circuit board manufacturing apparatus 100. 図３は、回路基板製造装置１００を用いた回路基板の製造方法を説明するための図である。FIG. 3 is a diagram for explaining a circuit board manufacturing method using the circuit board manufacturing apparatus 100. 図４は、回路基板製造装置１００を用いた回路基板の製造方法を説明するための図である。FIG. 4 is a diagram for explaining a circuit board manufacturing method using the circuit board manufacturing apparatus 100. 図５は、吸着ノズル１２０を吸着面１２１側から見た平面図である。FIG. 5 is a plan view of the suction nozzle 120 as viewed from the suction surface 121 side. 図６は、図５に示すＸ１−Ｘ２線に沿った断面図である。6 is a cross-sectional view taken along line X1-X2 shown in FIG. 図７は、図５に示すＹ１−Ｙ２線に沿った断面図である。FIG. 7 is a cross-sectional view taken along the line Y1-Y2 shown in FIG. 図８は、吸着ノズル１２０に半導体チップＣが吸着された状態を示す側面図である。FIG. 8 is a side view showing a state in which the semiconductor chip C is sucked to the suction nozzle 120. 図９は、半導体チップＣの裏面Ｃ２に欠陥Ｄが生じている様子を示す模式的な断面図であり、半導体チップＣがほぼ完全に平坦な状態である場合を示している。FIG. 9 is a schematic cross-sectional view showing a state in which a defect D occurs on the back surface C2 of the semiconductor chip C, and shows a case where the semiconductor chip C is almost completely flat. 図１０は、半導体チップＣの裏面Ｃ２に欠陥Ｄが生じている様子を示す模式的な断面図であり、半導体チップＣを湾曲させた場合を示している。FIG. 10 is a schematic cross-sectional view showing a state in which a defect D is generated on the back surface C2 of the semiconductor chip C, and shows a case where the semiconductor chip C is curved. 図１１は、半導体チップＣの裏面Ｃ２に欠陥Ｄが生じている様子を示す模式的な平面図であり、半導体チップＣがほぼ完全に平坦な状態である場合を示している。FIG. 11 is a schematic plan view showing a state in which a defect D occurs on the back surface C2 of the semiconductor chip C, and shows a case where the semiconductor chip C is almost completely flat. 図１２は、半導体チップＣの裏面Ｃ２に欠陥Ｄが生じている様子を示す模式的な平面図であり、半導体チップＣを湾曲させた場合を示している。FIG. 12 is a schematic plan view showing a state in which a defect D is generated on the back surface C2 of the semiconductor chip C, and shows a case where the semiconductor chip C is curved.

以下、添付図面を参照しながら、本発明の好ましい実施形態について詳細に説明する。   Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

図１は、本発明の好ましい実施形態による回路基板製造装置１００の構成を説明するための模式図である。   FIG. 1 is a schematic diagram for explaining a configuration of a circuit board manufacturing apparatus 100 according to a preferred embodiment of the present invention.

図１に示すように、本実施形態による回路基板製造装置１００は、ステージＳ１上に載置された平板状の半導体チップＣを吸着搬送するための吸着機構１１０と、吸着機構１１０をｚ方向に移動させる搬送機構１４０ｚと、吸着機構１１０をｘ方向に移動させる搬送機構１４０ｘと、半導体チップＣを撮影するカメラ１５０と、カメラ１５０による撮影画像に基づいて半導体チップＣの外観検査を行う検査装置１６０と、基板Ｂを載置するステージＳ２を備えている。ここで、吸着機構１１０、カメラ１５０及び検査装置１６０は、回路基板製造装置１００に含まれる外観検査装置を構成する。   As shown in FIG. 1, the circuit board manufacturing apparatus 100 according to the present embodiment includes a suction mechanism 110 for sucking and transporting a flat plate-like semiconductor chip C placed on a stage S1, and a suction mechanism 110 in the z direction. A transport mechanism 140z that moves, a transport mechanism 140x that moves the suction mechanism 110 in the x direction, a camera 150 that photographs the semiconductor chip C, and an inspection device 160 that inspects the appearance of the semiconductor chip C based on an image captured by the camera 150. And a stage S2 on which the substrate B is placed. Here, the suction mechanism 110, the camera 150, and the inspection apparatus 160 constitute an appearance inspection apparatus included in the circuit board manufacturing apparatus 100.

吸着機構１１０は、半導体チップＣを吸着する吸着ノズル１２０を備えており、真空ポンプ１３０によるバキューム動作によって吸着ノズル１２０の吸着面１２１に半導体チップＣを吸着させる。半導体チップＣは、裏面研削により薄型化されており、その厚みは例えば１００μｍ以下である。半導体チップＣはほぼ平板状であるが、厚みが例えば１００μｍ以下に薄型化されている場合、主面に形成された再配線層と裏面を構成するシリコン基板の熱膨張係数の差により、多少の湾曲が生じることがある。本明細書および特許請求の範囲において使用する「平板状」という文言は、表面が完全に平坦であることを要求するものではなく、多少の湾曲が生じている場合を含む概念である。   The adsorption mechanism 110 includes an adsorption nozzle 120 that adsorbs the semiconductor chip C, and adsorbs the semiconductor chip C on the adsorption surface 121 of the adsorption nozzle 120 by a vacuum operation by the vacuum pump 130. The semiconductor chip C is thinned by back grinding, and the thickness is, for example, 100 μm or less. The semiconductor chip C is substantially flat, but when the thickness is reduced to, for example, 100 μm or less, there is a slight difference due to the difference in the thermal expansion coefficient between the rewiring layer formed on the main surface and the silicon substrate constituting the back surface. Curvature may occur. The term “flat plate” used in the present specification and claims does not require that the surface be completely flat, but is a concept including a case where some curvature is generated.

回路基板製造装置１００を用いた回路基板の製造方法は次の通りである。まず、図１に示すように、吸着機構１１０をステージＳ１の直上に位置させた後、図２に示すように、搬送機構１４０ｚを用いて吸着機構１１０をｚ方向に降下させ、吸着ノズル１２０の吸着面１２１に半導体チップＣの主面Ｃ１を吸着させる。この状態で、搬送機構１４０ｚを用いて吸着機構１１０をｚ方向に再び上昇させた後、図３に示すように、搬送機構１４０ｘを用いて吸着機構１１０をｘ方向に移動させ、カメラ１５０の直上で停止させる。この状態で、半導体チップＣの裏面Ｃ２をカメラ１５０によって撮影し、その撮影画像を検査装置１６０によって解析することにより、半導体チップＣの良否判定を行う。良否判定は、半導体チップＣの裏面Ｃ２に割れやヒビが存在するか否かによって行う。   A circuit board manufacturing method using the circuit board manufacturing apparatus 100 is as follows. First, as shown in FIG. 1, after the suction mechanism 110 is positioned immediately above the stage S <b> 1, the suction mechanism 110 is lowered in the z direction using the transport mechanism 140 z as shown in FIG. The main surface C1 of the semiconductor chip C is attracted to the suction surface 121. In this state, after the suction mechanism 110 is lifted again in the z direction using the transport mechanism 140z, the suction mechanism 110 is moved in the x direction using the transport mechanism 140x as shown in FIG. Stop at. In this state, the back surface C2 of the semiconductor chip C is photographed by the camera 150, and the photographed image is analyzed by the inspection device 160, whereby the quality of the semiconductor chip C is determined. The quality determination is performed based on whether cracks or cracks are present on the back surface C2 of the semiconductor chip C.

そして、良否判定の結果、半導体チップＣが良品である（つまり、裏面Ｃ２に割れやヒビが存在しない）と判定されると、図４に示すように、搬送機構１４０ｘを用いて吸着機構１１０をｘ方向に移動させ、ステージＳ２の直上で停止させる。さらに、搬送機構１４０ｚを用いて吸着機構１１０をｚ方向に降下させることによって、吸着された半導体チップＣを基板Ｂに実装する。これにより、外観検査によって良品と判定された半導体チップＣが基板Ｂに実装されるため、半導体チップＣが実装された基板Ｂからなる回路基板の歩留まりを高めることが可能となる。   As a result of the pass / fail determination, if it is determined that the semiconductor chip C is a non-defective product (that is, there are no cracks or cracks on the back surface C2), the suction mechanism 110 is moved using the transport mechanism 140x as shown in FIG. Move in the x direction and stop just above the stage S2. Further, the sucked mechanism 110 is lowered in the z direction by using the transport mechanism 140z, so that the sucked semiconductor chip C is mounted on the substrate B. Thereby, since the semiconductor chip C determined to be a non-defective product by the appearance inspection is mounted on the substrate B, it is possible to increase the yield of the circuit substrate including the substrate B on which the semiconductor chip C is mounted.

尚、図１〜図４に示した吸着機構１１０の動作はあくまで一例であり、ｘ方向及びｚ方向に駆動されるだけでなく、ｙ方向に駆動されるものであっても構わないし、アームなどを用いて円弧状に駆動されるものであっても構わない。また、カメラ１５０による撮影時に吸着機構１１０を停止させる点も必須でなく、吸着機構１１０を所定の方向に駆動しながら撮影しても構わない。   The operation of the suction mechanism 110 shown in FIGS. 1 to 4 is merely an example, and may be driven not only in the x direction and the z direction but also in the y direction. It may be driven in a circular arc shape using In addition, it is not essential to stop the suction mechanism 110 when photographing with the camera 150, and the suction mechanism 110 may be photographed while being driven in a predetermined direction.

次に、吸着ノズル１２０の構造について説明する。   Next, the structure of the suction nozzle 120 will be described.

図５は吸着ノズル１２０を吸着面１２１側から見た平面図であり、図６は図５に示すＸ１−Ｘ２線に沿った断面図、図７は図５に示すＹ１−Ｙ２線に沿った断面図である。   5 is a plan view of the suction nozzle 120 viewed from the suction surface 121 side, FIG. 6 is a cross-sectional view taken along line X1-X2 shown in FIG. 5, and FIG. 7 is taken along line Y1-Y2 shown in FIG. It is sectional drawing.

図５〜図７に示すように、吸着ノズル１２０の吸着面１２１は凸面形状を有しており、吸着面１２１の凸面形状に沿って半導体チップＣを変形できるよう、分散配置された４つの吸引口１２２ａ〜１２２ｄが設けられている。本発明において吸引口の数が４つに限定されるものではないが、吸着面１２１の中心１２１ａから離れた位置に吸引口を放射状に複数個配置することによって、吸着面１２１の凸面形状に沿って半導体チップＣを変形させることができる。特に限定されるものではないが、吸着面１２１の凸面形状は、その曲率半径がほぼ一定であることが好ましい。これによれば、半導体チップＣを吸着面１２１により密着させることが可能となる。   As shown in FIG. 5 to FIG. 7, the suction surface 121 of the suction nozzle 120 has a convex shape, and four suctions arranged in a distributed manner so that the semiconductor chip C can be deformed along the convex shape of the suction surface 121. Ports 122a to 122d are provided. In the present invention, the number of suction ports is not limited to four, but by arranging a plurality of suction ports radially at positions away from the center 121a of the suction surface 121, along the convex shape of the suction surface 121. Thus, the semiconductor chip C can be deformed. Although not particularly limited, it is preferable that the convex shape of the suction surface 121 has a substantially constant curvature radius. According to this, the semiconductor chip C can be brought into close contact with the suction surface 121.

図８は、吸着ノズル１２０に半導体チップＣが吸着された状態を示す側面図である。   FIG. 8 is a side view showing a state in which the semiconductor chip C is sucked to the suction nozzle 120.

図８に示すように、半導体チップＣは、トランジスタなどの回路素子が形成された主面Ｃ１（上面）と、主面Ｃ１の反対側に位置する裏面Ｃ２を有し、その主面Ｃ１が吸着ノズル１２０の吸着面１２１に吸着される。そして、本実施形態においては、吸着ノズル１２０の吸着面１２１が凸面形状を有していることから、半導体チップＣの主面Ｃ１を吸着面１２１に吸着すると、吸着面１２１の凸面形状を反映して半導体チップＣの主面Ｃ１が凹面に変形し、且つ、半導体チップＣの裏面Ｃ２が凸面に変形する。このような変形は、半導体チップＣの厚みが薄いほど容易であり、例えば、１００μｍ以下に薄型化された半導体チップＣであれば、容易に変形させることが可能である。尚、吸着ノズル１２０を用いた半導体チップＣの変形は強制的な変形である必要はなく、自然な状態、つまり、外力が与えられていない状態で半導体チップＣがすでに変形している場合、この変形形状を維持するものであっても構わない。   As shown in FIG. 8, the semiconductor chip C has a main surface C1 (upper surface) on which circuit elements such as transistors are formed, and a back surface C2 located on the opposite side of the main surface C1, and the main surface C1 is adsorbed. It is sucked by the suction surface 121 of the nozzle 120. In this embodiment, since the suction surface 121 of the suction nozzle 120 has a convex shape, when the main surface C1 of the semiconductor chip C is suctioned to the suction surface 121, the convex shape of the suction surface 121 is reflected. Thus, the main surface C1 of the semiconductor chip C is deformed into a concave surface, and the back surface C2 of the semiconductor chip C is deformed into a convex surface. Such deformation is easier as the thickness of the semiconductor chip C is thinner. For example, if the semiconductor chip C is thinned to 100 μm or less, it can be easily deformed. Note that the deformation of the semiconductor chip C using the suction nozzle 120 does not have to be a forced deformation. If the semiconductor chip C is already deformed in a natural state, that is, when no external force is applied, You may maintain a deformation | transformation shape.

半導体チップＣを薄型化する方法としては、半導体チップＣの裏面Ｃ２を研削する方法が一般的である。しかしながら、半導体チップＣの裏面Ｃ２を研削すると、研削時や搬送時におけるダメージによって、半導体チップＣの裏面Ｃ２に割れやヒビが発生することがある。図９は、半導体チップＣの裏面Ｃ２に割れやヒビなどの欠陥Ｄが生じている様子を示す模式図であり、半導体チップＣをほぼ完全に平坦な状態とした場合には、裏面Ｃ２に露出する欠陥Ｄが閉じてしまい、画像認識によって欠陥Ｄを特定することが困難である。   As a method of thinning the semiconductor chip C, a method of grinding the back surface C2 of the semiconductor chip C is common. However, when the back surface C2 of the semiconductor chip C is ground, the back surface C2 of the semiconductor chip C may be cracked or cracked due to damage during grinding or transport. FIG. 9 is a schematic view showing a state in which a defect D such as a crack or a crack is generated on the back surface C2 of the semiconductor chip C. When the semiconductor chip C is almost completely flat, it is exposed to the back surface C2. The defect D to be closed is closed, and it is difficult to identify the defect D by image recognition.

しかしながら、本実施形態においては、半導体チップＣを吸着ノズル１２０に吸着すると、半導体チップＣの裏面Ｃ２が凸面に変形することから、図１０に示すように、裏面Ｃ２に露出する欠陥Ｄが開き、欠陥Ｄが顕在化する。つまり、平面図である図１１に示すように、半導体チップＣがほぼ完全に平坦な状態では、裏面Ｃ２をカメラ１５０で撮影しても、欠陥Ｄを画像認識することができないケースが多々存在するが、図１２に示すように、半導体チップＣを変形させた状態で裏面Ｃ２をカメラ１５０で撮影すれば、欠陥Ｄを容易に画像認識することが可能となる。   However, in this embodiment, when the semiconductor chip C is sucked to the suction nozzle 120, the back surface C2 of the semiconductor chip C is deformed into a convex surface, so that the defect D exposed on the back surface C2 opens as shown in FIG. The defect D becomes obvious. That is, as shown in FIG. 11 which is a plan view, there are many cases where the defect D cannot be recognized even if the back surface C2 is photographed by the camera 150 when the semiconductor chip C is almost completely flat. However, as shown in FIG. 12, if the back surface C2 is photographed by the camera 150 in a state where the semiconductor chip C is deformed, the image of the defect D can be easily recognized.

特に、薄型化された半導体チップＣは、裏面Ｃ２に無数の研削痕が存在することから、裏面Ｃ２に露出する欠陥Ｄが閉じていると、欠陥Ｄを画像認識することは困難である。しかしながら、上述の通り、本実施形態においては半導体チップＣの裏面Ｃ２を凸面に変形させた状態でカメラ１５０によって撮影していることから、欠陥Ｄを容易に画像認識することが可能となる。   In particular, since the thinned semiconductor chip C has numerous grinding marks on the back surface C2, it is difficult to recognize the image of the defect D when the defect D exposed on the back surface C2 is closed. However, as described above, in this embodiment, since the image is taken by the camera 150 with the back surface C2 of the semiconductor chip C deformed into a convex surface, the defect D can be easily recognized.

このように、本実施形態による吸着ノズル１２０は、吸着面１２１が凸面形状を有しており、これにより平板状の電子部品を変形させることが可能であることから、この状態で撮影を行うことにより、通常であれば認識することが困難な割れやヒビを容易に検出することが可能となる。   As described above, in the suction nozzle 120 according to the present embodiment, the suction surface 121 has a convex shape, and thus it is possible to deform the flat plate-shaped electronic component. Thus, it becomes possible to easily detect cracks and cracks that are normally difficult to recognize.

以上、本発明の好ましい実施形態について説明したが、本発明は、上記の実施形態に限定されることなく、本発明の主旨を逸脱しない範囲で種々の変更が可能であり、それらも本発明の範囲内に包含されるものであることはいうまでもない。   The preferred embodiments of the present invention have been described above, but the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention. Needless to say, it is included in the range.

例えば、上記実施形態では、吸着ノズル１２０を用いて半導体チップＣを吸着しているが、平板状であって吸着面１２１の凸面形状を反映した変形が可能な電子部品であれば、半導体チップに限定されず、他の電子部品を吸着対象とすることも可能である。   For example, in the above-described embodiment, the semiconductor chip C is sucked using the suction nozzle 120. However, if the electronic component is flat and can be deformed reflecting the convex shape of the suction surface 121, the semiconductor chip is attached to the semiconductor chip. It is not limited, and other electronic components can be picked up.

１００ 回路基板製造装置
１１０ 吸着機構
１２０ 吸着ノズル
１２１ 吸着面
１２１ａ 吸着面の中心
１２２ａ〜１２２ｄ 吸引口
１３０ 真空ポンプ
１４０ｘ，１４０ｚ 搬送機構
１５０ カメラ
１６０ 検査装置
Ｂ 基板
Ｃ 半導体チップ
Ｃ１ 半導体チップの主面（上面）
Ｃ２ 半導体チップの裏面
Ｄ 欠陥
Ｓ１，Ｓ２ ステージ DESCRIPTION OF SYMBOLS 100 Circuit board manufacturing apparatus 110 Suction mechanism 120 Suction nozzle 121 Suction surface 121a Suction surface center 122a-122d Suction port 130 Vacuum pump 140x, 140z Conveyance mechanism 150 Camera 160 Inspection apparatus B Substrate C Semiconductor chip C1 Main surface (upper surface) of semiconductor chip )
C2 Backside of semiconductor chip D Defects S1, S2 Stage

Claims (6)

上面及び裏面を有する平板状の電子部品の前記上面を吸着するための吸着ノズルであって、
前記電子部品の前記上面と接する吸着面と、前記吸着面に設けられた吸引口とを備え、
前記吸着面は凸面形状を有し、これにより、前記吸引口によって前記電子部品の前記上面を吸引した場合に、前記吸着面の前記凸面形状を反映して、前記電子部品の前記上面が凹面に変形し、前記電子部品の前記裏面が凸面に変形することを特徴とする吸着ノズル。 An adsorption nozzle for adsorbing the upper surface of a flat electronic component having an upper surface and a back surface,
A suction surface in contact with the upper surface of the electronic component, and a suction port provided in the suction surface,
The suction surface has a convex shape, whereby when the upper surface of the electronic component is sucked by the suction port, the upper surface of the electronic component is made concave to reflect the convex shape of the suction surface. The suction nozzle is deformed, and the back surface of the electronic component is deformed into a convex surface. 前記吸引口は、前記吸着面の中心から離れた位置に放射状に複数個配置されていることを特徴とする請求項１に記載の吸着ノズル。   The suction nozzle according to claim 1, wherein a plurality of the suction ports are radially arranged at positions away from the center of the suction surface. 請求項１又は２に記載の吸着ノズルと、
前記吸着ノズルによって吸着された前記電子部品の前記裏面を、凸面に変形した状態で撮影するカメラと、を備えることを特徴とする外観検査装置。 The suction nozzle according to claim 1 or 2,
An appearance inspection apparatus comprising: a camera that photographs the back surface of the electronic component sucked by the suction nozzle in a state of being deformed into a convex surface. 請求項３に記載の外観検査装置を用いて前記電子部品の良否判定を行う検査工程と、
前記検査工程によって良品であると判定された前記電子部品を基板に実装する実装工程と、を備えることを特徴とする回路基板の製造方法。 An inspection step of performing pass / fail determination of the electronic component using the appearance inspection apparatus according to claim 3;
And a mounting step of mounting the electronic component determined to be non-defective in the inspection step on the substrate. 前記電子部品が半導体チップであることを特徴とする請求項４に記載の回路基板の製造方法。   5. The circuit board manufacturing method according to claim 4, wherein the electronic component is a semiconductor chip. 前記電子部品の前記上面は前記半導体チップの主面であり、前記電子部品の前記裏面は前記半導体チップの研削された裏面であることを特徴とする請求項５に記載の回路基板の製造方法。   6. The method of manufacturing a circuit board according to claim 5, wherein the upper surface of the electronic component is a main surface of the semiconductor chip, and the back surface of the electronic component is a ground back surface of the semiconductor chip.
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