JP2018527676A5 - - Google Patents

Download PDF

Info

Publication number
JP2018527676A5
JP2018527676A5 JP2018511240A JP2018511240A JP2018527676A5 JP 2018527676 A5 JP2018527676 A5 JP 2018527676A5 JP 2018511240 A JP2018511240 A JP 2018511240A JP 2018511240 A JP2018511240 A JP 2018511240A JP 2018527676 A5 JP2018527676 A5 JP 2018527676A5
Authority
JP
Japan
Prior art keywords
memory
state transition
value
power state
parameters
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2018511240A
Other languages
English (en)
Japanese (ja)
Other versions
JP2018527676A (ja
Filing date
Publication date
Priority claimed from US14/846,306 external-priority patent/US9690364B2/en
Application filed filed Critical
Publication of JP2018527676A publication Critical patent/JP2018527676A/ja
Publication of JP2018527676A5 publication Critical patent/JP2018527676A5/ja
Pending legal-status Critical Current

Links

JP2018511240A 2015-09-04 2016-08-05 メモリ状態遷移タイマを動的に調整するためのシステムおよび方法 Pending JP2018527676A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/846,306 2015-09-04
US14/846,306 US9690364B2 (en) 2015-09-04 2015-09-04 Systems and methods for dynamically adjusting memory state transition timers
PCT/US2016/045673 WO2017039950A1 (en) 2015-09-04 2016-08-05 Systems and methods for dynamically adjusting memory state transition timers

Publications (2)

Publication Number Publication Date
JP2018527676A JP2018527676A (ja) 2018-09-20
JP2018527676A5 true JP2018527676A5 (enExample) 2019-09-05

Family

ID=56684785

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018511240A Pending JP2018527676A (ja) 2015-09-04 2016-08-05 メモリ状態遷移タイマを動的に調整するためのシステムおよび方法

Country Status (8)

Country Link
US (1) US9690364B2 (enExample)
EP (1) EP3345070B1 (enExample)
JP (1) JP2018527676A (enExample)
KR (1) KR20180048993A (enExample)
CN (1) CN107924225B (enExample)
BR (1) BR112018004376B1 (enExample)
TW (1) TWI630610B (enExample)
WO (1) WO2017039950A1 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20180335828A1 (en) * 2017-05-19 2018-11-22 Qualcomm Incorporated Systems and methods for reducing memory power consumption via device-specific customization of ddr interface parameters
US10642337B2 (en) * 2017-08-03 2020-05-05 Qualcomm Incorporated Active power management in a computing device subsystem based on micro-idle duration
KR102480017B1 (ko) 2017-08-11 2022-12-21 삼성전자 주식회사 입출력 장치의 성능 및 전력소모를 조절하는 메모리 컨트롤러, 어플리케이션 프로세서 및 메모리 컨트롤러의 동작방법
US11176986B2 (en) 2019-12-30 2021-11-16 Advanced Micro Devices, Inc. Memory context restore, reduction of boot time of a system on a chip by reducing double data rate memory training
CN114020140B (zh) * 2020-02-12 2023-11-28 地平线(上海)人工智能技术有限公司 控制硬件模块的方法及装置、电子设备和存储介质
US12135597B2 (en) * 2020-05-28 2024-11-05 Intel Corporation Adaptive lower power state entry and exit
US11640251B2 (en) 2021-01-20 2023-05-02 Western Digital Technologies, Inc. Early transition to low power mode for data storage devices
US11934252B2 (en) 2021-03-17 2024-03-19 Micron Technology, Inc. Shallow hibernate power state
US12165740B2 (en) * 2021-08-31 2024-12-10 Micron Technology, Inc. Memory traffic monitoring
CN114490759B (zh) * 2022-01-13 2025-05-02 特斯联科技集团有限公司 一种设备影子的管理方法及应用其进行设备监控的方法
JP2023142619A (ja) * 2022-03-25 2023-10-05 富士フイルムビジネスイノベーション株式会社 情報処理装置及びプログラム
US11886220B2 (en) * 2022-05-05 2024-01-30 Qualcomm Incorporated Dynamic power-down management in a computing device
CN115599292A (zh) * 2022-08-26 2023-01-13 超聚变数字技术有限公司（Cn） 一种输入功率的控制方法、电子设备及存储介质

Family Cites Families (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5905901A (en) 1996-10-29 1999-05-18 Micron Electronics Method for adaptive power management of a computer system
US6820209B1 (en) * 1999-07-15 2004-11-16 Apple Computer, Inc. Power managed graphics controller
US6563746B2 (en) 1999-11-09 2003-05-13 Fujitsu Limited Circuit for entering/exiting semiconductor memory device into/from low power consumption mode and method of controlling internal circuit at low power consumption mode
US6910114B2 (en) * 2002-11-15 2005-06-21 Intel Corporation Adaptive idle timer for a memory device
EP1617315A1 (en) 2004-07-13 2006-01-18 Harman Becker Automotive Systems GmbH Adaptive time-out system
US7610497B2 (en) 2005-02-01 2009-10-27 Via Technologies, Inc. Power management system with a bridge logic having analyzers for monitoring data quantity to modify operating clock and voltage of the processor and main memory
JP2006343946A (ja) * 2005-06-08 2006-12-21 Kyocera Mita Corp メモリアクセス制御装置及びコンピュータプログラム
TW200825705A (en) * 2006-04-26 2008-06-16 Nxp Bv Method and system for power-state transition controllers
US7930565B2 (en) * 2006-09-11 2011-04-19 Texas Instruments Incorporated Power-optimizing memory analyzer, method of operating the analyzer and system employing the same
US7689850B2 (en) 2006-11-28 2010-03-30 Dell Products L.P. System and method for adaptive information handling system power management
US8090967B2 (en) * 2008-05-23 2012-01-03 Intel Corporation Power state transition initiation control of memory interconnect based on early warning signal, memory response time, and wakeup delay
JP5375187B2 (ja) * 2009-02-27 2013-12-25 日本電気株式会社 消費電力低減回路および消費電力低減方法
US8230239B2 (en) * 2009-04-02 2012-07-24 Qualcomm Incorporated Multiple power mode system and method for memory
CN102081964B (zh) * 2009-11-30 2014-12-10 国际商业机器公司 动态随机访问存储器刷新的方法和系统
US20110185208A1 (en) * 2010-01-28 2011-07-28 Apple Inc. Memory power reduction in a sleep state
US8738937B2 (en) * 2010-07-13 2014-05-27 Intel Corporation Method and apparatus to limit memory power
US8555095B2 (en) * 2010-07-26 2013-10-08 Apple Inc. Methods and systems for dynamically controlling operations in a non-volatile memory to limit power consumption
US20120159230A1 (en) * 2010-12-17 2012-06-21 Hao Chen Mechanism for Updating Memory Controller Timing Parameters During a Frequency Change
TWI471866B (zh) * 2011-02-14 2015-02-01 Innostor Technology Corp Power saving external USB mass storage device (mass storage device) and its power saving method
US8527792B2 (en) * 2011-05-13 2013-09-03 Synology Incorporated Power saving method and apparatus thereof
JP5681576B2 (ja) * 2011-06-29 2015-03-11 ルネサスエレクトロニクス株式会社 ホストコントローラ装置、情報処理装置及びイベント情報出力方法
US8782454B2 (en) 2011-10-28 2014-07-15 Apple Inc. System and method for managing clock speed based on task urgency
US9104421B2 (en) * 2012-07-30 2015-08-11 Nvidia Corporation Training, power-gating, and dynamic frequency changing of a memory controller
CN102929381B (zh) 2012-10-22 2015-08-05 威盛电子股份有限公司 电子系统及其电源管理方法
US8971194B2 (en) 2012-10-29 2015-03-03 At&T Intellectual Property I, L.P. Controlling wireless transition timers based on application and content
US20140157026A1 (en) 2012-12-05 2014-06-05 Advanced Micro Devices, Inc. Methods and apparatus for dynamically adjusting a power level of an electronic device
US8842324B1 (en) * 2013-03-13 2014-09-23 Xerox Corporation Method and device for accurately estimating power consumption
TWI641943B (zh) * 2013-03-15 2018-11-21 美商英特爾公司 控制電源供應單元於閒置狀態期間的功率消耗之技術
US9704557B2 (en) * 2013-09-25 2017-07-11 Qualcomm Incorporated Method and apparatus for storing retention time profile information based on retention time and temperature
JP6774160B2 (ja) * 2013-12-06 2020-10-21 キヤノン株式会社 情報処理装置、並びに、データ転送装置の制御方法

Similar Documents

Publication Publication Date Title
JP2018527676A5 (enExample)
AU2012379690B2 (en) Scheduling tasks among processor cores
CN104423529B (zh) 中央处理单元状态调整方法和装置
RU2017102663A (ru) Способ и устройство для запуска режима экономии энергии
TWI526843B (zh) 用於節能行動平台之適應性中斷合倂技術
JP2018533112A5 (enExample)
US9588578B2 (en) Method of changing an operating frequency for performing a dynamic voltage and frequency scaling, system on-chip, and mobile device having the same
TWI630610B (zh) 用於動態地調整記憶體狀態轉換計時器之系統及方法
JP2016536852A5 (enExample)
JP2017516207A5 (enExample)
JP2016528519A5 (enExample)
JP2016538637A (ja) システムオンチップにおける動的ｄｃｖｓ調整および作業負荷スケジューリングのためのシステムおよび方法
JP2017517796A5 (enExample)
CN105493053A (zh) 多核处理器中的高速缓存划分
JP2019502980A5 (enExample)
JP2013250962A5 (enExample)
JP2014123354A5 (enExample)
CN103634663B (zh) 机顶盒待机方法、机顶盒待机控制装置和机顶盒
JP2016539420A5 (enExample)
WO2016197651A1 (zh) 一种实现发热控制的方法及终端
CN111902790A (zh) 一种调频方法、装置及计算机可读存储介质
JP2017535878A5 (enExample)
CN115686160A (zh) 芯片运行方法、装置、soc芯片以及存储介质
CN103345296A (zh) 动态电压频率调整触发装置和方法
US20140013142A1 (en) Processing unit power management