JP2018163951A - Crystal defect detection method of semiconductor single crystal substrate - Google Patents
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- 238000001514 detection method Methods 0.000 title claims abstract description 18
- 238000010438 heat treatment Methods 0.000 claims abstract description 89
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- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 claims abstract description 41
- 239000001257 hydrogen Substances 0.000 claims abstract description 30
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- 230000000052 comparative effect Effects 0.000 description 5
- 238000005530 etching Methods 0.000 description 3
- 238000005247 gettering Methods 0.000 description 3
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Abstract
Description
本発明は半導体単結晶基板の結晶欠陥検出方法に関する。 The present invention relates to a crystal defect detection method for a semiconductor single crystal substrate.
近年の半導体素子の高集積化に伴い、半導体単結晶中の結晶欠陥の正確な評価が重要になってきている。 With the recent high integration of semiconductor elements, accurate evaluation of crystal defects in a semiconductor single crystal has become important.
半導体単結晶基板の内部に存在する欠陥は、ケミカルエッチ法や、アングルポリッシュとエッチング法によって顕在化した欠陥を光学顕微鏡により欠陥観察を行う手法、レーザーを使った光学的手法などによって観察されてきた。このような手法により観察測定される欠陥像は、表面においてはデバイス歩留りに影響するし、内部の欠陥はシリコンウェーハのゲッタリング能力を示す重要なパラメータであり、開発時及び出荷検査時などの品質データとして重要である。 Defects existing inside a semiconductor single crystal substrate have been observed by chemical etching, defects observed by angle polishing and etching, optical defect observation techniques, laser optical techniques, etc. . The defect image observed and measured by such a method affects the device yield on the surface, and the internal defect is an important parameter indicating the gettering ability of the silicon wafer. It is important as data.
ここで、下記特許文献１には、半導体単結晶基板を水素雰囲気下で熱処理した後、半導体単結晶基板の表面に顕在化した結晶欠陥の検出を行う技術が開示されている。 Here, the following Patent Document 1 discloses a technique for detecting a crystal defect that is manifested on the surface of a semiconductor single crystal substrate after the semiconductor single crystal substrate is heat-treated in a hydrogen atmosphere.
また、下記特許文献２には、半導体基板を、水素と体積パーセント濃度が約０．０５％〜約５％の塩化水素とを含む雰囲気下で、８００℃〜１１００℃の温度で熱処理を行った後に、半導体基板の表面の欠陥を検出する技術が開示されている。 In Patent Document 2 below, a semiconductor substrate was heat-treated at a temperature of 800 ° C. to 1100 ° C. in an atmosphere containing hydrogen and hydrogen chloride having a volume percent concentration of about 0.05% to about 5%. Later, a technique for detecting defects on the surface of a semiconductor substrate is disclosed.
しかし、上記技術は、欠陥検出前に、熱処理を行うことで結晶欠陥を顕在化させ、これにより結晶欠陥の検出感度を高くする技術であるが、一部の結晶欠陥に関しては欠陥顕在化力が弱く、依然として結晶欠陥の検出感度が低い。 However, the technique described above is a technique for making crystal defects apparent by performing a heat treatment before detecting defects, thereby increasing the detection sensitivity of crystal defects. It is weak and still has low crystal defect detection sensitivity.
本発明は、上記事情に鑑みなされたもので、半導体単結晶基板の結晶欠陥を、より高感度に検出できる方法を提供することを課題とする。 This invention is made | formed in view of the said situation, and makes it a subject to provide the method which can detect the crystal defect of a semiconductor single crystal substrate with higher sensitivity.
上記課題を解決するため、本発明は、半導体単結晶基板を、水素と体積パーセント濃度が５％より大きく５０％以下の塩化水素とを含む雰囲気下で、１１００℃より大きく１２００℃以下の温度で熱処理した後、前記半導体単結晶基板の表面に顕在化した結晶欠陥の検出を行うことを特徴とする。このような条件で熱処理を行うことで、半導体単結晶基板の表面に、大きいサイズの結晶欠陥だけでなく、サイズの小さい又は浅い結晶欠陥に対してもピットとして顕在化させることができる。ゆえに、この熱処理後に半導体単結晶基板に対して結晶欠陥の検出を行うことで、結晶欠陥をより高感度に検出できる。 In order to solve the above problems, the present invention provides a semiconductor single crystal substrate at a temperature higher than 1100 ° C. and lower than 1200 ° C. in an atmosphere containing hydrogen and hydrogen chloride having a volume percent concentration of greater than 5% and less than 50%. After the heat treatment, a crystal defect that is manifested on the surface of the semiconductor single crystal substrate is detected. By performing heat treatment under such conditions, not only large crystal defects but also small or shallow crystal defects can be manifested as pits on the surface of the semiconductor single crystal substrate. Therefore, the crystal defects can be detected with higher sensitivity by detecting the crystal defects on the semiconductor single crystal substrate after the heat treatment.
また、前記熱処理における塩化水素の体積パーセント濃度が１０％〜３０％とすることができる。塩化水素の体積パーセント濃度を１０％以上とすることで、より高感度に結晶欠陥を検出できる。また、熱処理装置の制約を考慮すると、塩化水素の体積パーセント濃度は３０％以下とするのが好ましい。 Further, the volume percent concentration of hydrogen chloride in the heat treatment may be 10% to 30%. By setting the volume percent concentration of hydrogen chloride to 10% or more, crystal defects can be detected with higher sensitivity. In consideration of restrictions of the heat treatment apparatus, the volume percent concentration of hydrogen chloride is preferably 30% or less.
また、水素と塩化水素とを含む雰囲気下での熱処理を第２の熱処理として、その第２の熱処理の前に、半導体単結晶基板を、水素を含むが塩化水素を含まない雰囲気下で第１の熱処理を行うのが好ましい。第１の熱処理を行うことで、半導体単結晶基板の表面の酸化物を除去できる。そして、表面の酸化物が除去された半導体単結晶基板に対して第２の熱処理を行うことで、より多くの結晶欠陥を顕在化させることができる。 Further, the heat treatment in an atmosphere containing hydrogen and hydrogen chloride is a second heat treatment, and before the second heat treatment, the semiconductor single crystal substrate is subjected to the first treatment in an atmosphere containing hydrogen but not containing hydrogen chloride. It is preferable to perform the heat treatment. By performing the first heat treatment, oxide on the surface of the semiconductor single crystal substrate can be removed. Then, by performing the second heat treatment on the semiconductor single crystal substrate from which the surface oxide has been removed, more crystal defects can be revealed.
また、第１の熱処理の温度と第２の熱処理の温度は同じとすることができる。これによって、第１の熱処理から第２の熱処理に移行する際に温度を変更する操作を不要にできるので、熱処理が複雑になるのを抑制できる。 Further, the temperature of the first heat treatment and the temperature of the second heat treatment can be the same. This eliminates the need to change the temperature when shifting from the first heat treatment to the second heat treatment, so that the heat treatment can be prevented from becoming complicated.
また、前記半導体単結晶基板の表面は、ポリッシュ又は劈開により鏡面とし、その後、前記第１の熱処理及び前記第２の熱処理を行うことが好ましい。このように、本発明において半導体単結晶基板の表面とは、半導体単結晶基板の主表面だけではなく、劈開により現れる表面も含まれる。これによって、半導体単結晶基板の表面及び内部のいずれをも、より高感度に結晶欠陥を検出できる。半導体単結晶基板の内部に存在する結晶欠陥を検出することで、半導体単結晶基板の持つゲッタリング能力などに代表されるウェーハの特性評価を詳細に得ることができる。 The surface of the semiconductor single crystal substrate is preferably mirror-finished by polishing or cleaving, and then the first heat treatment and the second heat treatment are performed. Thus, in the present invention, the surface of the semiconductor single crystal substrate includes not only the main surface of the semiconductor single crystal substrate but also the surface that appears by cleavage. Thereby, crystal defects can be detected with higher sensitivity on both the surface and the inside of the semiconductor single crystal substrate. By detecting crystal defects present inside the semiconductor single crystal substrate, it is possible to obtain a detailed evaluation of the characteristics of the wafer represented by the gettering capability of the semiconductor single crystal substrate.
また、前記半導体単結晶基板に前記鏡面を形成した後、洗浄を行い、その後、前記第１の熱処理及び前記第２の熱処理を行うことが好ましい。このように、半導体単結晶基板に鏡面を形成した後に洗浄を行い、その後熱処理を行うことによって、異物を除去できるとともに、半導体単結晶基板の表面に存在していた結晶欠陥に加えて、表面直下に存在していた結晶欠陥もピットとして顕在化させることができる。 Further, it is preferable that after the mirror surface is formed on the semiconductor single crystal substrate, cleaning is performed, and then the first heat treatment and the second heat treatment are performed. In this way, foreign substances can be removed by performing cleaning after forming a mirror surface on the semiconductor single crystal substrate and then performing heat treatment, and in addition to crystal defects existing on the surface of the semiconductor single crystal substrate, The crystal defects that existed in the film can also be manifested as pits.
また、前記顕在化した結晶欠陥を、走査型電子顕微鏡又は表面欠陥検査装置を用いて検出することが好ましい。このように、顕在化した結晶欠陥を、走査型電子顕微鏡を用いて検出することによって、結晶欠陥の形状、サイズ、組成、結晶欠陥密度等の評価をすることができる。また、顕在化した結晶欠陥を、表面欠陥検査装置を用いて検出することによって、結晶欠陥密度や分布を短時間で正確に評価できる。 Moreover, it is preferable to detect the manifested crystal defect using a scanning electron microscope or a surface defect inspection apparatus. Thus, by detecting the crystal defects that have been manifested using a scanning electron microscope, the shape, size, composition, crystal defect density, and the like of the crystal defects can be evaluated. Moreover, the crystal defect density and distribution can be accurately evaluated in a short time by detecting the manifested crystal defects using a surface defect inspection apparatus.
また、前記半導体単結晶基板は、エピタキシャル成長用の半導体単結晶基板とすることができる。これによれば、エピタキシャル成長時に形成されるエピタキシャル欠陥を生む積層欠陥核を顕在化させることができる。本発明により評価され、品質基準を満たした半導体単結晶基板は、エピタキシャル成長用の半導体単結晶基板として有用であり、エピタキシャルウェーハの高品質化に資する。 The semiconductor single crystal substrate may be a semiconductor single crystal substrate for epitaxial growth. According to this, the stacking fault nucleus which produces the epitaxial defect formed at the time of epitaxial growth can be actualized. A semiconductor single crystal substrate that is evaluated according to the present invention and satisfies the quality standard is useful as a semiconductor single crystal substrate for epitaxial growth, and contributes to high quality of an epitaxial wafer.
以下、図１を参照して実施形態に係る半導体単結晶基板の結晶欠陥評価方法を説明する。 Hereinafter, a crystal defect evaluation method for a semiconductor single crystal substrate according to the embodiment will be described with reference to FIG.
先ず、評価する半導体単結晶基板として例えばシリコン単結晶基板を準備する（Ｓ１）。また、準備する半導体単結晶基板は、エピタキシャル成長用の半導体単結晶基板とすることができる。準備する半導体単結晶基板は、チョクラルスキー法（ＣＺ法）で作製されたとしても良いし、フローティングゾーン法（ＦＺ法）で作製されたとしても良い。また半導体単結晶基板の抵抗率、導電型（ｎ型かｐ型か）、結晶方位は特に限定されない。 First, for example, a silicon single crystal substrate is prepared as a semiconductor single crystal substrate to be evaluated (S1). Moreover, the semiconductor single crystal substrate to be prepared can be a semiconductor single crystal substrate for epitaxial growth. The semiconductor single crystal substrate to be prepared may be manufactured by the Czochralski method (CZ method) or may be manufactured by the floating zone method (FZ method). The resistivity, conductivity type (n-type or p-type), and crystal orientation of the semiconductor single crystal substrate are not particularly limited.
次に、準備した半導体単結晶基板の表面をポリッシュ（アングルポリッシュを含む）又は劈開により鏡面とする（Ｓ２）。 Next, the surface of the prepared semiconductor single crystal substrate is made into a mirror surface by polishing (including angle polishing) or cleaving (S2).
次に、鏡面を形成した半導体単結晶基板の洗浄を行う（Ｓ３）。この洗浄としては、過酸化水素をベースとした、Ｈ２Ｏ／Ｈ２Ｏ２／ＮＨ４ＯＨ（ＳＣ−１洗浄）、Ｈ２Ｏ／Ｈ２Ｏ２／ＨＣｌ（ＳＣ−２洗浄）による２段階洗浄を行うことができる。このような洗浄を行うことによって、半導体単結晶基板の表面がエッチングされ、確実に異物が除去されるとともに、半導体単結晶基板の表面に存在していた結晶欠陥に加えて、表面直下に存在していた結晶欠陥も、後述の熱処理により半導体単結晶基板の表面に顕在化させることができる。よって、より精度良く半導体単結晶基板の評価をすることができる。また、自然酸化膜除去のためにフッ酸を用いた洗浄も行うことができる。 Next, the semiconductor single crystal substrate on which the mirror surface is formed is cleaned (S3). For this cleaning, hydrogen peroxide based H 2 O / H 2 O 2 / NH 4 OH (SC-1 cleaning), H 2 O / H 2 O 2 / HCl (SC-2 cleaning) 2 Step cleaning can be performed. By performing such cleaning, the surface of the semiconductor single crystal substrate is etched and foreign matter is surely removed, and in addition to the crystal defects existing on the surface of the semiconductor single crystal substrate, the surface exists directly under the surface. The crystal defects that have been present can also be revealed on the surface of the semiconductor single crystal substrate by a heat treatment described later. Therefore, the semiconductor single crystal substrate can be evaluated with higher accuracy. In addition, cleaning with hydrofluoric acid can be performed to remove the natural oxide film.
次に、洗浄を行った半導体単結晶基板の表面の酸化物を除去するために、この半導体単結晶基板に対して、水素を含むが塩化水素を含まない雰囲気下で第１の熱処理を行う（Ｓ４）。第１の熱処理は、水素１００％の雰囲気下で行っても良いし、水素の他に、窒素やアルゴン等の不活性ガスを含む雰囲気下で行っても良い。第１の熱処理の温度は例えば１１００℃より大きく１２００℃以下とする。さらに、第１の熱処理の温度は、後述の第２の熱処理の温度と同じとすることができるが、第２の熱処理の温度と異なっていても良い。また、第１の熱処理の時間は、半導体単結晶基板の表面から酸化物を除去できるように適宜に設定される。 Next, in order to remove the oxide on the surface of the cleaned semiconductor single crystal substrate, the semiconductor single crystal substrate is subjected to a first heat treatment in an atmosphere containing hydrogen but not hydrogen chloride ( S4). The first heat treatment may be performed in an atmosphere containing 100% hydrogen, or may be performed in an atmosphere containing an inert gas such as nitrogen or argon in addition to hydrogen. The temperature of the first heat treatment is, for example, greater than 1100 ° C. and 1200 ° C. or less. Furthermore, the temperature of the first heat treatment can be the same as the temperature of the second heat treatment described later, but may be different from the temperature of the second heat treatment. The time for the first heat treatment is appropriately set so that the oxide can be removed from the surface of the semiconductor single crystal substrate.
次に、第１の熱処理に引き続き、熱処理炉内に塩化水素を追加することで、水素と塩化水素とを含む雰囲気下で第２の熱処理を行う（Ｓ５）。このとき、雰囲気中の塩化水素の体積％濃度（言い換えると混合比率又は流量比）は５％より大きく５０％以下とする。なお、水素の単位時間当たりの流量をＦ１、塩化水素の単位時間当たりの流量をＦ２とすると、塩化水素の体積％濃度＝Ｆ２／（Ｆ１＋Ｆ２）となる。また、第２の熱処理の温度は１１００℃より大きく１２００℃以下とする。さらに、第２の熱処理の温度は、上記第１の熱処理の温度と同じとすることができるが、１１００℃より大きく１２００℃以下の温度であれば、第１の熱処理の温度と異なっていても良い。また、第２の熱処理の時間は、半導体単結晶基板の表面をエッチングするのに十分であって且つ半導体単結晶基板に含まれる結晶欠陥の位置を示すのに十分な時間に設定されるが、第２の熱処理の時間を長くするほど、より多くの結晶欠陥を顕在化させることができる。第２の熱処理の時間は例えば３００秒以下とすることができるが、これに限定されない。 Next, following the first heat treatment, a second heat treatment is performed in an atmosphere containing hydrogen and hydrogen chloride by adding hydrogen chloride to the heat treatment furnace (S5). At this time, the volume% concentration (in other words, the mixing ratio or flow rate ratio) of hydrogen chloride in the atmosphere is set to be greater than 5% and 50% or less. If the flow rate of hydrogen per unit time is F1, and the flow rate of hydrogen chloride per unit time is F2, the volume% concentration of hydrogen chloride = F2 / (F1 + F2). The temperature of the second heat treatment is greater than 1100 ° C. and 1200 ° C. or less. Further, the temperature of the second heat treatment may be the same as the temperature of the first heat treatment, but may be different from the temperature of the first heat treatment as long as it is higher than 1100 ° C. and 1200 ° C. or lower. good. In addition, the second heat treatment time is set to a time sufficient to etch the surface of the semiconductor single crystal substrate and to indicate the position of the crystal defect included in the semiconductor single crystal substrate. The longer the time of the second heat treatment, the more crystal defects can be revealed. The time for the second heat treatment can be, for example, 300 seconds or less, but is not limited thereto.
次に、第２の熱処理を行った半導体単結晶基板の表面にエピタキシャル膜を堆積させる（Ｓ６）。エピタキシャル膜を堆積させることで、半導体単結晶基板に存在する結晶欠陥に起因してエピタキシャル膜に発生する結晶欠陥を評価できる。堆積させるエピタキシャル膜としては例えばシリコン単結晶膜とすることができる。なお、エピタキシャルウェーハとしての評価が不要な場合には、このエピタキシャル膜の堆積工程は行わなくても良い。 Next, an epitaxial film is deposited on the surface of the semiconductor single crystal substrate subjected to the second heat treatment (S6). By depositing the epitaxial film, crystal defects generated in the epitaxial film due to crystal defects existing in the semiconductor single crystal substrate can be evaluated. As the epitaxial film to be deposited, for example, a silicon single crystal film can be used. If evaluation as an epitaxial wafer is unnecessary, this epitaxial film deposition step may not be performed.
エピタキシャル膜を堆積させた後、又はエピタキシャル膜を堆積させない場合には第２の熱処理を行った後の半導体単結晶基板の表面に顕在化した結晶欠陥を検出し（Ｓ７）、この検出結果に基づいて半導体単結晶基板の結晶欠陥を評価する（Ｓ８）。この顕在化した結晶欠陥は、走査型電子顕微鏡や表面欠陥検査装置等を用いて検出することができる。走査型電子顕微鏡を用いて検出することによって、結晶欠陥の形状、サイズ、組成、結晶欠陥密度等の分析をすることができ、半導体単結晶基板の持つ品質特性を詳細に評価することができる。また、表面欠陥検査装置（例えば、ＭＡＧＩＣＳ、ＳＰ１、ＳＰ２等）に適合する形状にあっては、このような表面欠陥検査装置を用いることによって、結晶欠陥密度や分布を短時間で正確に分析することができ、ゲッタリング能力等に代表されるウェーハの特性を評価することができる。 After the epitaxial film is deposited, or when the epitaxial film is not deposited, a crystal defect that is manifested on the surface of the semiconductor single crystal substrate after the second heat treatment is detected (S7), and based on this detection result Then, the crystal defects of the semiconductor single crystal substrate are evaluated (S8). The actual crystal defects can be detected using a scanning electron microscope, a surface defect inspection apparatus, or the like. By detecting using a scanning electron microscope, the shape, size, composition, crystal defect density, etc. of crystal defects can be analyzed, and the quality characteristics of the semiconductor single crystal substrate can be evaluated in detail. In addition, if the shape is suitable for a surface defect inspection apparatus (for example, MAGICS, SP1, SP2, etc.), the crystal defect density and distribution can be accurately analyzed in a short time by using such a surface defect inspection apparatus. It is possible to evaluate the characteristics of the wafer represented by the gettering ability and the like.
また、本実施形態の結晶欠陥評価方法を用いて顕在化した結晶欠陥は、エピタキシャル成長時に積層欠陥核となり、エピタキシャル欠陥を生む可能性が高いことが判った。したがって、本実施形態により評価され、品質基準を満たした半導体単結晶基板は、エピタキシャル成長用の半導体単結晶基板として有用であり、また、本実施形態の評価方法を用いることによりこの積層欠陥核の原因究明にも有用である。 In addition, it has been found that the crystal defects that are manifested by using the crystal defect evaluation method of the present embodiment become a stacking fault nucleus during epitaxial growth and have a high possibility of producing epitaxial defects. Therefore, the semiconductor single crystal substrate that is evaluated according to the present embodiment and satisfies the quality standard is useful as a semiconductor single crystal substrate for epitaxial growth, and the cause of this stacking fault nucleus by using the evaluation method of the present embodiment. It is also useful for investigation.
このように、本実施形態によれば、結晶欠陥の検出に先立って、半導体単結晶基板に対して、水素と塩化水素とを含む雰囲気下で熱処理（第２の熱処理）を行うので、基板表面もしくは表層の欠陥とその他の領域とのエッチングレートの差により、欠陥部の結晶に結晶方位に沿ったピットを形成させることができる。つまり、結晶欠陥を顕在化させることができる。特に、第２の熱処理において、塩化水素を含ませ、この塩化水素の体積パーセント濃度を５％より大きく５０％以下とし、さらに、熱処理温度を１１００℃より大きく１２００℃以下とすることで、欠陥顕在化力をより増加でき、その結果、結晶欠陥をより高感度に検出できる。 Thus, according to the present embodiment, prior to the detection of crystal defects, the semiconductor single crystal substrate is subjected to heat treatment (second heat treatment) in an atmosphere containing hydrogen and hydrogen chloride. Alternatively, pits along the crystal orientation can be formed in the crystal of the defective portion due to the difference in etching rate between the surface layer defect and other regions. That is, crystal defects can be made apparent. In particular, in the second heat treatment, hydrogen chloride is included, the volume percent concentration of this hydrogen chloride is set to be greater than 5% and 50% or less, and the heat treatment temperature is set to be greater than 1100 ° C. and 1200 ° C. or less to reveal defects. As a result, crystal defects can be detected with higher sensitivity.
以下、本発明の実施例及び比較例を挙げて具体的に説明するが、本発明はこれらに限定されるものではない。 Hereinafter, although an example and a comparative example of the present invention are given and explained concretely, the present invention is not limited to these.
（実施例１）
評価する半導体単結晶基板として、直径３００ｍｍ、抵抗率１０Ω・ｃｍ、ｐ型のシリコン単結晶基板を用いた。このシリコン単結晶基板をポリッシュ加工し、表面を鏡面とした。その後、ＳＣ−１洗浄、ＳＣ−２洗浄、ＨＦ洗浄を行った。その後、枚葉式エピタキシャル成長装置において、シリコン単結晶基板の表面を、１１００℃より大きく１２００℃以下で水素１００％の雰囲気下にさらし、その後、水素＋塩化水素雰囲気下(塩化水素の混合比率５％〜５０％)にさらした。水素雰囲気下での熱処理（第１の熱処理）と、水素＋塩化水素雰囲気下での熱処理（第２の熱処理）の時間は合計で３分間とした。熱処理後、シリコン単結晶基板の表面のＬＬＳ欠陥数（ＬＬＳ：Ｌｏｃａｌｉｚｅｄ Ｌｉｇｈｔ Ｓｃａｔｔｅｒｓ）を、ＫＬＡ Ｔｅｎｃｏｒ社製の表面欠陥検査装置ＳＰ３のＤＣＯ（Ｄａｒｋｆｉｅｌｄ Ｃｏｍｐｏｓｉｔｅ Ｏｂｌｉｑｕｅ）モード２８ｎｍｕｐにて測定した。
Example 1
As a semiconductor single crystal substrate to be evaluated, a silicon single crystal substrate having a diameter of 300 mm, a resistivity of 10 Ω · cm, and a p-type was used. This silicon single crystal substrate was polished to give a mirror surface. Thereafter, SC-1 cleaning, SC-2 cleaning, and HF cleaning were performed. Thereafter, in a single wafer epitaxial growth apparatus, the surface of the silicon single crystal substrate is exposed to an atmosphere of 100% hydrogen at a temperature greater than 1100 ° C. and 1200 ° C. or less, and then in a hydrogen + hydrogen chloride atmosphere (hydrogen chloride mixing ratio 5% To 50%). The total heat treatment time in the hydrogen atmosphere (first heat treatment) and heat treatment in the hydrogen + hydrogen chloride atmosphere (second heat treatment) was 3 minutes. After the heat treatment, the number of LLS defects (LLS: Localized Light Scatters) on the surface of the silicon single crystal substrate was measured in a DCO (Darkfield Composite Oblique) mode 28 nmup of a surface defect inspection apparatus SP3 manufactured by KLA Tencor.
第１の熱処理及び第２の熱処理の温度は共に１１５０℃とした。また、第２の熱処理における水素流量を８０ｓｌｍとし、塩化水素流量を変化させて、塩化水素の混合比率（体積％濃度）を５．５、１０、３０、５０％とした。また、塩化水素を流さないで、水素雰囲気下のみの熱処理を行った場合についても、ＬＬＳ欠陥数の測定を行った。 The temperatures of the first heat treatment and the second heat treatment were both 1150 ° C. In addition, the hydrogen flow rate in the second heat treatment was set to 80 slm, and the hydrogen chloride flow rate was changed to set the mixing ratio (volume% concentration) of hydrogen chloride to 5.5, 10, 30, and 50%. Further, the number of LLS defects was also measured when heat treatment was performed only in a hydrogen atmosphere without flowing hydrogen chloride.
そして、水素雰囲気下のみの熱処理を行った場合のＬＬＳ欠陥数に対する、塩化水素の混合比率を５．５、１０、３０、５０％とした場合のＬＬＳ欠陥数の比である検出欠陥増加倍率を求めたところ、それぞれ５．９２倍、９．８５倍、８５．５倍、８８２倍であった。 Then, the detection defect increase ratio, which is the ratio of the number of LLS defects when the mixing ratio of hydrogen chloride is 5.5, 10, 30, 50% with respect to the number of LLS defects when heat treatment is performed only in a hydrogen atmosphere, As a result, they were 5.92 times, 9.85 times, 85.5 times, and 882 times, respectively.
（比較例１）
第２の熱処理における塩化水素の混合比率を３％としたこと以外は、実施例１と同様にして、水素雰囲気下のみの熱処理を行ったときに対する検出欠陥増加倍率を測定したところ、２．４１倍であった。
(Comparative Example 1)
Except that the mixing ratio of hydrogen chloride in the second heat treatment was set to 3%, the detection defect increase rate when the heat treatment was performed only in a hydrogen atmosphere was measured in the same manner as in Example 1. It was twice.
実施例１と比較例１をまとめたものを表１に示す。塩化水素の混合比率５％より大きく５０％以下の範囲において、検出欠陥増加倍率が５倍以上となり、半導体単結晶基板の結晶欠陥をより高感度に検出可能であることが判った。塩化水素の混合比率５０％以上に関しては枚葉式エピタキシャル成長装置においては装置制約上実現困難である。枚葉式エピタキシャル成長装置の制約を考慮すると、塩化水素の混合比率は３０％以下とするのが好ましい。また、塩化水素の混合比率が１０％以上の範囲では、検出欠陥増加倍率は約１０倍以上となるので、塩化水素の混合比率は１０％以上とするのが好ましい。 Table 1 shows a summary of Example 1 and Comparative Example 1. When the mixing ratio of hydrogen chloride is greater than 5% and less than or equal to 50%, the detection defect increase rate is 5 times or more, and it has been found that the crystal defects of the semiconductor single crystal substrate can be detected with higher sensitivity. A hydrogen chloride mixing ratio of 50% or more is difficult to realize in a single wafer epitaxial growth apparatus due to apparatus limitations. Considering the limitations of the single wafer epitaxial growth apparatus, the mixing ratio of hydrogen chloride is preferably 30% or less. In addition, when the mixing ratio of hydrogen chloride is 10% or more, the detection defect increase rate is about 10 times or more. Therefore, the mixing ratio of hydrogen chloride is preferably 10% or more.
（実施例２）
評価する半導体単結晶基板として、直径３００ｍｍ、抵抗率１０Ω・ｃｍ、ｐ型のシリコン単結晶基板を用いた。このシリコン単結晶基板をポリッシュ加工し、表面を鏡面とした。その後、ＳＣ−１洗浄、ＳＣ−２洗浄、ＨＦ洗浄を行った。その後、枚葉式エピタキシャル成長装置において、シリコン単結晶基板の表面を、１１００℃より大きく１２００℃以下で水素雰囲気下にさらし、その後、水素＋塩化水素雰囲気下(塩化水素の混合比率が５％より大きく５０％以下)にさらした。水素雰囲気下での熱処理（第１の熱処理）と、水素＋塩化水素雰囲気下での熱処理（第２の熱処理）の時間は合計で３分間とした。熱処理後、シリコン単結晶基板の表面のＬＬＳ欠陥数を、ＫＬＡ Ｔｅｎｃｏｒ社製の表面欠陥検査装置ＳＰ３のＤＣＯモード２８ｎｍｕｐにて測定した。
(Example 2)
As a semiconductor single crystal substrate to be evaluated, a silicon single crystal substrate having a diameter of 300 mm, a resistivity of 10 Ω · cm, and a p-type was used. This silicon single crystal substrate was polished to give a mirror surface. Thereafter, SC-1 cleaning, SC-2 cleaning, and HF cleaning were performed. Thereafter, in a single wafer epitaxial growth apparatus, the surface of the silicon single crystal substrate is exposed to a hydrogen atmosphere at a temperature higher than 1100 ° C. and lower than or equal to 1200 ° C., and then in a hydrogen + hydrogen chloride atmosphere (the mixing ratio of hydrogen chloride is higher than 5%). 50% or less). The total heat treatment time in the hydrogen atmosphere (first heat treatment) and heat treatment in the hydrogen + hydrogen chloride atmosphere (second heat treatment) was 3 minutes. After the heat treatment, the number of LLS defects on the surface of the silicon single crystal substrate was measured by a DCO mode 28 nmup of a surface defect inspection apparatus SP3 manufactured by KLA Tencor.
第２の熱処理における塩化水素の混合比率を３０％とし、第１の熱処理及び第２の熱処理の温度を１１１０℃、１１５０℃、１２００℃とした。また、塩化水素を流さないで、水素雰囲気下のみの熱処理（温度は１１１０℃、１１５０℃、１２００℃）を行った場合についても、ＬＬＳ欠陥数の測定を行った。 The mixing ratio of hydrogen chloride in the second heat treatment was 30%, and the temperatures of the first heat treatment and the second heat treatment were 1110 ° C., 1150 ° C., and 1200 ° C. In addition, the number of LLS defects was also measured when heat treatment was performed only in a hydrogen atmosphere without flowing hydrogen chloride (temperatures were 1110 ° C., 1150 ° C., and 1200 ° C.).
そして、水素雰囲気下のみの熱処理を行った場合のＬＬＳ欠陥数に対する、塩化水素の混合比率３０％、熱処理温度を１１１０℃、１１５０℃、１２００℃とした場合のＬＬＳ欠陥数の比である検出欠陥増加倍率を求めたところ、それぞれ９３．１倍、８５．５倍、８０．８倍であった。 The detection defect is the ratio of the number of LLS defects when the hydrogen chloride mixing ratio is 30% and the heat treatment temperatures are 1110 ° C., 1150 ° C., and 1200 ° C. with respect to the number of LLS defects when heat treatment is performed only in a hydrogen atmosphere. When the increase magnification was calculated | required, they were 93.1 times, 85.5 times, and 80.8 times, respectively.
（比較例２）
第１の熱処理及び第２の熱処理の温度を１０００℃としたこと以外は実施例２と同様にして、水素雰囲気下のみの熱処理（温度は１０００℃）を行ったときに対する検出欠陥増加倍率を測定したところ、３．８５倍であった。
(Comparative Example 2)
Except that the temperature of the first heat treatment and the second heat treatment was set to 1000 ° C., the detection defect increase rate when the heat treatment was performed only in a hydrogen atmosphere (temperature is 1000 ° C.) was measured in the same manner as in Example 2. As a result, it was 3.85 times.
実施例２と比較例２をまとめたものを表２に示す。第１の熱処理及び第２の熱処理の温度が１１００℃より大きく１２００℃以下の範囲で検出欠陥増加倍率が５倍以上となり、半導体単結晶基板の結晶欠陥をより高感度に検出可能であることが判った。１０００℃以下では基板のエッチング量が減少し欠陥の顕在化が阻害されていると考えられる。熱処理温度が１２００℃より大きいと基板にスリップ転移が生じてしまうため実用的ではない。 Table 2 shows a summary of Example 2 and Comparative Example 2. When the temperature of the first heat treatment and the second heat treatment is higher than 1100 ° C. and lower than or equal to 1200 ° C., the detection defect increase rate is 5 times or more, and crystal defects of the semiconductor single crystal substrate can be detected with higher sensitivity. understood. When the temperature is 1000 ° C. or less, it is considered that the etching amount of the substrate is reduced and the manifestation of defects is hindered. If the heat treatment temperature is higher than 1200 ° C., slip transition occurs in the substrate, which is not practical.
なお、本発明は、上記実施形態に限定されるものではない。上記実施形態は、例示であり、本発明の特許請求の範囲に記載された技術的思想と実質的に同一な構成を有し、同様な作用効果を奏するものは、いかなるものであったとしても本発明の技術的範囲に包含される。 The present invention is not limited to the above embodiment. The above embodiment is merely an example, and has the same configuration as the technical idea described in the claims of the present invention, and can produce any similar effects. It is included in the technical scope of the present invention.
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| JP7484808B2 (en) | 2021-05-12 | 2024-05-16 | 信越半導体株式会社 | Method for evaluating crystal defects in semiconductor single crystal substrate |
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| JP7484808B2 (en) | 2021-05-12 | 2024-05-16 | 信越半導体株式会社 | Method for evaluating crystal defects in semiconductor single crystal substrate |
| CN115274487A (en) * | 2022-09-27 | 2022-11-01 | 西安奕斯伟材料科技有限公司 | Detection method and detection system for micro-damage of wafer surface |
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