JP2018073948A - Semiconductor package and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable inhibition of substrate warpage in a semiconductor package having excellent radiation performance.SOLUTION: A semiconductor package according to one embodiment comprises a substrate 2, a metallic substrate 3 and a frame body 4. The substrate 2 has a rectangular shape in a plan view, two pairs of screw parts 23 positioned at opposite sides, a mounting region 21 where a semiconductor element 7 is mounted on an upper surface and a through hole 22 at a position overlapping with the mounting region 21. The metallic substrate 3 has a rectangular shape in the plan view, and fitted into the through hole 22 and has a thermal expansion coefficient larger than that of the substrate 2. The frame body 4 is positioned to surround the upper surface of the substrate 2. The metallic substrate 3 is spaced apart from a first virtual center line and a second virtual center line which connect the screw parts 23 positioned at the opposite sides to each other and is positioned between the first virtual center line and the second virtual center line.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a semiconductor package on which a semiconductor element is mounted and a semiconductor device using the same.

  2. Description of the Related Art In recent years, semiconductor packages that contain semiconductor elements that operate with high-frequency signals are known. Such a semiconductor element or the like generates heat when operating. In order to dissipate this heat to the outside, a semiconductor package is disclosed in which a metal substrate is fitted into a part of a substrate on which a semiconductor element or the like is mounted to improve heat dissipation (see Patent Document 1).

JP 2002-93931 A

  Patent Document 1 discloses a semiconductor package including a substrate having a through hole, a metal substrate fitted in the through hole and having a larger thermal expansion coefficient than the substrate, and a frame. One set of screwing portions is provided on the opposite side of the substrate. A virtual center line connecting the screwing portions located on opposite sides and the metal substrate are overlapped.

  However, in the technique disclosed in Patent Document 1, when the substrate suppresses the metal substrate from thermally expanding due to the heat generated when the semiconductor element is used, the screwing portion is recessed inward. In some cases, the force to suppress the thermal expansion of the metal substrate is weakened. For this reason, the metal substrate is warped, and it may be difficult to mount and operate the semiconductor element satisfactorily.

  A semiconductor package according to an embodiment of the present invention includes a substrate, a metal substrate, and a frame. The substrate has a rectangular shape in plan view, has two sets of screwing portions located on opposite sides, has a mounting region on which the semiconductor element is mounted, and a through hole at a position overlapping the mounting region. The metal substrate has a rectangular shape in plan view, is fitted in the through hole, and has a larger thermal expansion coefficient than the substrate. The frame is positioned so as to surround the upper surface of the substrate. The metal substrate is spaced between the first virtual center line and the second virtual center line that connect the screwing portions located on opposite sides, and is located between the first virtual center line and the second virtual center line.

  A semiconductor device according to an embodiment of the present invention includes the semiconductor package described above, a semiconductor element, and a lid. The semiconductor element is mounted in the mounting area. The lid body covers the semiconductor element and is joined to the upper surface of the frame body.

  The semiconductor package which concerns on one Embodiment of this invention can suppress the curvature of the board | substrate excellent in heat dissipation by having the structure mentioned above. In addition, since the semiconductor device according to the embodiment of the present invention includes the semiconductor package described above, the semiconductor element can be used under favorable conditions.

It is a perspective view showing a semiconductor package concerning one embodiment of the present invention. 1 is an exploded perspective view showing a semiconductor package according to an embodiment of the present invention. It is a top view which shows the semiconductor package which concerns on one Embodiment of this invention. It is sectional drawing in the AA line in the semiconductor package which concerns on one Embodiment of this invention shown in FIG. FIG. 4 is a cross-sectional view taken along line BB in the semiconductor package according to the embodiment of the present invention shown in FIG. 3. It is a perspective view which shows the semiconductor package which concerns on other embodiment of this invention. It is a top view which shows the semiconductor package which concerns on other embodiment of this invention. It is a perspective view showing a semiconductor device concerning one embodiment of the present invention.

  Hereinafter, a semiconductor package of each embodiment and a semiconductor device including the semiconductor package will be described in detail with reference to the drawings.

<Structure of semiconductor package>
FIG. 1 is a perspective view of a semiconductor package according to an embodiment of the present invention. FIG. 2 is an exploded perspective view showing a semiconductor package according to an embodiment of the present invention. FIG. 3 is a plan view showing a semiconductor package according to an embodiment of the present invention. 4 is a cross-sectional view taken along line AA in the semiconductor package according to the embodiment of the present invention shown in FIG. FIG. 5 is a cross-sectional view taken along line BB in the semiconductor package according to the embodiment of the present invention shown in FIG. FIG. 6 is a perspective view showing a semiconductor package according to another embodiment of the present invention. FIG. 7 is a plan view showing a semiconductor package according to another embodiment of the present invention. In these drawings, a semiconductor package 1 according to an embodiment of the present invention includes a substrate 2, a metal substrate 3, a frame body 4, and input / output terminals 5. The substrate 2 has a through hole 22, and the metal substrate 3 is fitted into the through hole 22.

  As shown in FIG. 3, the board | substrate 2 in one Embodiment of this invention has the mounting area | region 21 in which the semiconductor element 7 is mounted in the upper surface. Moreover, the board | substrate 2 is rectangular shape, for example, Comprising: Two sets of screwing parts 23 are located in the opposite side, respectively. The semiconductor package 1 can be screwed and fixed to the mounting substrate or the like by fitting screws or the like into the screwing portions 23.

  In the embodiment of the present invention, the mounting region 21 means a region overlapping with the semiconductor element 7 when the substrate 2 is viewed in plan. The size of the substrate 2 is, for example, 10 mm × 10 mm to 50 mm × 50 mm. Moreover, as thickness of the board | substrate 2, it can set to 0.5 mm-5 mm, for example.

The substrate 2 is made of, for example, a metal material. The metal material is an alloy made of, for example, iron, nickel, or cobalt. At this time, the thermal expansion coefficient of the substrate 2 is 5 × 10 ⁻⁶ / K. Further, iron, nickel, chromium, cobalt, tungsten, or an alloy made of these metals can be used. The metal member which comprises the board | substrate 2 is producible by giving metal processing methods, such as a rolling method and a punching method, to such an ingot of a metal material.

  As shown in FIGS. 1 and 3, the substrate 2 has two sets of screwing portions 23 located on opposite sides. The opposite sides of the substrate 2 on which the screwing portion 23 is provided are parallel. The screwing part 23 is, for example, a semicircular recess in plan view. For example, the recessed portion of the screwing portion 23 has a length of 1 mm to 5 mm from the outer edge of the substrate 2, and a width in a direction parallel to the opposite side of the substrate 2 is 1 mm to 5 mm. Two screwing portions 23 are formed on one side, and two are formed on the opposite side. Two screwing portions 23 provided on the opposite side are one set.

  As shown in FIG. 3 and FIG. 7, the screwing portions 23 are connected to each other by two virtual center lines. The virtual center line is an imaginary line connecting the center of the screwing portion 23 and the center of the screwing portion 23 located on the opposite side. The XX line shown in FIGS. 3 and 7 is a first virtual center line, and the YY line is a second virtual center line. The first virtual center line and the second virtual center line are parallel to a direction orthogonal to the opposite side of the substrate 2 where the screwing portion 23 is provided.

  The substrate 2 has a through hole 22 at a position overlapping the mounting region 21. The through hole 22 has a rectangular shape in plan view. The size of the through hole 22 is, for example, 5 mm × 5 mm to 40 mm × 40 mm in plan view.

  As shown in FIGS. 2, 4 and 5, the metal substrate 3 is fitted in the through hole 22 of the substrate 2. Since the metal substrate 3 is fitted into the through hole 22, the metal substrate 3 has an outer shape that is at least smaller than the through hole 22. At this time, the metal substrate 3 is smaller than the through-hole 22 because the metal substrate 3 and the through-hole 22 are substantially the same size, and the through-hole 22 is larger and the gap is filled with a bonding material. . Therefore, the metal substrate 3 is, for example, 5 mm × 5 mm to 40 mm × 40 mm in a plan view, and the metal substrate 3 has a thickness of 0.5 mm to 5 mm. The metal substrate 3 has a lower surface that coincides with the lower surface of the substrate 2. Alternatively, the metal substrate 3 may protrude at least from the lower surface of the substrate 2. When the metal substrate 3 protrudes from the lower surface of the substrate 2, the metal substrate 3 is excellent in heat dissipation, so that heat generated in the semiconductor element 7 is easily released from the metal substrate 3 to the outside.

The metal substrate 3 is made of, for example, copper. At this time, the thermal expansion coefficient of the substrate 2 is 16 × 10 ⁻⁶ / K. The metal substrate 3 may be a metal material having excellent heat dissipation, such as copper. For example, an alloy made of copper and tungsten or molybdenum can be used. The metal substrate 3, for example, thermal expansion coefficient of ^{10 × 10 -6 / K~20 × 10} -6 / K. Since the metal substrate 3 is positioned so as to overlap with the mounting region 21, heat generated from the semiconductor element 7 mounted in the mounting region 21 is transmitted to the metal substrate 3, and is transmitted from the semiconductor element 7 through the metal substrate 3. It plays a role of radiating heat to the outside of the semiconductor package 1.

  As shown in FIG. 3, the metal substrate 3 is located between the first virtual center line and the second virtual center line in plan view. The first virtual center line and the second virtual center line are spaced from each other. Further, the metal substrate 3 is provided at a position that does not overlap with a frame body 4 described later in plan view. That is, the metal substrate 3 is provided at a position that does not overlap the first virtual center line and the second virtual center line and does not overlap the frame body 4 in plan view. By providing the metal substrate 3 at a position that does not overlap the first virtual center line and the second virtual center line, the substrate 2 can sufficiently suppress warpage even when heat is applied to the metal substrate 3 and thermal expansion occurs. it can.

  This is because the substrate 2 has a smaller thermal expansion coefficient than the metal substrate 3 when the amount of the substrate 2 surrounding the metal substrate 3 is small, as in the case where the metal substrate 3 is in a position overlapping each virtual center line. In addition, when the metal substrate 3 is thermally expanded, the substrate 2 may be pushed from the end of the through hole 22 and the substrate 2 may be warped. The warp of the substrate 2 due to being pushed by the metal substrate 3 does not overlap each virtual center line of the screwing portion 23, and the amount of the substrate 2 surrounding the metal substrate 3 is secured, so that the metal substrate 3 This is because it is possible to secure a force for maintaining the state of the substrate 2 rather than the pressing force, and to suppress warping of the substrate 2.

In addition, by providing the metal substrate 3 at a position where it does not overlap the frame body 4, it is possible to reduce stress caused by a difference in thermal expansion coefficient between the metal substrate 3 and the frame body 4. Further, the metal substrate 3 is positioned so as not to overlap with the screwing portion 23. The metal substrate 3 is screwed 23
Since the metal substrate 3 is suppressed in the through hole 22 of the substrate 2 even if the metal substrate 3 is thermally expanded, the substrate 2 can be hardly warped.

  The frame 4 surrounds the mounting area 21 of the substrate 2. The frame body 4 has a rectangular outer edge and inner edge in plan view, and is constituted by four side walls. The frame 4 is bonded to the upper surface of the substrate 2 via a bonding member such as silver solder.

  The frame 4 has an outer edge size of 3 mm × 5 mm to 30 mm × 40 mm and an inner edge size of 2 mm × 4 mm to 29 mm × 39 mm, for example, in plan view. Moreover, the thickness of the frame 4 shown by the width | variety between an outer edge and an inner edge is 0.5 mm-5 mm, for example. The height of the frame 4 is 1 mm to 30 mm. The frame 4 has an outer edge located on the inner side of the side of the substrate 2 where the screwing part 23 is not provided, and the side where the screwing part 23 is provided is recessed in the screwing part 23. It is located inside the end located at the bottom of the part.

  As the frame body 4, for example, a metal material can be used similarly to the substrate 2. As the metal material, for example, a metal material such as iron, copper, nickel, chromium, cobalt, and tungsten, or an alloy made of these metal materials can be used.

  As shown in FIG. 2, the frame 4 passes through the side wall of the frame 4 parallel to the opposite side of the substrate 2 where the screwing portion 23 is not provided, and is a notch cut out from the lower surface of the frame 4. You may have. An input / output terminal 5 that electrically connects the semiconductor element 7 and an external electric circuit board is bonded and fixed to the notch. The cutout portions are provided one by one on the opposite side of the frame body 4 parallel to the opposite side of the substrate 2 where the screwing portion 23 is not provided in plan view. The input / output terminal 5 may be fitted into the notch, and the inner surface of the notch may be joined to the upper surface and the side of the input / output terminal 5 with a joining material such as solder or brazing material. At this time, the lower surface of the input / output terminal 5 may be bonded to the upper surface of the substrate 2 with a bonding material such as solder or brazing material, as described above.

  Further, the frame body 4 is not provided with a notch on the side wall of the frame body 4 parallel to the opposite side of the substrate 2 on which the screwing portion 23 is provided. Since the distance between the input / output terminal 5 and the metal substrate 3 is short and the input / output terminal 5 is not disposed on the side wall parallel to the short side of the metal substrate 3, the substrate 2, the metal substrate 3, the frame 4 and the input / output Thermal stress caused by a difference in thermal expansion coefficient with the terminal 5 can be suppressed. As a result, the semiconductor package 1 can suppress cracks and cracks generated in the input / output terminals 5 and damage starting from the joint between the substrate 2 and the short side of the metal substrate 3.

The input / output terminal 5 is made of, for example, a ceramic material. The ceramic material constituting the input / output terminal 5 is, for example, an aluminum oxide sintered body. Further, the input / output terminal 5 may be a ceramic material such as a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body or a silicon nitride sintered body, or a glass ceramic material. . Input-output terminal 5, for example, a coefficient of thermal expansion of ^{0.1 × 10 -6 / K~10 × 10} -6 / K. The input / output terminal 5 is formed with a signal line that is electrically connected to the semiconductor element 7 via an electrical connection member such as a bonding wire.

  In the semiconductor package 1 according to the embodiment of the present invention, the metal substrate 3 is located between the first virtual center line and the second virtual center line in plan view, and the first virtual center line and the second virtual center line. It is located with a gap. As a result, the semiconductor package 1 can easily transfer the heat from the semiconductor element 7 to the outside by the metal substrate 3, and the heat dissipation of the semiconductor package 1 can be improved. Further, the semiconductor package 1 suppresses the warpage of the substrate 2 and the damage of the semiconductor element 7 due to the stress caused by the difference in thermal expansion coefficient between the substrate 2 and the metal substrate 3 that occurs during the manufacturing process of the semiconductor package 1 and the operation of the semiconductor device 10. can do. Further, the metal substrate 3 includes the periphery of the screwing portion 23 in which the deformation of the substrate 2 due to thermal expansion and contraction of the substrate 2 is likely to be large, and between the first virtual center line and the second virtual center line. By making the clearance, warpage and deformation of the substrate 2 due to thermal expansion and contraction of the metal substrate 3 can be reduced.

  As shown in FIG. 3, in the semiconductor package 1 according to the embodiment of the present invention, the metal substrate 3 has long sides extending in a direction parallel to the first virtual center line and the second virtual center line. A cutout portion may be provided on the side surface of the frame body 4 along the long side, and the input / output terminal 5 may be joined and fixed. At this time, the metal substrate 3 has a rectangular shape, for example, and is in a position not overlapping with the frame body 4 as described above. The input / output terminal 5 is provided on the frame 4 in the short side direction of the metal substrate 3. This makes it difficult for the metal substrate 3 to thermally expand in the direction in which the input / output terminals 5 are provided when the metal substrate 3 is thermally expanded and contracted, that is, in the short side direction of the metal substrate 3. For this reason, the stress which arises by the thermal expansion coefficient difference which acts between the board | substrate 2, the metal substrate 3, the frame 4, and the input / output terminal 5 can be reduced. As a result, the semiconductor package 1 can suppress cracks and cracks generated in the input / output terminals 5 and suppress the occurrence of defects in the semiconductor device 10.

  As shown in FIGS. 3, 4, and 5, in the semiconductor package 1 according to one embodiment of the present invention, the metal substrate 3 overlaps the center of the substrate 2 in plan view. Furthermore, the center of the semiconductor element 7 may overlap with the centers of the substrate 2 and the metal substrate 3. As a result, when the semiconductor package 1 is heated and when the semiconductor device 10 is operated, the substrate 2, the metal substrate 3, and the semiconductor element 7 are deviated compared to the case where the substrate 2 is displaced from the center. It becomes difficult to cause deformation and distortion. Furthermore, the heat generated from the semiconductor element 7 when the semiconductor device 10 is operated can be prevented from being biased through heat transmitted through the metal substrate 3 and the substrate 2, and efficiently radiated to the outside of the semiconductor device 10. Can do.

  As shown in FIG. 3, in the semiconductor package 1 according to the embodiment of the present invention, the end portion of the metal substrate 3 and the frame body 4 do not have to overlap in a plan view. Since the end portion of the metal substrate 3 does not overlap the frame body 4, the stress generated in the joint portion between the substrate 2 and the end portion of the metal substrate 3 when the semiconductor package 1 is manufactured and the semiconductor device 10 is operated. Can be suppressed. That is, in the plan view of the semiconductor package 1, the positions of the bonding portion between the substrate 2 and the frame body 3 and the bonding portion between the substrate 2 and the metal substrate 3 do not overlap with each other. It can suppress that the stress which arises by the expansion coefficient difference concentrates on the junction part of the board | substrate 2 and the metal substrate 3. FIG. As a result, the semiconductor package 1 can suppress cracks and cracks that occur at the junction between the end surfaces of the substrate 2 and the metal substrate 3.

  In the semiconductor package 1 according to another embodiment of the present invention, the input / output terminal 5 is notched in the center of the side surface of the frame 4 along the side adjacent to the screwing portion 23 in plan view. It may be inserted and fixed in the position. The input / output terminal 5 is made of, for example, a ceramic material, and has a smaller thermal expansion coefficient than a metal having good thermal conductivity used for the metal substrate 3. For this reason, when the board | substrate 2, the metal board | substrate 3, the frame 4, and the input / output terminal 5 are joined, a thermal stress will arise by the difference of each thermal expansion coefficient, and the load by a thermal stress will be applied to the input / output terminal 5. . In contrast, the input / output terminal 5 is provided in the center of the side surface of the frame body 4 while being positioned in a direction perpendicular to each virtual center line of the screwing portion 23 in plan view.

  In particular, when the long side of the metal substrate 3 extends in parallel with each virtual center line, the substrate 2 is easily warped due to the thermal expansion of the metal substrate 3 when thermally expanded. This is because when the amount of the substrate 2 surrounding the metal substrate 3 is small, the substrate 2 has a smaller coefficient of thermal expansion than that of the metal substrate 3, so that when the metal substrate 3 is thermally expanded, the end portion of the through hole 22. This is because there is a high possibility that the substrate 2 is pushed and the substrate 2 is warped. At this time, when the side where the screwing part 23 is provided and the side where the screwing part 23 is not provided are compared with the side where the screwing part 23 is not provided for the reason described above, the side of the side where the screwing part 23 is not provided. Is difficult to warp. That is, when the input / output terminal 5 is provided on the side surface of the frame body 4 along the side adjacent to the screwing portion 23, the input / output terminal 5 is provided on the side surface of the frame body 4 along the same side as the screwing portion 23. Compared with the case where it was done, there is little influence of the curvature of the board | substrate 2. For this reason, it is possible to reduce the possibility of cracks occurring at the joint between the input / output terminal 5 and the frame 4.

  Moreover, when it exists in the center, it becomes hard to receive the influence of the screwing part 23 most. That is, the input / output terminal 5 is positioned in a direction perpendicular to each virtual center line of the screwing portion 23 in a plan view and provided at the center of the side surface of the frame body 4, so that the input / output terminal 5 is a metal substrate. 3 is less affected by thermal expansion and contraction.

  As described above, in the semiconductor package 1 according to an embodiment of the present invention, the end of the metal substrate 3 and the frame body 4 do not have to overlap in plan view. In the semiconductor package 1 according to the embodiment, the end portion of the metal substrate 3 and the frame body 4 may overlap in a plan view. Since the metal substrate 3 is overlapped with the frame body 4, heat generated in the semiconductor element 7 can be released to the outside through the frame body 4 as well as the substrate 2 and the external mounting substrate.

  As shown in FIGS. 6 and 7, in the semiconductor package 1 according to another embodiment of the present invention, the shape of the end portion of the metal substrate 3 and the end portion of the through hole 22 protrudes outward in plan view. It may be curved. Due to the curved end of the metal substrate 3, the semiconductor package 1 is generated at the junction between the substrate 2 and the end of the metal substrate 3 when the semiconductor package 1 is manufactured and the semiconductor device 10 is operated. Thermal stress can be suppressed. Moreover, it can suppress that a thermal stress arises locally.

  This is because heat is generated when the semiconductor element 7 is operated, and the metal substrate 3 and the substrate 2 are thermally expanded by this heat. When the metal substrate 3 and the substrate 2 are thermally expanded, the metal substrate 3 has a larger thermal expansion coefficient than that of the substrate 2, and thus may contact the inner surface of the through hole 22 of the substrate 2. In this case, if the end portion of the metal substrate 3 and the end portion of the through hole 22 are curved, it is possible to suppress the occurrence of cracks at the end portion of the metal substrate 3 and the end portion of the through hole 22.

  As a result, the semiconductor package 1 according to another embodiment of the present invention can suppress cracks and cracks that occur at the junction between the end surfaces of the substrate 2 and the metal substrate 3. That is, it is possible not only to suppress the warpage of the substrate 2 while improving heat dissipation, but also to suppress the occurrence of cracks in the metal substrate 3 and the substrate 2.

<Semiconductor package manufacturing method>
When the substrate 2 is made of, for example, a metal material, the substrate 2 is made of an alloy made of iron, nickel, and cobalt, and is provided with two screwing portions 23 at both ends in the longitudinal direction of the substrate 2 processed into a rectangular shape. The screwing portions 23 are provided so that the screwing portions 23 located on opposite sides of the substrate 2 are connected to each other by two virtual center lines. Furthermore, the screwing portion 23 is provided so that the two virtual center lines are parallel to a direction orthogonal to the opposite side of the substrate 2 on which the screwing portion 23 is provided. In addition, a rectangular through hole 22 having a long side parallel to the long side direction of the metal substrate 3 in a plan view is provided in the central portion of the substrate 2, and the metal substrate 3 is fitted into the through hole 22. Insert and fix. Next, the inner peripheral surface of the through hole 22 and the side surface of the metal substrate 3 facing the inner peripheral surface are brazed and joined.

  The metal substrate 3 is made of copper, for example, of a metal material. When the metal substrate 3 is fitted into the through hole 22 and joined with the brazing material, the side surface of the metal substrate 3 and the inner peripheral surface of the through hole 22 are connected. The gap is formed so as to be able to be joined with a joining material such as a brazing material.

  In addition, when the frame body 4 is made of, for example, a metal material, the frame body 4 is made of an iron-nickel-cobalt alloy, and is formed into a frame shape by cutting and provided with a notch portion into which the input / output terminal 5 is inserted and fixed. . The frame body 4 surrounds the mounting region 21, and the input / output terminal 5 is bonded and fixed to the notch and is bonded to the upper surface of the substrate 2.

  When the input / output terminal 5 is made of, for example, an aluminum oxide sintered body, a solvent is added to alumina powder to which an appropriate amount of a sintering aid such as magnesia, silica, calcia is added, and the mixture is sufficiently kneaded and defoamed. Make a slurry. Thereafter, a roll-shaped ceramic green sheet is formed by a doctor blade method or the like and cut into an appropriate size. A signal line such as a wiring pattern is screen printed on the cut ceramic green sheet. Thereafter, it is formed by firing in a reducing atmosphere at about 1600 ° C. At this time, a plurality of ceramic green sheets may be laminated before firing.

  For example, when the substrate 2 is made of a ceramic material, magnesia, silica, calcia, or the like can be used when the substrate 2 is made of an aluminum oxide sintered body, similarly to the input / output terminal 5. A solvent is added to the alumina powder to which an appropriate amount of sintering aid is added, and the mixture is sufficiently kneaded and defoamed to prepare a slurry. Thereafter, a roll-shaped ceramic green sheet is formed by a doctor blade method or the like and cut into an appropriate size. The ceramic green sheet produced by cutting is fired in a reducing atmosphere at about 1600 ° C. to form. At this time, a plurality of ceramic green sheets may be laminated before firing.

  As described above, the semiconductor package 1 according to the embodiment of the present invention can be manufactured. In addition, the process order mentioned above is not designated.

<Configuration of semiconductor device>
Next, a semiconductor device 10 according to an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 8 is a perspective view showing a semiconductor device 10 according to an embodiment of the present invention. As shown in FIG. 8, a semiconductor device 10 according to an embodiment of the present embodiment includes a semiconductor package 1 typified by the above-described embodiment, a semiconductor element 7 mounted in a mounting region 21 of the semiconductor package 1, A lid body 6 that is bonded to the frame body 4 and seals the semiconductor element 7 is provided.

  In the semiconductor device 10 according to the embodiment of the present invention, the semiconductor element 7 is mounted on the mounting region 21 of the substrate 2. The semiconductor element 7 is electrically connected to the signal line of the input / output terminal 5 through a bonding wire. A desired input / output can be obtained from the semiconductor element 7 by inputting / outputting an external signal to / from the semiconductor element 7 via a signal line or the like.

  The lid body 6 is joined to the frame body 4 so as to seal the semiconductor element 7. Examples of the semiconductor element 7 include a semiconductor element for a power device in addition to an IC or an LSI. The lid body 6 is joined to the upper surface of the frame body 4. The semiconductor element 7 is sealed in a space surrounded by the substrate 2, the frame body 4, and the lid body 6. By sealing the semiconductor element 7 in this way, deterioration of the semiconductor element 7 due to the use of the semiconductor package 1 for a long period of time can be suppressed.

  As the lid 6, for example, a metal member such as iron, copper, nickel, chromium, cobalt, and tungsten, or an alloy made of these metals can be used. The frame body 4 and the lid body 6 can be joined by, for example, a seam welding method. Moreover, you may join the frame 4 and the cover body 6 using a gold- tin solder, for example.

As mentioned above, although the semiconductor package 1 of each embodiment and the semiconductor device 10 provided with this were demonstrated, this invention is not limited to the above-mentioned embodiment. In other words, various modifications and combinations of embodiments may be made without departing from the scope of the present invention.

DESCRIPTION OF SYMBOLS 1 Semiconductor package 2 Board | substrate 21 Mounting area | region 22 Through-hole 23 Screwing part 3 Metal substrate 4 Frame body 5 Input / output terminal 6 Cover body 7 Semiconductor element 10 Semiconductor device XX 1st virtual center line YY 2nd virtual center line

Claims (5)

A board having a rectangular shape in plan view and having two sets of screwing portions located on opposite sides, a mounting region where a semiconductor element is mounted on the upper surface, and a through hole at a position overlapping the mounting region;
A rectangular shape in a plan view, fitted into the through hole, and a metal substrate having a larger coefficient of thermal expansion than the substrate,
A frame that surrounds the upper surface of the substrate, and
The metal substrate is spaced between the first virtual center line and the second virtual center line that connect the screwing portions located on opposite sides, and is positioned between the first virtual center line and the second virtual center line. A semiconductor package characterized by that.   2. The semiconductor package according to claim 1, wherein the metal substrate has a long side extending in a direction parallel to the first virtual center line and the second virtual center line.   3. The semiconductor package according to claim 1, wherein the metal substrate is positioned so as to overlap a center of the substrate in a plan view. An input / output terminal fixed to a side wall located on the opposite side of the frame body;
4. The semiconductor package according to claim 1, wherein the input / output terminal is located on a side adjacent to the screwing portion in a plan view. A semiconductor package according to any one of claims 1 to 4,
A semiconductor element mounted in the mounting region;
A semiconductor device comprising: a cover body that covers the semiconductor element and is bonded to an upper surface of the frame body.

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