JP2018026375A - Mounting device - Google Patents

Mounting device Download PDF

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JP2018026375A
JP2018026375A JP2016155221A JP2016155221A JP2018026375A JP 2018026375 A JP2018026375 A JP 2018026375A JP 2016155221 A JP2016155221 A JP 2016155221A JP 2016155221 A JP2016155221 A JP 2016155221A JP 2018026375 A JP2018026375 A JP 2018026375A
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Prior art keywords
semiconductor wafer
wafer substrate
holding
holding unit
semiconductor
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JP6816992B2 (en
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義人 水谷
Yoshito Mizutani
義人 水谷
昇 朝日
Noboru Asahi
昇 朝日
将次 仁村
Shoji Nimura
将次 仁村
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Toray Engineering Co Ltd
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Toray Engineering Co Ltd
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Priority to JP2016155221A priority Critical patent/JP6816992B2/en
Priority to CN201780045370.9A priority patent/CN109478522A/en
Priority to KR1020197003272A priority patent/KR20190035727A/en
Priority to PCT/JP2017/028157 priority patent/WO2018030248A1/en
Priority to TW106126681A priority patent/TWI727082B/en
Publication of JP2018026375A publication Critical patent/JP2018026375A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67121Apparatus for making assemblies not otherwise provided for, e.g. package constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52Mounting semiconductor bodies in containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67092Apparatus for mechanical treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67144Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Supply And Installment Of Electrical Components (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a mounting device that hardly causes difference in mounting quality at positions within a face of a semiconductor wafer substrate while securing the alignment accuracy of thermal pressure bonding positions when semiconductor chips temporarily fixed on the semiconductor wafer substrate are implemented by thermal pressure bonding.SOLUTION: A mounting device includes: a holding unit for partially gripping a semiconductor wafer substrate; a bonding head for bonding a semiconductor chip to the semiconductor wafer substrate gripped by the holding unit by thermal pressure bonding; and a backup stage for supporting the semiconductor wafer substrate from an opposite face at a region where the bonding head carries out thermal pressure bonding. The holding unit includes adsorption means composed of a member with a thermal conductivity of 1 W/mK or less for adsorbing the opposite face of the semiconductor wafer substrate.SELECTED DRAWING: Figure 2

Description

本発明は、実装装置に関する。詳しくは、基板上に熱硬化性樹脂を介して仮固定された半導体チップを熱圧着して実装する実装装置に関する。   The present invention relates to a mounting apparatus. Specifically, the present invention relates to a mounting apparatus for mounting a semiconductor chip temporarily fixed on a substrate via a thermosetting resin by thermocompression bonding.

半導体装置製造分野において、高密度実装への要望から、三次元実装の一種であるチップオンウェハ工法(以下「COW工法と記す」)への注目が集まっている。COW工法は、分割して半導体チップになる回路部品が作り込まれた半導体ウェハ基板上に、半導体チップを接合して実装する工法であり、図8のように(半導体ウェハ基板の上面図が図8(a)、このA−A断面図が図8(b))、一枚の半導体ウェハ基板Wに多数の半導体チップCを実装するものである。   In the field of semiconductor device manufacturing, attention is focused on a chip-on-wafer method (hereinafter referred to as “COW method”), which is a kind of three-dimensional mounting, due to a demand for high-density mounting. The COW method is a method in which a semiconductor chip is bonded and mounted on a semiconductor wafer substrate on which circuit components to be divided into semiconductor chips are fabricated. As shown in FIG. FIG. 8A is a sectional view taken along the line AA in FIG. 8B, in which a large number of semiconductor chips C are mounted on one semiconductor wafer substrate W.

このように、多数の半導体チップCを半導体ウェハ基板W上に実装するのに際して、図9(a)のように未硬化の熱硬化性接着剤Rを介して半導体チップCを半導体ウェハ基板W上に仮固定してから加熱圧着を行い、半導体チップCのバンプBを溶融して半導体ウェハ基板Wの電極Eに接合するとともに、熱硬化性接着剤Rを硬化(図9(b))して機械的に固定するプロセス(以下「仮本分割プロセス」と記す)が用いられる。この仮本分割プロセスでは、仮固定状態にある複数の半導体チップCを同時に熱圧着することができる。このため、半導体チップ1つずつ所定箇所に配置して熱圧着するプロセスに比べて、全体としてのタクトタイム短縮が可能となる。   As described above, when a large number of semiconductor chips C are mounted on the semiconductor wafer substrate W, the semiconductor chips C are mounted on the semiconductor wafer substrate W via the uncured thermosetting adhesive R as shown in FIG. Is temporarily fixed to the substrate, and then thermocompression bonded, the bump B of the semiconductor chip C is melted and bonded to the electrode E of the semiconductor wafer substrate W, and the thermosetting adhesive R is cured (FIG. 9B). A mechanically fixing process (hereinafter referred to as “temporary book splitting process”) is used. In this temporary separation process, a plurality of semiconductor chips C in a temporarily fixed state can be thermocompression bonded simultaneously. For this reason, the tact time as a whole can be shortened as compared with the process in which the semiconductor chips are arranged one by one at predetermined positions and thermocompression bonded.

すなわち、仮本分割プロセスでは、半導体ウェハ基板W上に実装すべき多数の半導体チップCを(未硬化の)熱硬化性接着剤Rで仮固定してから、複数の半導体チップCを包含する範囲を同時に押圧して熱圧着を行なう(図10(a))。具体的には、図10(b)のように複数の半導体チップCを同時に押圧する押圧面SAを有するボンディングヘッド7で熱圧着する(図10(c))。図10では、一度に4個の半導体チップCを熱圧着する場合を示しており、ボンディングヘッド7で4個の半導体チップCを加熱しながら半導体ウェハ基板側に加圧して熱圧着を行なう。   In other words, in the temporary separation process, a number of semiconductor chips C to be mounted on the semiconductor wafer substrate W are temporarily fixed with the (uncured) thermosetting adhesive R, and then a plurality of semiconductor chips C are included. Are simultaneously pressed to perform thermocompression bonding (FIG. 10A). Specifically, as shown in FIG. 10B, thermocompression bonding is performed with a bonding head 7 having a pressing surface SA that simultaneously presses a plurality of semiconductor chips C (FIG. 10C). FIG. 10 shows a case where four semiconductor chips C are thermocompression bonded at a time. The four semiconductor chips C are heated by the bonding head 7 while being pressed to the semiconductor wafer substrate side to perform thermocompression bonding.

仮本分割プロセスにおいては、前述のとおり、半導体ウェハ基板W上に実装すべき多数の半導体チップCを仮固定してからボンディングヘッド7を用いて熱圧着する。このため、順次熱圧着を進める過程において、熱圧着対象の半導体チップCの周囲には、仮固定状態の半導体チップCが隣接している。ところで、これら仮固定状態の半導体チップCでは熱圧着が未実施であるため、熱硬化性接着剤Rの硬化が開始することは好ましくない。すなわち、熱圧着を行なう前に熱硬化性接着剤が硬化すると、加圧しても半導体チップCのバンプBと半導体ウェハ基板Wの電極との間の距離が縮まらずに接合不良になることがある。   In the temporary book splitting process, as described above, a large number of semiconductor chips C to be mounted on the semiconductor wafer substrate W are temporarily fixed and then thermocompression bonded using the bonding head 7. For this reason, in the process of sequentially performing the thermocompression bonding, the temporarily fixed semiconductor chip C is adjacent to the periphery of the semiconductor chip C to be thermocompression bonded. By the way, in these temporarily fixed semiconductor chips C, since thermocompression bonding has not been performed, it is not preferable that the thermosetting adhesive R starts to be cured. That is, if the thermosetting adhesive is cured before thermocompression bonding, the distance between the bumps B of the semiconductor chip C and the electrodes of the semiconductor wafer substrate W may not be reduced even when pressed, resulting in poor bonding. .

このため、ボンディングヘッド7が熱圧着する半導体チップCに隣接する半導体チップCを仮固定している熱硬化性接着剤Rの硬化開始を防ぐ必要がある。   For this reason, it is necessary to prevent the thermosetting adhesive R, which temporarily fixes the semiconductor chip C adjacent to the semiconductor chip C to which the bonding head 7 is thermocompression bonded, from starting to cure.

そこで、半導体ウェハ基板Wを半導体チップCが仮固定された面の反対側から支持する手段として、従来のような全面を支持するステージ400(図11(a))に代わり、ボンディングヘッド7が熱圧着する領域SAのみを支持するバックアップステージ4(図11(b))が用いられるようになってきている(例えば特許文献1)。このような構成にすることにより、半導体ウェハ基板Wを支持するステージを経由して、熱圧着される領域SAの外側まで加熱することはない。また、ボンディングヘッド7とバックアップステージ4による同時加熱により、熱圧着時間が短縮でき、熱圧着領域の周囲への熱影響を低減することも可能となる。   Therefore, as a means for supporting the semiconductor wafer substrate W from the side opposite to the surface on which the semiconductor chip C is temporarily fixed, the bonding head 7 is heated instead of the conventional stage 400 (FIG. 11A) that supports the entire surface. A backup stage 4 (FIG. 11 (b)) that supports only the area SA to be crimped has come to be used (for example, Patent Document 1). With such a configuration, heating to the outside of the region SA to be thermocompression bonded via the stage supporting the semiconductor wafer substrate W is not performed. Further, the simultaneous heating by the bonding head 7 and the backup stage 4 can shorten the thermocompression bonding time, and it is also possible to reduce the thermal influence on the periphery of the thermocompression bonding region.

なお、熱圧着対象の領域を移動させるに際して、従来のステージ400を用いる場合はステージ400全体で移動させるが、バックアップステージ4はボンディングヘッド7と対向させた位置に固定することが望ましいため、バックアップステージ4を用いる場合は半導体ウェハ基板Wを移動させるための手段が別途必要である。   When the conventional stage 400 is used for moving the region to be subjected to thermocompression bonding, the entire stage 400 is moved. However, since the backup stage 4 is preferably fixed at a position facing the bonding head 7, the backup stage When 4 is used, a means for moving the semiconductor wafer substrate W is required separately.

このため、図12に一例を示すような、半導体ウェハ基板Wの周縁部を保持部8を用いて部分的に把持する手法が採用されている。保持部8は、図12(a)に示すように、保持領域8Cで半導体ウェハ基板を保持する機能を有しており、保持部8が半導体ウェハ基板Wを把持した状態で移動することにより、半導体ウェハ基板Wを移動させ、ボンディングヘッド7とバックアップステージ4に対して位置合わせを行うことができる。   For this reason, as shown in an example in FIG. 12, a technique is used in which the peripheral portion of the semiconductor wafer substrate W is partially gripped using the holding unit 8. As shown in FIG. 12A, the holding unit 8 has a function of holding the semiconductor wafer substrate in the holding region 8C, and the holding unit 8 moves while holding the semiconductor wafer substrate W. The semiconductor wafer substrate W can be moved to align the bonding head 7 and the backup stage 4.

特開2009−302232号公報JP 2009-302232 A

保持部8により半導体ウェハ基板Wを把持した状態で、仮固定された半導体チップCを熱圧着して実装するのに際して、半導体ウェハ基板Wの面内位置により実装品質に差が生じることがある。すなわち、図13において、領域SA1で良好な実装品質が得られていても領域SA2では熱硬化性樹脂Rの硬化不良が生じ、領域SA2で良好な実装品質が得られる場合においては領域SA1で実装不良が生じることがある。このような、半導体ウェハ基板Wの面内位置による実装品質差は、加熱温度のプロセスマージンが狭いバンプ材料や熱硬化性接着剤Rを用いた場合に顕著である。   When the temporarily fixed semiconductor chip C is mounted by thermocompression bonding while the semiconductor wafer substrate W is held by the holding unit 8, there may be a difference in mounting quality depending on the in-plane position of the semiconductor wafer substrate W. That is, in FIG. 13, even when good mounting quality is obtained in the area SA1, the curing failure of the thermosetting resin R occurs in the area SA2, and when good mounting quality is obtained in the area SA2, mounting is performed in the area SA1. Defects may occur. Such a difference in mounting quality depending on the in-plane position of the semiconductor wafer substrate W is remarkable when a bump material or a thermosetting adhesive R with a narrow process margin of the heating temperature is used.

この半導体ウェハ基板Wの面内位置による実装品質の差は、保持部8を介した熱伝導による放熱に起因している。このため、保持部8に近い部分ほど放熱が大きくなり、半導体チップCを加熱する温度が上昇し難くなっている。   The difference in mounting quality depending on the in-plane position of the semiconductor wafer substrate W is caused by heat radiation due to heat conduction through the holding unit 8. For this reason, the heat radiation increases as the portion is closer to the holding portion 8, and the temperature at which the semiconductor chip C is heated is less likely to rise.

そこで、保持部8を介した熱伝導を低減するために、図14のように保持領域8Cを狭くすることが考えられるが、保持領域8Cを狭くすると、半導体ウェハ基板Wを安定に把持することが困難になり、半導体ウェハ基板Wの位置合わせ精度が低下してしまう。   Therefore, in order to reduce the heat conduction through the holding part 8, it is conceivable to narrow the holding region 8C as shown in FIG. 14, but when the holding region 8C is narrowed, the semiconductor wafer substrate W can be stably held. Is difficult, and the alignment accuracy of the semiconductor wafer substrate W is lowered.

本発明は上記課題に鑑みてなされたものであり、半導体ウェハ基板上に仮固定された半導体チップを熱圧着して実装するのに際して、熱圧着位置の位置合わせ精度を確保しつつ、半導体ウェハ基板面内位置での実装品質に差の生じ難い実装装置を提供するものである。   The present invention has been made in view of the above problems, and when mounting a semiconductor chip temporarily fixed on a semiconductor wafer substrate by thermocompression bonding, the semiconductor wafer substrate is secured while ensuring the alignment accuracy of the thermocompression bonding position. It is an object of the present invention to provide a mounting apparatus that hardly causes a difference in mounting quality at an in-plane position.

上記課題を解決するために、請求項1の発明は、
半導体ウェハ基板上に熱硬化性接着剤を介して仮固定された複数の半導体チップを熱圧着する実装装置であって、
前記半導体ウェハ基板を部分的に把持する保持部と、前記保持部で把持された前記半導体ウェハ基板に前記半導体チップを熱圧着するボンディングヘッドと、前記ボンディングヘッドが熱圧着する領域において、前記半導体ウェハ基板を反対面から支持するバックアップステージとを備え、
前記保持部は、前記半導体ウェハ基板の反対面を吸着する、熱伝導率が1W/mK以下の部材からなる吸着手段を有する実装装置である。
In order to solve the above problems, the invention of claim 1
A mounting device for thermocompression bonding a plurality of semiconductor chips temporarily fixed on a semiconductor wafer substrate via a thermosetting adhesive,
A holding part for partially holding the semiconductor wafer substrate, a bonding head for thermocompression bonding the semiconductor chip to the semiconductor wafer substrate held by the holding part, and a region where the bonding head is thermocompression bonded A backup stage that supports the substrate from the opposite side,
The holding unit is a mounting apparatus having a suction unit made of a member having a thermal conductivity of 1 W / mK or less that sucks the opposite surface of the semiconductor wafer substrate.

請求項2に記載の発明は、請求項1に記載の実装装置であって、
前記半導体ウェハ基板の反対面と前記保持部の上面との距離を可変できるよう、
前記保持部上面に対して前記吸着手段の先端部が変位可能な実装装置である。
Invention of Claim 2 is the mounting apparatus of Claim 1, Comprising:
To be able to vary the distance between the opposite surface of the semiconductor wafer substrate and the upper surface of the holding part,
In the mounting device, the tip of the suction means can be displaced with respect to the upper surface of the holding portion.

請求項3に記載の発明は、請求項2に記載の実装装置であって、
前記半導体ウェハ基板を移動させるときは、前記吸着手段の先端部を前記保持部の上面に揃え、前記熱圧着を行う際は、前記吸着手段の先端部を前記保持部の上面から突出させる実装装置である。
Invention of Claim 3 is the mounting apparatus of Claim 2, Comprising:
When moving the semiconductor wafer substrate, the tip of the suction unit is aligned with the upper surface of the holding unit, and when performing the thermocompression bonding, the mounting unit projects the tip of the suction unit from the upper surface of the holding unit. It is.

請求項4に記載の発明は、請求項3に記載の実装装置であって、
前記熱圧着を行う際の、前記吸着手段の先端部が前記上面から突出する高さが0.1mm以上2.0mm以下である実装装置である。
Invention of Claim 4 is the mounting apparatus of Claim 3, Comprising:
The mounting device has a height of 0.1 mm or more and 2.0 mm or less at which the tip of the suction means protrudes from the upper surface when performing the thermocompression bonding.

請求項5に記載の発明は、請求項1から請求項4の何れかに記載の実装装置であって、
前記保持部の少なくとも前記半導体ウェハ基板と接触する範囲において、熱伝導率が1W/mK以下の部材を用いる実装装置である。
Invention of Claim 5 is the mounting apparatus in any one of Claims 1-4, Comprising:
The mounting device uses a member having a thermal conductivity of 1 W / mK or less in at least a range where the holding unit is in contact with the semiconductor wafer substrate.

本発明により、半導体ウェハ基板上に仮固定された半導体チップを熱圧着して実装するのに際して、熱圧着位置の位置合わせ精度を確保しつつ、半導体ウェハ基板面内位置での実装品質に差が生じ難くなる。   According to the present invention, when mounting a semiconductor chip temporarily fixed on a semiconductor wafer substrate by thermocompression bonding, there is a difference in mounting quality at a position within the surface of the semiconductor wafer substrate while ensuring alignment accuracy of the thermocompression bonding position. It becomes difficult to occur.

本発明の実施形態に係わる実装装置の構成を示す図である。It is a figure which shows the structure of the mounting apparatus concerning embodiment of this invention. (a)本発明の実施形態に係わる実装装置の保持部の上面図である(b)同断面図である。(A) It is a top view of the holding | maintenance part of the mounting apparatus concerning embodiment of this invention, (b) It is the sectional drawing. (a)本発明の実施形態に係わる実装装置で半導体ウェハ基板の位置合わせを行うときの断面図である(b)位置合わせ完了後の断面図である(c)熱圧着を実施する状態の断面図である。(A) It is sectional drawing when aligning a semiconductor wafer substrate with the mounting apparatus concerning embodiment of this invention (b) It is sectional drawing after completion of alignment (c) Section in the state which implements thermocompression bonding FIG. (a)本発明の実施形態に係わる保持部の一例により半導体ウェハ基板を移動する際の断面図である(b)同保持部の一例の熱圧着時の状態を示す断面図である。(A) It is sectional drawing at the time of moving a semiconductor wafer substrate by an example of the holding part concerning embodiment of this invention. (B) It is sectional drawing which shows the state at the time of thermocompression bonding of an example of the holding part. (a)本発明の実施形態に係わる保持部の別例により半導体ウェハ基板を移動する際の断面図である(b)同保持部の別例の熱圧着時の状態を示す断面図である。(A) It is sectional drawing at the time of moving a semiconductor wafer substrate by another example of the holding | maintenance part concerning embodiment of this invention, (b) It is sectional drawing which shows the state at the time of thermocompression bonding of the other example of the holding | maintenance part. (a)本発明の実施形態に係わる保持部の別例が半導体ウェハ基板を吸着していない状態の断面図である(b)同保持部の別例が半導体ウェハ基板の吸着保持を開始する状態の断面図である。(A) It is sectional drawing of the state in which the other example of the holding part concerning embodiment of this invention is not adsorbing a semiconductor wafer substrate, (b) The state in which another example of the said holding part starts adsorption holding of a semiconductor wafer substrate FIG. (a)本発明の別の実施形態に係わる実装装置の保持部の上面図である(b)同断面図である。(A) It is a top view of the holding | maintenance part of the mounting apparatus concerning another embodiment of this invention, (b) It is the same sectional drawing. (a)半導体ウェハ基板上に多数の半導体チップが実装されている状態の上面図である(b)同状態の断面図である。(A) It is a top view of the state in which many semiconductor chips are mounted on the semiconductor wafer substrate, (b) It is sectional drawing of the same state. (a)半導体ウェハ基板上に未硬化の熱硬化性接着剤で半導体チップを仮固定した状態の断面図(b)同半導体チップを熱圧着した後の断面図。(A) Sectional drawing of the state which temporarily fixed the semiconductor chip with the unhardened thermosetting adhesive on the semiconductor wafer substrate. (B) Sectional drawing after carrying out thermocompression bonding of the semiconductor chip. (a)半導体ウェハ基板上に仮固定された半導体チップを複数個単位で熱圧着する例を示す上面図である(b)同図の部分的拡大図である(c)同拡大図の断面図をボンディングヘッドの断面とともに示す図である。(A) It is a top view which shows the example which carries out the thermocompression bonding of the semiconductor chip temporarily fixed on the semiconductor wafer board | substrate in multiple units. (B) It is the elements on larger scale of the figure. FIG. (a)半導体ウェハ基板上に仮固定された半導体チップを熱圧着する際の一般的なボンディングステージの断面図である(b)加熱圧着領域のみを支持するバックアップステージの断面図である。(A) It is sectional drawing of the general bonding stage at the time of thermocompression bonding the semiconductor chip temporarily fixed on the semiconductor wafer substrate. (B) It is sectional drawing of the backup stage which supports only a thermocompression bonding area | region. (a)半導体ウェハ基板の周縁部を部分的に把持する保持部の一例を示す上面図である(b)同断面図である。(A) It is a top view which shows an example of the holding part which hold | grips the peripheral part of a semiconductor wafer substrate partially, (b) It is the sectional drawing. 半導体ウェハ基板の周縁部を保持部で部分的に把持した際の、半導体ウェハ基板の面内位置と実装品質に関して説明するための図である。It is a figure for demonstrating regarding the in-plane position and mounting quality of a semiconductor wafer substrate when the peripheral part of a semiconductor wafer substrate is partially hold | gripped with a holding | maintenance part. (a)半導体ウェハ基板の周縁部を保持する際の保持領域を狭めた例を示す上面図である(b)同断面図である。(A) It is the top view which shows the example which narrowed the holding | maintenance area | region at the time of hold | maintaining the peripheral part of a semiconductor wafer substrate, (b) It is the same sectional drawing.

本発明の実施形態について、図面を用いて説明する。
まず、図1に示した本発明に係わる一実施形態である実装装置1について説明する。図1の説明において、図の左右方向をX方向、これに直行する奥行き方向をY方向、上下方向をZ方向、Z方向を回転軸として回転する方向をθ方向として説明する。
Embodiments of the present invention will be described with reference to the drawings.
First, the mounting apparatus 1 which is one embodiment according to the present invention shown in FIG. 1 will be described. In the description of FIG. 1, the left-right direction in the drawing is described as the X direction, the depth direction orthogonal thereto is the Y direction, the up-down direction is the Z direction, and the direction of rotation about the Z direction is the θ direction.

実装装置1は、図10に示したような状態で半導体ウェハ基板Wに仮固定された半導体チップCを熱圧着するものである。本実施形態において、半導体ウェハ基板Wの材質としてシリコンを想定しているが、シリコンに限定されるものではなくシリコンカーバイド(SiC)や窒化ガリウム(GaN)等の化合物半導体であってもよく、サポート基板等と貼り合せた積層体であってもよい。本発明は熱伝導率の高い材質からなる半導体ウェハ基板Wに対して有効に作用する。   The mounting apparatus 1 is for thermocompression bonding of the semiconductor chip C temporarily fixed to the semiconductor wafer substrate W in the state shown in FIG. In the present embodiment, silicon is assumed as the material of the semiconductor wafer substrate W. However, the semiconductor wafer substrate W is not limited to silicon, and may be a compound semiconductor such as silicon carbide (SiC) or gallium nitride (GaN). A laminate bonded to a substrate or the like may be used. The present invention effectively acts on the semiconductor wafer substrate W made of a material having high thermal conductivity.

実装装置1は、半導体ウェハ基板Wに仮固定された半導体チップCを複数個ずつ同時に熱圧着することが可能なものであり、基台2、可動テーブル3、バックアップステージ4、フレーム5、圧着ユニット6、ボンディングヘッド7、保持部8および保持部可動手段9を備えている。   The mounting apparatus 1 is capable of thermocompression bonding a plurality of semiconductor chips C temporarily fixed to a semiconductor wafer substrate W at a time, and includes a base 2, a movable table 3, a backup stage 4, a frame 5, and a crimping unit. 6, a bonding head 7, a holding unit 8, and a holding unit movable means 9 are provided.

基台2は実装装置1を構成する主な構造体であり、可動テーブル3、バックアップステージ4およびフレーム5を支持している。   The base 2 is a main structure constituting the mounting apparatus 1 and supports the movable table 3, the backup stage 4, and the frame 5.

可動テーブル3は、保持部8によって把持された半導体ウェハ基板Wを(半導体ウェハ基板Wの面方向の)任意な位置に移動させるものである。図1の実装装置1においては、基台2に対してY方向に移動可能なY方向可動部3aを設け、Y方向可動部3a上にX方向可動部3bを設け、X方向可動部3b上にθ方向可動部3cを設けた構造となっているが、これに限定されるものではなく、X、Yおよびθの各方向に移動して位置調整が可能な構成であればよい。ただし、可動テーブル3の可動範囲内において、可動テーブル3がバックアップステージ4に接触しない構造である必要がある。   The movable table 3 moves the semiconductor wafer substrate W gripped by the holding unit 8 to an arbitrary position (in the surface direction of the semiconductor wafer substrate W). In the mounting apparatus 1 of FIG. 1, the Y direction movable part 3a which can move to a base 2 with respect to the base 2 is provided, the X direction movable part 3b is provided on the Y direction movable part 3a, and on the X direction movable part 3b. However, the present invention is not limited to this, and any structure may be used as long as the position can be adjusted by moving in each of the X, Y, and θ directions. However, it is necessary that the movable table 3 does not contact the backup stage 4 within the movable range of the movable table 3.

バックアップステージ4は、ボンディングヘッド7により半導体ウェハ基板W上の半導体チップCを熱圧着する際に、半導体チップCが仮固定されている面(上面)の反対面(下面)から半導体ウェハ基板Wを支持するものであり、図示しない吸着機構により半導体ウェハ基板Wを部分的に吸着保持する機能を備えていることが望ましい。また、バックアップステージ4は加熱手段であるヒータを内蔵していてもよい。このヒータは、ボンディングヘッド7による熱圧着時に半導体ウェハ基板W側から加熱を行なうものである。   When the semiconductor chip C on the semiconductor wafer substrate W is thermocompression bonded by the bonding head 7, the backup stage 4 moves the semiconductor wafer substrate W from the surface (lower surface) opposite to the surface (upper surface) on which the semiconductor chip C is temporarily fixed. It is desirable to have a function of supporting and partially holding the semiconductor wafer substrate W by a suction mechanism (not shown). Further, the backup stage 4 may incorporate a heater which is a heating means. This heater performs heating from the semiconductor wafer substrate W side during thermocompression bonding by the bonding head 7.

バックアップステージ4の上面は、ボンディングヘッド7によって押圧される領域を支持する形状である必要があるが、広すぎると他の機械要素との干渉が起こりやすいので好ましくない。適切な形状にすることにより、ボンディングヘッド7の押圧面とバックアップステージ4の上面は一対を成すことになるので、半導体ウェハ基板Wの位置とは無関係に同一の平行度で加圧を行なうことができる。   The upper surface of the backup stage 4 needs to have a shape that supports a region pressed by the bonding head 7, but if it is too wide, it is not preferable because interference with other machine elements is likely to occur. By adopting an appropriate shape, the pressing surface of the bonding head 7 and the upper surface of the backup stage 4 form a pair, so that pressurization can be performed with the same parallelism regardless of the position of the semiconductor wafer substrate W. it can.

フレーム5は、圧着ユニット6を支持するものである。図1の実装装置1において、支持フレーム5は門型形状としている。これは、圧着ユニットによる加圧力が大きな場合にも適しているためである。   The frame 5 supports the crimping unit 6. In the mounting apparatus 1 of FIG. 1, the support frame 5 has a portal shape. This is because it is also suitable when the pressure applied by the crimping unit is large.

圧着ユニット6は、ボンディングヘッド7をZ方向に移動させるものである。圧着ユニット6は、図示しないサーボモータとボールねじとから構成される。圧着ユニット6は、サーボモータによってボールねじを回転させることによりボールねじの軸方向の駆動力を発生するように構成されている。圧着ユニット6は、ボールねじの軸方向がバックアップステージ4の上面に対して垂直なZ方向になるように支持フレーム5に取り付けられている。つまり、圧着ユニット6は、Z方向の駆動力(加圧力)を発生できるように構成されている。圧着ユニット6は、サーボモータの出力を制御することによりZ方向の加圧力を任意に設定できるように構成されている。なお、本実施形態において、圧着ユニット6は、サーボモータとボールねじの構成としたが、これに限定されるものではなく、空圧アクチュエータ、油圧アクチュエータやボイスコイルモータから構成してもよい。   The crimping unit 6 moves the bonding head 7 in the Z direction. The crimping unit 6 includes a servo motor and a ball screw (not shown). The crimping unit 6 is configured to generate a driving force in the axial direction of the ball screw by rotating the ball screw by a servo motor. The crimping unit 6 is attached to the support frame 5 so that the axial direction of the ball screw is in the Z direction perpendicular to the upper surface of the backup stage 4. That is, the crimping unit 6 is configured to generate a driving force (pressing force) in the Z direction. The crimping unit 6 is configured to be able to arbitrarily set the pressing force in the Z direction by controlling the output of the servo motor. In the present embodiment, the crimping unit 6 is composed of a servo motor and a ball screw, but is not limited to this, and may be composed of a pneumatic actuator, a hydraulic actuator, or a voice coil motor.

ボンディングヘッド7は、圧着ユニット6の駆動力を半導体チップCに伝達するとともに、半導体チップCを加圧して熱圧着を行うものである。ボンディングヘッド7には、半導体チップCを加熱するためのヒータが内蔵されている。またボンディングヘッド7の先端部は、複数の半導体チップCを同時に加圧する形状を有している。   The bonding head 7 transmits the driving force of the crimping unit 6 to the semiconductor chip C and pressurizes the semiconductor chip C to perform thermocompression bonding. The bonding head 7 incorporates a heater for heating the semiconductor chip C. The tip of the bonding head 7 has a shape that pressurizes a plurality of semiconductor chips C simultaneously.

ボンディングヘッド7は、圧着ユニット6を構成している図示しないボールねじナットに取り付けられている。つまり、ボンディングヘッド7は、バックアップステージ4と平行に対向するように配置されている。すなわち、ボンディングヘッド7は圧着ユニット6によってZ方向に移動されることで、バックアップステージ4に近接する。   The bonding head 7 is attached to a ball screw nut (not shown) constituting the crimping unit 6. That is, the bonding head 7 is disposed so as to face the backup stage 4 in parallel. That is, the bonding head 7 is moved in the Z direction by the pressure-bonding unit 6 and thereby approaches the backup stage 4.

保持部8は、半導体ウェハ基板Wを部分的に把持するものである。バランス良く把持するという観点から、半導体ウェハ基板Wの周縁部を保持することが好ましい。   The holding unit 8 partially holds the semiconductor wafer substrate W. From the viewpoint of gripping with good balance, it is preferable to hold the peripheral edge of the semiconductor wafer substrate W.

その例を図2に示す。図2(a)はX方向に対向した保持部8と半導体ウェハ基板Wの位置関係を示した上面図であり、図2(a)のA−A部の断面図が図2(b)である。図2(a)、図2(b)では、保持部8と半導体ウェハ基板Wの位置関係を説明するために半導体チップCの図示を省いているが、実際には半導体ウェハ基板上面WA側には多数の半導体チップCが仮固定されている。   An example is shown in FIG. 2A is a top view showing the positional relationship between the holding unit 8 and the semiconductor wafer substrate W facing each other in the X direction, and FIG. 2B is a cross-sectional view taken along the line AA in FIG. is there. 2A and 2B, the semiconductor chip C is not shown in order to explain the positional relationship between the holding unit 8 and the semiconductor wafer substrate W. A number of semiconductor chips C are temporarily fixed.

図2(b)において、保持部8には半導体ウェハ基板Wを吸着保持する吸着手段81を設けてあり、吸着手段81は吸着パッド81Pを有している。吸着パッド81Pは吸着手段81の先端部にあって、半導体ウェハ基板下面WB側(半導体ウェハ基板Wの反対面側)を部分的に吸着保持するものである。吸着パッド81Pによる吸着保持は、排気管81Vを経由した減圧によって行なわれる。ここで、吸着パッド81Pは断熱性を有し、熱伝導率が1W/mk以下の材質が用いられることが望ましい。   In FIG. 2B, the holding unit 8 is provided with a suction means 81 for sucking and holding the semiconductor wafer substrate W, and the suction means 81 has a suction pad 81P. The suction pad 81P is located at the tip of the suction means 81 and partially sucks and holds the semiconductor wafer substrate lower surface WB side (opposite surface side of the semiconductor wafer substrate W). Adsorption holding by the adsorption pad 81P is performed by pressure reduction via the exhaust pipe 81V. Here, the suction pad 81P is preferably made of a material having a heat insulating property and a thermal conductivity of 1 W / mk or less.

また、吸着手段81は吸着パッド81Pを、保持部上面8Aに対して垂直方向に変位させる機能を有している。ここで、保持部上面8Aは平坦で半導体ウェハ基板下面WB(半導体ウェハWの反対面)と平行とすることが好ましく、その場合、吸着パッド81Pによる吸着面を保持部上面8Aと揃えることで、半導体ウェハ基板下面WBは保持部上面8Aに密着保持することが可能である。一方において、吸着パッド81Pが保持部上面8Aから突出した状態にすれば、吸着パッド81P以外の領域で、半導体ウェハ基板下面WBと保持部上面8Aの間に空間を設けた状態で保持することができる。この空間が生じることにより、半導体ウェハ基板Wから保持部8への伝熱は低減する。この吸着パッド81pの突出高さは0.1mm以上あれば有効で、突出高さが大なほど伝熱性は低下するが、突出高さを大にするほど動作時間を要してタクトタイムに影響を及ぼす。実測検討から、吸着パッド81Pの突出高さは2.0mm以下が好ましい。   Further, the suction means 81 has a function of displacing the suction pad 81P in a direction perpendicular to the holding unit upper surface 8A. Here, the holding unit upper surface 8A is preferably flat and parallel to the semiconductor wafer substrate lower surface WB (opposite surface of the semiconductor wafer W). In that case, by aligning the suction surface by the suction pad 81P with the holding unit upper surface 8A, The semiconductor wafer substrate lower surface WB can be tightly held on the holding unit upper surface 8A. On the other hand, if the suction pad 81P protrudes from the holding portion upper surface 8A, it can be held in a region other than the suction pad 81P with a space provided between the semiconductor wafer substrate lower surface WB and the holding portion upper surface 8A. it can. Due to this space, heat transfer from the semiconductor wafer substrate W to the holding unit 8 is reduced. If the protrusion height of the suction pad 81p is 0.1 mm or more, it is effective. The larger the protrusion height, the lower the heat transfer performance. However, the larger the protrusion height, the longer the operation time, which affects the tact time. Effect. From the actual measurement examination, the protrusion height of the suction pad 81P is preferably 2.0 mm or less.

図2において、保持部8は2箇所に配置され、両保持部8に各2個で合計4個の吸着手段81を設けたが、これに限定されるものではない。ただし、吸着保持の安定性のために保持部8は半導体ウェハ基板Wの周縁上2箇所以上に配置され、吸着手段81は各保持部に1個以上設けられ、合計では3個以上あることが好ましい。ただし、保持部8は多すぎると平坦性が出し難くなるので配置箇所は4以下が望ましい。また、吸着手段81が多すぎると吸着手段81を介した伝熱が無視できなくなるので各保持部に3個以下であることが好ましい。   In FIG. 2, the holding portions 8 are arranged at two places, and two holding portions 8 are provided with a total of four suction means 81, but the present invention is not limited to this. However, for the stability of suction holding, the holding portions 8 are arranged at two or more positions on the periphery of the semiconductor wafer substrate W, and one or more suction means 81 are provided in each holding portion, and there are three or more in total. preferable. However, if the number of holding portions 8 is too large, it becomes difficult to obtain flatness. In addition, if there are too many adsorbing means 81, heat transfer through the adsorbing means 81 cannot be ignored.

保持部可動手段9は、可動テーブル3に対する保持部8の位置を可変する機能を有するものである。保持部可動手段9は可動テーブル3の移動に合わせて、半導体ウェハ基板Wと平行な面内で保持部8を移動させる機能を有している。また、保持部可動手段9は保持部8をZ方向(半導体ウェハ基板Wの面に垂直な方向)に移動し位置調整する機能も有している。   The holding unit moving means 9 has a function of changing the position of the holding unit 8 with respect to the movable table 3. The holding unit moving means 9 has a function of moving the holding unit 8 in a plane parallel to the semiconductor wafer substrate W in accordance with the movement of the movable table 3. The holding unit moving means 9 also has a function of moving and holding the holding unit 8 in the Z direction (direction perpendicular to the surface of the semiconductor wafer substrate W).

以下に、実装装置1により、半導体ウェハ基板Wに半導体チップCを熱圧着する前後の状態について、図3を用いて保持部8の動作を中心に説明する。   Hereinafter, the state before and after the semiconductor chip C is thermocompression bonded to the semiconductor wafer substrate W by the mounting apparatus 1 will be described with reference to FIG.

図3(a)は、半導体ウェハ基板Wの所望の箇所をボンディングヘッド7とバックアップステージ4によって熱圧着される領域に位置合わせする状態を示す断面図である。ここで、ボンディングヘッド7は上部に待機した状態であり、半導体ウェハ基板Wは保持部8に把持され、半導体ウェハ基板下面WB(半導体ウェハ基板Wの反対面)がバックアップステージ4の上面に接触しない状態が維持されている。また、保持部上面8Aが半導体ウェハ基板下面WBに密着するよう、吸着手段81は吸着パッド81Pの吸着面を保持部上面8Aと揃う高さにしている。このため、半導体ウェハ基板Wは保持部8に密着把持され、保持部8の移動に合わせた半導体ウェハ基板Wの位置調整を安定的に行える。   FIG. 3A is a cross-sectional view showing a state in which a desired portion of the semiconductor wafer substrate W is aligned with a region to be thermocompression bonded by the bonding head 7 and the backup stage 4. Here, the bonding head 7 is in a standby state at the top, the semiconductor wafer substrate W is held by the holding unit 8, and the lower surface WB of the semiconductor wafer substrate (opposite surface of the semiconductor wafer substrate W) does not contact the upper surface of the backup stage 4. State is maintained. Further, the suction means 81 is set so that the suction surface of the suction pad 81P is aligned with the holding portion upper surface 8A so that the holding portion upper surface 8A is in close contact with the semiconductor wafer substrate lower surface WB. For this reason, the semiconductor wafer substrate W is tightly held by the holding unit 8, and the position of the semiconductor wafer substrate W can be stably adjusted according to the movement of the holding unit 8.

図3(b)は、半導体ウェハ基板Wの位置合わせが終わって、熱圧着を開始する前の状態を示す断面図である。半導体ウェハ基板Wの位置合わせが終わった後に、保持部可動手段9により保持部8を下げて、半導体ウェハ基板下面WBはバックアップステージ4の上面に接触した状態となっている。この状態では、バックアップステージ4の吸着機能を稼働させることで、半導体ウェハ基板Wの(熱圧着すべき)所望の箇所をバックアップステージ4によって吸着保持することが可能となる。この後、ボンディングヘッド7を下降させることで熱圧着が行なえる。なお、タクトタイムを短縮するために、半導体ウェハ基板Wがバックアップステージ4に吸着するタイミングに合わせてボンディングヘッド7を下降することもできる。   FIG. 3B is a cross-sectional view showing a state before alignment of the semiconductor wafer substrate W is completed and before thermocompression bonding is started. After the alignment of the semiconductor wafer substrate W is completed, the holding unit 8 is lowered by the holding unit moving means 9 so that the semiconductor wafer substrate lower surface WB is in contact with the upper surface of the backup stage 4. In this state, by operating the suction function of the backup stage 4, it is possible to suck and hold a desired portion (to be thermocompression bonded) of the semiconductor wafer substrate W by the backup stage 4. Thereafter, the bonding head 7 is lowered to perform thermocompression bonding. In order to shorten the tact time, the bonding head 7 can be lowered in accordance with the timing when the semiconductor wafer substrate W is attracted to the backup stage 4.

図3(c)は、熱圧着を行なっている状態を示す断面図である。図3(b)の状態から熱圧着を開始するまでの段階で、保持部8の吸着手段81は吸着パッド81Pを保持部上面8Aから突出させている。このため、半導体ウェハ基板Wと保持部8の間の伝熱は密着している状態に比べて大幅に低減できる。結果として、半導体ウェハ基板Wの面内位置による熱圧着時の昇温特性のバラツキが低減でき、実装品質のバラツキも低減する。   FIG.3 (c) is sectional drawing which shows the state which is performing thermocompression bonding. In the stage from the state of FIG. 3B to the start of thermocompression bonding, the suction means 81 of the holding portion 8 protrudes the suction pad 81P from the holding portion upper surface 8A. For this reason, the heat transfer between the semiconductor wafer substrate W and the holding unit 8 can be significantly reduced as compared with the state of close contact. As a result, variations in temperature rise characteristics during thermocompression bonding due to the in-plane position of the semiconductor wafer substrate W can be reduced, and variations in mounting quality can also be reduced.

ところで、図3(c)においては、半導体ウェハ基板Wの中心付近の熱圧着を行なう際に、吸着パッド81Pを突出させる状態を示しているが、半導体ウェハ基板Wの中心付近の熱圧着に関しては、吸着パッド81Pの突出を省いてもよい。すなわち、熱圧着時に吸着パッド81Pを突出させるのは、保持部8を介した放熱が問題となる、保持部8に近い領域の熱圧着に限定してもよい。   Incidentally, FIG. 3C shows a state in which the suction pad 81P is protruded when performing thermocompression bonding near the center of the semiconductor wafer substrate W. Regarding thermocompression bonding near the center of the semiconductor wafer substrate W, FIG. The protrusion of the suction pad 81P may be omitted. That is, the suction pad 81P may be protruded during thermocompression bonding only to thermocompression bonding in a region near the holding portion 8 where heat dissipation through the holding portion 8 is a problem.

図3(b)から図3(c)に示すように、吸着パッド81Pを突出するよう変位させる機構の一例として、図4に示すような構成がある。図4において、吸着手段81はボールスプラインバッファ付パッドによって構成されており外筒81Tに対してストローク部81Sを滑らせることで機能するものである。   As shown in FIGS. 3B to 3C, as an example of a mechanism for displacing the suction pad 81P so as to protrude, there is a configuration as shown in FIG. In FIG. 4, the suction means 81 is composed of a pad with a ball spline buffer and functions by sliding the stroke portion 81S with respect to the outer cylinder 81T.

また、吸着パッド81Pの位置を変位させる機構の別例として、図5に示すようなベロー81Bを用いることも可能である。ベロー81Bは蛇腹状で伸縮可能であるため、図5(a)のように保持部上面8Aが半導体ウェハ基板下面WBに密着した状態から、保持部稼働手段9が保持部8を下げることにより、(半導体ウェハ基板Wがバックアップステージ4に保持されている状態であれば)吸着パッド81Pが突出し、保持部上面8Aと半導体ウェハ基板下面WBの間に隙間が生じる。   Further, as another example of the mechanism for displacing the position of the suction pad 81P, a bellow 81B as shown in FIG. 5 can be used. Since the bellows 81B is bellows-like and can be expanded and contracted, the holding unit operating means 9 lowers the holding unit 8 from the state where the holding unit upper surface 8A is in close contact with the semiconductor wafer substrate lower surface WB as shown in FIG. The suction pad 81P protrudes (if the semiconductor wafer substrate W is held on the backup stage 4), and a gap is formed between the holding unit upper surface 8A and the semiconductor wafer substrate lower surface WB.

なお、ここで用いるベロー81Bは、図6(a)のように、吸着状態ではないときは吸着パッド81Pを含めた先端部が保持部上面8Aから突出しており、吸着パッド81Pが半導体ウェハ基板下面WBに密着して吸着を開始することで(図6(b))、内部が減圧され収縮して図5(a)のように半導体ウェハ基板下面WBに保持部上面8Aを密着させる。   As shown in FIG. 6A, the bellows 81B used here has a tip portion including the suction pad 81P protruding from the holding portion upper surface 8A when the suction pad 81P is not in the suction state, and the suction pad 81P is located on the lower surface of the semiconductor wafer substrate. By adhering to the WB and starting adsorption (FIG. 6B), the inside is depressurized and contracted to bring the holding unit upper surface 8A into intimate contact with the semiconductor wafer substrate lower surface WB as shown in FIG. 5A.

以上、本発明の実施形態として、保持部8に吸着手段81を設けることで、熱圧着時半導体ウェハ基板Wと保持部8に空隙を設け、熱伝導を低減する例について説明したが、別な手段により熱伝導を低減する例についても図7を用いて説明する。   As described above, as an embodiment of the present invention, there has been described an example in which the suction unit 81 is provided in the holding unit 8 so that a gap is provided in the semiconductor wafer substrate W and the holding unit 8 during thermocompression, thereby reducing heat conduction. An example in which heat conduction is reduced by means will also be described with reference to FIG.

図7(a)はX方向に対向した保持部8と半導体ウェハ基板Wの位置関係を示した上面図であり、図7(a)のA−A部の断面図が図7(b)である。図7(a)、図7(b)では、保持部8と半導体ウェハ基板Wの位置関係を説明するために半導体チップCの図示を省いているが、実際には半導体ウェハ基板上面WA側には多数の半導体チップCが仮固定されている。   FIG. 7A is a top view showing the positional relationship between the holding unit 8 and the semiconductor wafer substrate W facing each other in the X direction, and a cross-sectional view taken along line AA in FIG. 7A is shown in FIG. is there. 7A and 7B, the semiconductor chip C is not shown in order to explain the positional relationship between the holding unit 8 and the semiconductor wafer substrate W. However, in actuality, the semiconductor chip C on the upper surface WA side of the semiconductor wafer substrate is omitted. A number of semiconductor chips C are temporarily fixed.

図7(a)、図7(b)において、保持部8の少なくとも半導体ウェハ基板Wと接触する範囲において、低熱伝導部80が設けられている。低熱伝道部80は熱伝導率が1W/mk以下の材質が用いられている。具体的な材質としては、保持部8がステンレス材等の金属によって構成されているのに対して、低熱伝導部は、セメント、ガラスクロス、セラミックファイバーまたはセラミックスによって構成されている。なお、保持部8全体が低熱伝導部80によって構成されていてもよい。ただし、低熱伝導部80に半導体ウェハ基板Wを把持するための吸着手段を設ける必要がある。   In FIGS. 7A and 7B, the low heat conduction unit 80 is provided in the holding unit 8 at least in a range in contact with the semiconductor wafer substrate W. The low heat transfer section 80 is made of a material having a thermal conductivity of 1 W / mk or less. As a specific material, the holding portion 8 is made of a metal such as a stainless material, while the low heat conducting portion is made of cement, glass cloth, ceramic fiber, or ceramics. Note that the entire holding unit 8 may be configured by the low heat conducting unit 80. However, it is necessary to provide suction means for gripping the semiconductor wafer substrate W in the low thermal conductive portion 80.

保持部8に低熱伝導部80を設けた場合、半導体ウェハ基板Wと保持部8に空間を設けた場合に比べて熱伝導を低減する効果は小さいものの、簡易な構成で保持部8を介した放熱を低減することが出来る。このため、加熱温度のプロセスマージンに応じて有効に活用することが出来る。   When the low heat conduction unit 80 is provided in the holding unit 8, the effect of reducing the heat conduction is small as compared with the case where a space is provided in the semiconductor wafer substrate W and the holding unit 8. Heat dissipation can be reduced. For this reason, it can utilize effectively according to the process margin of heating temperature.

更に、低熱伝導部80に設けた吸着手段が図1の吸着手段81と同様に、半導体ウェハ基板Wの垂直方向に変位可能に設けて、低熱伝導部80上面から突出可能な構成としてもよい。   Further, the suction means provided in the low heat conduction unit 80 may be provided so as to be displaceable in the vertical direction of the semiconductor wafer substrate W in the same manner as the suction means 81 in FIG.

1 実装装置
2 基台
3 可動テーブル
3a Y方向可動部
3b X方向可動部
3c θ方向可動部
4 バックアップステージ
5 フレーム
6 圧着ユニット
7 ボンディングヘッド
8 保持部
8A 保持部上面
9 保持部可動手段
80 低熱伝導部
81 吸着手段
81P 吸着パッド
81S ストローク部
81T 外筒
81V 排気管
B バンプ
C 半導体チップ
E 電極
R 熱硬化性接着剤
W 半導体ウェハ基板
WA 半導体ウェハ基板上面(半導体ウェハ基板の半導体チップ搭載面)
WB 半導体ウェハ基板下面(半導体ウェハ基板の反対面)
DESCRIPTION OF SYMBOLS 1 Mounting apparatus 2 Base 3 Movable table 3a Y direction movable part 3b X direction movable part 3c θ direction movable part 4 Backup stage 5 Frame 6 Crimp unit
DESCRIPTION OF SYMBOLS 7 Bonding head 8 Holding part 8A Holding part upper surface 9 Holding part movable means 80 Low heat conduction part 81 Adsorption means 81P Adsorption pad 81S Stroke part 81T Outer cylinder 81V Exhaust pipe B Bump C Semiconductor chip E Electrode R Thermosetting adhesive W Semiconductor wafer Substrate WA Semiconductor wafer substrate upper surface (semiconductor chip mounting surface of semiconductor wafer substrate)
WB Semiconductor wafer substrate lower surface (opposite surface of semiconductor wafer substrate)

Claims (5)

半導体ウェハ基板上に熱硬化性接着剤を介して仮固定された複数の半導体チップを熱圧着する実装装置であって、
前記半導体ウェハ基板を部分的に把持する保持部と、
前記保持部で把持された前記半導体ウェハ基板に前記半導体チップを熱圧着するボンディングヘッドと、
前記ボンディングヘッドが熱圧着する領域において、前記半導体ウェハ基板を反対面から支持するバックアップステージとを備え、
前記保持部は、前記半導体ウェハ基板の反対面を吸着する、熱伝導率が1W/mK以下の部材からなる吸着手段を有する実装装置。
A mounting device for thermocompression bonding a plurality of semiconductor chips temporarily fixed on a semiconductor wafer substrate via a thermosetting adhesive,
A holding part for partially gripping the semiconductor wafer substrate;
A bonding head for thermocompression bonding the semiconductor chip to the semiconductor wafer substrate held by the holding unit;
In the region where the bonding head is thermocompression-bonded, a backup stage that supports the semiconductor wafer substrate from the opposite surface,
The mounting device has a mounting device having a suction unit made of a member having a thermal conductivity of 1 W / mK or less that sucks the opposite surface of the semiconductor wafer substrate.
請求項1に記載の実装装置であって、
前記半導体ウェハ基板の反対面と前記保持部の上面との距離を可変できるよう、
前記保持部上面に対して前記吸着手段の先端部が変位可能な実装装置。
The mounting apparatus according to claim 1,
To be able to vary the distance between the opposite surface of the semiconductor wafer substrate and the upper surface of the holding part,
A mounting apparatus in which a tip portion of the suction means can be displaced with respect to an upper surface of the holding portion.
請求項2に記載の実装装置であって、
前記半導体ウェハ基板を移動させるときは、前記吸着手段の先端部を前記保持部の上面に揃え、
前記熱圧着を行う際は、前記吸着手段の先端部を前記保持部の上面から突出させる実装装置。
The mounting apparatus according to claim 2,
When moving the semiconductor wafer substrate, align the tip of the suction means with the upper surface of the holding unit,
A mounting device for causing the tip of the suction means to protrude from the upper surface of the holding portion when performing the thermocompression bonding.
請求項3に記載の実装装置であって、
前記熱圧着を行う際の、前記吸着手段の先端部が前記上面から突出する高さが0.1mm以上2.0mm以下である実装装置。
The mounting apparatus according to claim 3,
The mounting apparatus in which the height at which the tip of the suction means protrudes from the upper surface is 0.1 mm or more and 2.0 mm or less when performing the thermocompression bonding.
請求項1から請求項4の何れかに記載の実装装置であって、
前記保持部の少なくとも前記半導体ウェハ基板と接触する範囲において、熱伝導率が1W/mK以下の部材を用いる実装装置。
The mounting apparatus according to any one of claims 1 to 4,
A mounting apparatus using a member having a thermal conductivity of 1 W / mK or less in a range where at least the holding unit is in contact with the semiconductor wafer substrate.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021044445A (en) * 2019-09-12 2021-03-18 株式会社ディスコ Retention mechanism for ring frame

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7368962B2 (en) * 2019-07-09 2023-10-25 芝浦メカトロニクス株式会社 mounting equipment
CN113363219B (en) * 2021-05-11 2024-02-06 苏州通富超威半导体有限公司 BGA product, hot pressing equipment and hot pressing process

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10335391A (en) * 1997-05-29 1998-12-18 Matsushita Electric Ind Co Ltd Heating of substrate
JP2000026192A (en) * 1998-04-28 2000-01-25 Shin Etsu Handotai Co Ltd Equipment for growing thin film
JP2001176933A (en) * 1999-12-20 2001-06-29 Pfu Ltd Equipment for mounting bare chip component and its mounting method
JP2005116883A (en) * 2003-10-09 2005-04-28 Shibaura Mechatronics Corp Mounting device and mounting method for electronic component
JP2009267349A (en) * 2008-04-01 2009-11-12 Adwelds:Kk Holding device
JP2010067715A (en) * 2008-09-09 2010-03-25 Shibaura Mechatronics Corp Mounting apparatus and mounting method for electronic component
JP2012109527A (en) * 2010-10-28 2012-06-07 Hitachi Kokusai Electric Inc Substrate processing apparatus and method for manufacturing semiconductor device
JP2012204718A (en) * 2011-03-28 2012-10-22 Apic Yamada Corp Joining device and joining method
JP2014175638A (en) * 2013-03-13 2014-09-22 Dainippon Screen Mfg Co Ltd Heat treatment equipment and heat treatment method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5760212B2 (en) * 2008-06-12 2015-08-05 株式会社アドウェルズ Mounting apparatus and mounting method

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10335391A (en) * 1997-05-29 1998-12-18 Matsushita Electric Ind Co Ltd Heating of substrate
JP2000026192A (en) * 1998-04-28 2000-01-25 Shin Etsu Handotai Co Ltd Equipment for growing thin film
JP2001176933A (en) * 1999-12-20 2001-06-29 Pfu Ltd Equipment for mounting bare chip component and its mounting method
JP2005116883A (en) * 2003-10-09 2005-04-28 Shibaura Mechatronics Corp Mounting device and mounting method for electronic component
JP2009267349A (en) * 2008-04-01 2009-11-12 Adwelds:Kk Holding device
JP2010067715A (en) * 2008-09-09 2010-03-25 Shibaura Mechatronics Corp Mounting apparatus and mounting method for electronic component
JP2012109527A (en) * 2010-10-28 2012-06-07 Hitachi Kokusai Electric Inc Substrate processing apparatus and method for manufacturing semiconductor device
JP2012204718A (en) * 2011-03-28 2012-10-22 Apic Yamada Corp Joining device and joining method
JP2014175638A (en) * 2013-03-13 2014-09-22 Dainippon Screen Mfg Co Ltd Heat treatment equipment and heat treatment method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021044445A (en) * 2019-09-12 2021-03-18 株式会社ディスコ Retention mechanism for ring frame

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