JP4821091B2 - Wafer bonding equipment - Google Patents

Description

  The present invention relates to an apparatus for manufacturing a semiconductor functional device by superposing a plurality of wafers and joining electrodes together.

  In recent years, portable electronic devices such as mobile phones, notebook computers, portable audio devices, and digital cameras have made remarkable progress. Accordingly, further increase in density, miniaturization, and high-speed driving are required for the semiconductor integrated circuit used.

  Although miniaturization of semiconductor circuits has progressed, preparations for manufacturing a 45 nm node device are being delayed. The main causes are a delay in development of a high-k material (high dielectric constant material) for a gate insulator, a low-k material (low dielectric constant material) for wiring, and an increase in device heat generation. In addition, problems such as a prolonged development period of a necessary exposure apparatus and a price increase are expected, and the speed of circuit miniaturization that has been conventionally continued is inevitably reduced. Even under such circumstances, market demands such as improvement in the operation speed of semiconductor devices, advancement of functions, increase in capacity, etc. continue, and this must be answered.

  In order to meet this requirement, in addition to improving the performance of the chip itself, improvements have been made in the chip mounting technology, and in particular, efforts have been made to reduce the chip mounting area and increase the driving speed of semiconductor devices.

  In order to reduce the chip mounting area, by stacking chips, the mounting chip amount is increased without increasing the mounting area, and the effective mounting area is reduced. For example, Patent Literature 1 (Japanese Patent Laid-Open No. 2001-257307), Patent Literature 2 (Japanese Patent Laid-Open No. 2002-050735), and Patent Literature 3 (Japanese Patent Laid-Open No. 2000-349228) disclose such techniques. Document 1 is based on a wire bond system in which a chip and a chip or a chip and a mounting substrate are connected by a wire. Document 2 is based on a flip chip system in which a chip and a chip or a chip and a mounting substrate are connected via a micro bump provided on the back surface of the chip. Document 3 uses a wire bond method and a flip chip method to connect a chip and a chip or a chip and a mounting substrate.

  In order to increase the driving speed of a semiconductor device, a method realized by reducing the thickness of the chip and using a through electrode is effective. For example, Patent Document 4 (Japanese Patent Laid-Open No. 2000-208702) shows an example in which the thickness is mounted in units of microns.

  The wire bonding method requires a large occupied area larger than the occupied area of the semiconductor bare chip itself in order to stretch the wire around the semiconductor bare chip, and takes a long time because the wires are stretched one by one. On the other hand, in the flip-chip method, since the connection is made by the micro bump formed on the back surface of the semiconductor bare chip, the area for connection is not particularly required, and the area necessary for mounting the semiconductor bare chip is the semiconductor bare chip. It can be almost equal to its own area. Further, since one surface can have all the bumps, connection to the wiring board can be performed in a lump. Therefore, the flip-chip method is the most suitable method for minimizing the occupation area necessary for mounting the semiconductor bare chip to achieve high-density mounting, reducing the size of the electronic device and shortening the construction period.

  In addition to the improvement of the chip and the mounting substrate and the connection method between the chip and the chip, as a means of reducing the manufacturing cost, before separating the wafer on which the semiconductor chip is formed into individual chips in the mounting process. Rewiring layers and connection bumps are formed, and in some cases, sealing with resin is performed. A semiconductor device in which processing at the wafer level is effective is a semiconductor device having a high manufacturing yield and a small number of pins, and is particularly advantageous in the production of memory. (NIKKEI MICRODEVICE February 2000, page 56 and NIKKEI ELECTRONICS 2003.9.1 P.127).

  Therefore, by laminating a wafer provided with a lead wire penetrating inside the semiconductor substrate and connecting / thinning the lead wire, the wiring length of the circuit can be shortened, and the speed of the device and the reduction of heat generation can be realized. Further, by increasing the number of wafer lamination layers, the function of the circuit can be improved and the capacity of the memory can be increased.

  To perform three-dimensional stacking of wafers, a bonding electrode is formed on the surface of the wafer on which circuit formation has been completed, and positioning is performed so that the electrodes of two wafers or already stacked wafers and the next wafer to be stacked are aligned. Need to be contacted. This is performed by a wafer bonding apparatus. And development of the manufacturing apparatus for manufacturing such a semiconductor device is also earnestly. For example, Academic Literature 1 introduces an apparatus for aligning and bonding wafers to be bonded together. (P. Lindner et al .: 2002 Electronic Component and Technology Conference P.1439). In addition, a similar technique is disclosed in Patent Document 5 (Japanese Patent Laid-Open No. 9-148207).

When bonding electrodes between wafers having a large number of semiconductor devices (dies), the important points are uniform contact between the electrodes and appropriate activation of the electrode bonding surfaces. With respect to activation of the electrode bonding surface, heat treatment is performed or vibration is applied to the bonding surface. On the other hand, for uniform pressurization, for example, bonding at the wafer level is not used. However, in Patent Document 6 (Japanese Patent Laid-Open No. 2001-43796), a method using an elastic sheet that is expanded by a pressurized fluid is disclosed in Patent Document 7 (Japanese Patent Application Publication No. JP 2002-43363) discloses a method using a semi-spherical rubber sheet. For wafer level bonding, Patent Document 8 (Japanese Patent Laid-Open No. 2003-249425) discloses a method using a pressure difference.
JP 2001-257307 A JP 2002-050735 A JP 2000-349228 A JP 2000-208702 A JP-A-9-148207 JP 2001-43796 A JP 2002-43363 A JP 2003-249425 A

Academic literature

P.Lindner et al .: 2002 Electronic Component and Technology Conference P.1439

  In order to join electrodes on different wafers, it is important to prevent deformation of the wafer and ensure positioning accuracy. Therefore, it is necessary to vacuum-suck the back surface (non-bonded surface) of the wafer to a wafer holder with good flatness to keep the surface as flat as possible. However, if there is foreign matter such as dust on the back surface of the wafer, the wafer is deformed and the flatness of the surface is deteriorated, and there is a problem that some electrodes cannot be contacted at the time of wafer bonding. For this purpose, it is conceivable to use a holder having a reduced contact area with the wafer, such as a pin holder. However, when this type of holder is used, when the electrodes of the wafer are brought into contact with each other, pressure is generated due to the shape of the contact surface of the holder when the pressure is applied through the wafer holder, and some of the electrodes are in contact with each other. However, poor contact may occur in other parts.

  Further, even when a wafer holder with ideal flatness is used and no foreign matter is present on the back surface of the wafer, there is a problem that the wafer surface has irregularities, and all the electrodes on the surface of the wafer cannot be brought into contact. And it turned out that the method described above with respect to this problem is inadequate, and as a result of earnest examination, it came to the idea of this invention.

That is, an object of the present invention is to solve these problems and to provide means for contacting electrodes with uniform pressure over the entire wafer surface.

The present invention uses the following means in order to solve the above problems.
The first means of the present invention is:
A bonding method for bonding two semiconductor wafers having a plurality of semiconductor devices formed on at least one surface,
Holding at least one of the two wafers by applying a holding force independently for each of a plurality of regions;
Wafer bonding in which the electrodes formed on the two wafers are aligned, and then the two wafers are brought into contact with each other and switched so as to apply pressure to the holding region. Is the method.

  What is necessary after aligning the two wafers with each other is to superimpose and hold the two wafers while maintaining their positional relationship. Since the wafer is held by the positive holding force of the holder (the force attracted by the holder) at the stage where the two wafers are in contact with each other, there is no deviation in this positional relationship. In the conventional method, the holding force is then switched from positive to negative (force to pressurize the other wafer) for bonding. Then, the force becomes zero even for a moment, and the wafer is suddenly pressed against the other wafer by a negative force at the next moment, and the positional relationship is shifted. On the other hand, in the present invention, the wafer is held in a plurality of areas by an independently controllable force. When the holding force is switched from positive to negative as the total resultant force, even in the extreme case where the resultant force is zero, the force is negative in some areas and is pressed against the other wafer, and the force is positive in other areas. It is fixed to the holder with. Accordingly, there is no deviation in the positional relationship between the two wafers. Further, in the conventional pressurization over the entire surface, if there are irregularities on the surfaces to be joined, a sufficient pressing force is applied to the convex portion, but a sufficient pressing force is not applied to the concave portion. However, even if there are irregularities on the surfaces to be joined by dividing and pressing the regions as in the present invention, it is possible to apply sufficient pressure to the concave portions.

When the second means of the present invention implements the first means,
In the wafer switching method, the switching is performed sequentially with a time difference for each region.

By switching in this way, the force can be switched in a preferable order at the time of contact, and deformation of the wafer can be prevented.
When the third means of the present invention implements the second means,
In the switching, the bonding method is to sequentially switch from a region close to the center of the wafer to a peripheral region.

  When the peripheral portion is bonded first when the wafer is bonded, the peripheral portion comes into contact with the wafer surface to be bonded first and becomes concave (concave with respect to the other wafer). When a pressing force is applied to the central portion in this state, the peripheral portion of the wafer is slipped in contact with the wafer, causing damage to the wafer. On the contrary, if no slip occurs, the contact near the center of the wafer is incomplete. However, when this means is used, the central portion comes into contact with the wafer surface to be bonded first to form a convex shape, and such a problem does not occur.

The fourth means of the present invention, when performing any one of the first to third means,
At the time of the holding, an area of 50% or more of the sucked wafer surface is held in a non-contact state.

  If foreign matter such as dust is interposed in the wafer holding region of the holder on the wafer to be bonded, the held wafer has to be locally convex. If a local convex part arises, joining of a wafer will become incomplete. Normally, if 50% or more is held in a non-contact state, the influence of foreign matter is reduced, but preferably 75% or more is held in a non-contact state.

The fifth means of the present invention is:
A wafer holder for holding a semiconductor wafer having a plurality of semiconductor devices formed on at least one surface,
The holding surface of the wafer holder has a plurality of holding regions;
A wafer holder having a gas flow path arranged independently of each other for each holding region.

  When such a wafer holder is used, it is possible to fix the wafer by reducing the pressure from the flow path during wafer transfer or wafer alignment, and to press the wafer by applying pressure from the flow path when bonding the wafers together. Further, since the holding surface is divided into a plurality of holding regions, a holding force can be applied to the wafer surface for each of the plurality of regions, and the wafer bonding method of the present invention can be easily performed.

The sixth means of the present invention provides a device for the fifth means,
The holding surface has an uneven shape, and the area of the recess is 50% or more of the whole.

Thereby, the above fourth means can be easily realized, and a predetermined effect can be obtained.
The seventh means of the present invention is:
A wafer bonding apparatus for bonding two semiconductor wafers having a plurality of semiconductor devices formed on at least one surface,
An alignment mechanism for aligning two wafers;
A support mechanism for supporting the wafer holder;
A wafer moving mechanism;
Have
A controller for controlling the holding force for holding the wafer independently for each of a plurality of holding regions within the holding surface is provided.

By incorporating a holding force control program into this controller, it becomes easy to temporally control the magnitude, direction (holding or pressurization), and application timing of the holding force.
The eighth means of the present invention is:
A method of laminating two wafers,
Preparing two wafers to be laminated,
Bonding the two wafers;
And pressurizing and heating the bonded wafer,
In the step of bonding a wafer, a wafer stacking method using any one of the first to fourth means.

As described above, by using any one of the first to fourth means in the bonding process, it is possible to prevent defects in the electrode bonding over the entire surface of the wafer, thereby improving the manufacturing yield and suppressing the cost.

  As described above, when the wafer bonding method of the present invention is used, a uniform pressure can be applied to the entire surface of the wafer to be bonded without causing a lateral shift. Moreover, when the joining apparatus of the present invention is used, the joining method of the present invention can be easily carried out.

Furthermore, according to the present invention, since a holder having a small contact area between the wafer and the holder, such as a pin chuck, can be used, the distortion of the wafer is kept to a minimum and the overlay accuracy is not deteriorated.

As described in the above description of the problem solving means of the present invention, the present invention has the following operations.
The holder has a plurality of holding regions (operation region for vacuum suction or static pressure application), and the force in each region can be controlled independently. This makes it possible to pressurize the wafer with static pressure by putting gas in the other holding area while holding the wafer on the holder by a vacuum suction force in a holding area. Therefore, no lateral deviation occurs when switching between the holding force and the applied pressure. If the suction area is sequentially switched from vacuum to pressurization, the pressurization area can be increased while preventing lateral displacement. When all the suction regions are switched to the pressurizing portion, the contacted portion is pressurized and the frictional force is increased, so that no lateral displacement occurs even if there is no holding force (adsorption force). As a result, uniform electrode bonding can be obtained over the entire wafer surface.

FIG. 4 shows a wafer bonding apparatus according to the present invention, which is suitable for carrying out the wafer bonding method of the present invention.
The bonding apparatus of the present invention controls the operation of the gantry 11, the left alignment microscope 12 and the right alignment microscope 13, the actuator 14, the wafer / wafer holder conveyance unit 17 that conveys the wafer to be bonded, and the respective units attached to the gantry 11. An alignment signal processing unit 15, a pressure control unit 16, an actuator driving unit 18, and a central control unit 19. Further, a vacuum suction fixing portion U (reference numeral 22) as a fixing means for fixing the wafer holder to the gantry 11 is provided on the gantry 11, and similarly, a vacuum suction fixing portion L (as a means for fixing other wafer holders to the actuator 14). Reference numeral 23) is provided on the actuator 14. Both fixing parts are connected to a vacuum device (not shown).

  In the present invention, the alignment microscopes 12, 13, the actuator 14, and the alignment signal processing unit 15 constitute an alignment mechanism for aligning the wafer. In this example, the fiducial mark FM is simultaneously observed using two alignment microscopes. However, the fiducial mark FM may be separately observed by moving the fiducial mark FM by an actuator using one alignment microscope. . It is a matter designed according to the required accuracy. The support mechanisms for supporting the wafer holder of the present invention are the vacuum suction fixing portions 22 and 23. The wafer moving mechanism of the present invention is an actuator 14, which is an X, Y (coordinate axis parallel to the wafer surface), Z (coordinate axis perpendicular to the wafer surface) theta (rotation around the Z axis), tilt 1, tilt 2 The wafer holder and wafer can be positioned for six degrees of freedom (rotation about the X or Y axis). As the configuration of the actuator, a guide shaft and a linear motor can be used for movement in the X and Y axis directions, and a piezo element can be used for movement in the Z axis direction and rotation of theta and tilt. When the moving distance is small, a voice coil motor or a piezo can be used in the X and Y directions, and rotation and tilt can also be performed by output control of a plurality of linear motors. In addition, although a heating / cooling part may be provided in the upper part of the wafer holder WHU and the lower part of the wafer holder WHL, illustration is abbreviate | omitted. Moreover, although it is a wafer holding surface, it is preferable in order to prevent a deformation | transformation of a wafer to use the holder of a shape like a pin chuck which made the contact surface of a wafer and a holder the minimum. For example, the contact area is preferably 50% or less. For the pin chuck, see, for example, Japanese Patent Application Laid-Open No. 60-009626.

  FIG. 1 is a plan view of a holding surface 2 of a wafer holder (WHU and WHL) 1 of the present invention. The holding surface 2 has a plurality of holding areas A1, A2 and A3. The shape of the divided holding region may be a shape other than the illustrated example, for example, a concentric circle shape or a grid shape. Each region has a port 3 (see FIG. 2) for performing suction or pressurization, and each holding region of the holder is independently sucked into vacuum, released to atmospheric pressure, air or nitrogen. It is possible to inject and pressurize such gas.

  FIG. 2 is a cross-sectional view taken along line a-a ′ of the holder 1 in FIG. 1. The size of the holding area in FIG. 2 and the size of the holding area in FIG. 1 do not correspond exactly. This is because the purpose of this figure is to show the concept of the divided holding area. As described above, the holding areas A1, A2, and A3 have respective ports 3, and the ports are connected to a vacuum pump, an air release valve, and a compressor (not shown). The port 3 has a conduit formed inside so as to be pulled out to the side surface of the wafer holder. This will be explained later again.

Below, the joining method of this invention is demonstrated using the said joining apparatus of this invention.
By the function of the wafer / wafer holder transport unit 17, the wafer WU is carried in a state of being vacuum-sucked to the wafer holder WHU and fixed to the frame 11 by the fixing unit 22, and the wafer WL is carried in a state of being vacuum-sucked to the wafer holder WHL. It is fixed to the actuator 14 by a fixing portion 23. The holder WHU and the gantry 11 and the holder WHL and the actuator 14 are fixed by vacuum suction fixing or electrostatic suction fixing. (FIG. 4 shows an example of vacuum suction.) FIG. 3A shows that the holding regions A1, A2, A3 and B1, B2, B3 are attracted to hold the wafer WL and the wafer WU. It shows how it is. FIG. 3 (b) shows a state in which the wafer holder WHL holds the wafer WU by the split holding type having the holding regions B1, B2, and B3, and the wafer holder WHL holds the wafer WL by the whole surface batch holding type. The meaning of “independently” in claim 1 of the present invention means that the magnitude of the suction force / pressurizing force and the application timing of each region are controlled independently. There may be a region in which the pressure is zero.

  Next, positioning (alignment) is performed. First, two wafers are brought closer to each other by an actuator. The interval is 10μ, preferably 5μ. This value is determined by the required depth of focus of the microscope to be observed, the required position accuracy of the electrode joint, and the movement accuracy of the actuator. The fiducial marks FM provided on the wafer holders WHU and WHL are detected by the alignment microscopes 12 and 13, and the positional deviation between the marks is measured. Then, the measurement result is analyzed by the alignment signal processing unit 15, and the movement amount (rotation amount and translation amount) of the wafer necessary for alignment is obtained. The central control unit 19 controls the actuator 14 to move it by a necessary movement amount. This completes the alignment of the two wafers.

  FIG. 3 (c) is an enlarged view of a state in which the wafer holder WHU holding the wafer WU and the wafer holder WHL holding the wafer WL are overlapped (the electrodes are in position and in contact with each other). . As described above, fiducial marks FM1U, FM1L and FM2U, and FM2L are formed on wafer holder WHU and wafer holder WHL at substantially the same corresponding positions, respectively. The relative positional relationship of the marks is measured in advance. The relative relationship between the FM1L and FM2L of the wafer holder WHL and the alignment marks on the wafer WL is also measured in advance. The position of the fiducial mark is measured and the electrodes on the wafer are aligned. In this state, the wafer is clamped (pressurized) on the other wafer so as not to be displaced.

  In the present invention, the suction force in the holding area is switched to the applied pressure for this purpose. At this time, not all the holding regions are switched simultaneously, but the holding regions are sequentially switched to pressurization with a time difference. FIG. 5 shows a time chart of pressure control for each system of pressure control of the wafer holders WHU and WHL. First, as shown in FIG. 5A, the opposing system B2 is opened to atmospheric pressure. By this operation, the stress in the buffer area between the areas of the systems B3 and B1 is reduced. Next, as shown in FIG. 5B, the system B3 is changed from a vacuum (adsorption) to a pressurized state. By this operation, the upper and lower wafers in the areas of the systems A3 and B3 are pressed against each other, and the frictional force against the lateral displacement is increased, thereby preventing the lateral displacement. Next, the area | region of system | strain B1 is open | released to atmospheric pressure like FIG.5 (c). By this operation, the stress in the B1 region is relaxed. Next, as shown in FIG. 5A, the region of the system B2 is changed to a pressurized state. By this operation, the areas A2 and B2 are pressed against each other. Finally, when the system B1 is brought into a pressurized state as shown in FIG. 5C, pressure is evenly applied to the entire surface of the wafer. The wafer WU and the wafer WL do not move floating.

  In this way, when the time sequence is controlled so as to switch the holding region near the center of the wafer and then switch the peripheral region, the central portion is pressurized first, so that the positional deviation does not occur. At the same time, the wafer is prevented from being damaged by the sliding of the wafer.

When the predetermined switching is completed, the alignment / joining process is completed.
Here, the manufacturing method of the holding | maintenance area | region division type wafer holder of this invention is demonstrated. The description will be made with respect to the holding region of the previous holding region A1, taking a vacuum suction / static pressure press type holder as an example.

  Two ceramic plates larger than the wafer holding the diameter are prepared, and as shown in FIG. 6, one ceramic plate is processed with a cross groove (FIG. 6 (a)), and the other ceramic plate. In FIG. 6 (b), a gas flow hole (61) is processed at a position corresponding to the cross groove. As shown in FIG. 6 (b), a boundary holding bank (64), a pin protrusion structure (62) or a ring protrusion of the holding region is formed on the wafer holding surface of the holed ceramic plate. After processing, the two ceramics are bonded together with an inorganic bonding material such as epoxy resin and glass, metal bonding, etc., and a metal bush (63) serving as a connection end to the vacuum apparatus is embedded in the port for gas decompression and pressurization. And completion. Although it is a ceramic material, it preferably has a thermal expansion coefficient similar to that of the wafer to be laminated. For example, alumina, silicon nitride, silicon carbide, etc. are typical materials. The thickness is about 15 mm after pasting so as to have sufficient rigidity against adsorption and pressurization.

  Needless to say, the wafer in the above description includes a wafer laminate in which a plurality of wafers are laminated. That is, it can be applied to both the joining of single wafers and wafer laminates.

Here, a wafer lamination method to which the wafer bonding method of the present invention is applied will be described.
FIG. 7 shows a wafer stacking sequence.
S1: Two wafers WU and WL to be bonded are prepared. Semiconductor devices are formed on at least one surface of these wafers. The wafer may be a single wafer or a wafer stack in which a plurality of wafers are stacked.
S2: At least one of the two wafers is held by applying a holding force independently for each of the plurality of regions.
S3: One wafer is opposed to the other wafer in parallel by opening a certain gap with respect to the other wafer. The gap interval is about the depth of focus of the alignment microscope, for example, 5 to 10 μm.
S4: After measuring the positions of the fiducial marks FM1U, FM2U, FM1L and FM2L and aligning the two wafers, the wafer WL and the wafer WU are brought into contact with each other, and the wafer holder WHU and the wafer holder WHL are clamped.

The step of S4 includes a step of switching from adsorption holding to pressurization according to the present invention. The process will be described by taking the process in the case of three regions as described above as an example.
S41: The region B2 is switched from vacuum to atmospheric release.

S42: The region B3 is switched from vacuum to pressurization.
S43: The region B1 is switched from vacuum to atmospheric release.
S44: The region B2 is switched to pressurization.

S45: The region B1 is switched to pressurization.
S5: Pressurize and heat two clamped wafers.
By performing this pressurizing / heating step, the electrodes on the upper and lower wafers are pressed against each other and heated to form a metal eutectic so that the upper and lower electrodes are integrated.

The step of S5 includes the following steps, for example.
S51: Heat wafer holder WHU and wafer holder WHL.
S52: The temperature of the wafer holder WHU and the wafer holder WHL is maintained for a certain time.

The holding time is 250 to 400 degrees for 10 to 20 seconds.
As a heating method, a ceramic heater is embedded in the gantry 11 and the actuator 14 and this heater is used as a heat source.
S6: Return the temperature of the wafer holder WHU and the wafer holder WHL to room temperature.
S7: The systems A1, A2, A3, B1, B2, and B3 are changed to atmospheric pressure.

In the description of the above embodiment, the superposition process and the pressurization / superheating process are performed in the same apparatus, but there is an embodiment in which the pressurization / heating process is performed in a different place. In this case, even if the pressurizing / heating process takes a long time, there is an advantage that the productivity of the entire bonding apparatus can be increased by using a plurality of pressurizing / heating processes.

It is a remarkable industrial trend to effectively increase the density of elements by stacking semiconductor devices. This lamination requires alignment between wafers, and there is a need for a more accurate method and apparatus for that purpose. Therefore, the present invention is an inevitable technique in the semiconductor industry.

These are sectional drawings of the wafer holder of the present invention. These are sectional drawings of the wafer holder of the present invention. Indicates a state in which two wafers are overlapped with each other at a predetermined interval. Shows the main part of the wafer bonding apparatus of the present invention. These are time charts showing the switching of the force of the holding region of the present invention. These are figures which show the processing method of the wafer holder of this invention. These are the sequence diagrams of the wafer lamination process of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... wafer holder 2 ... wafer holding surface of wafer holder 3 ... decompression, pressurization port 11 ... mount 12, 12, ... alignment microscope 14 ... actuator 15 ...・ ・ Alignment signal processing unit 16 ・ ・ ・ ・ Pressure control unit 17 ・ ・ ・ ・ Wafer / wafer holder transport unit 18 ・ ・ ・ ・ Actuator drive unit 19 ・ ・ ・ ・ Central control unit 22, 23 Part
WHU, WHL ・ ・ ・ ・ Wafer holder WU, WL ・ ・ ・ ・ Wafer A1, A2, A3 ・ ・ ・ ・ Wafer holding area for holding wafer independently B1, B2, B3 ・ ・ ・ ・ Wafer for holding wafer independently Holding area
FM, FM1U, FM2U, FM1L, FM2L

Claims (6)

A bonding method for bonding two semiconductor wafers having a plurality of semiconductor devices formed on at least one surface,
Holding one of the two wafers in a first holder having a flat holding surface;
The other wafer of the two wafers is held in a second holder having a flat holding surface by applying a holding force independently for each of a plurality of holding regions,
After the electrodes formed on the two wafers are aligned with each other, the two wafers are brought into contact with each other, and the holding force of the holding area of the second holder is switched to a pressurizing force to overlap the electrodes. Together
The plurality of holding regions include a central part, a peripheral part, and an intermediate part between the central part and the peripheral part,
The switching step is sequentially performed.
Release the holding force of the intermediate part,
Switch the holding force of the central part to the applied pressure,
Release the holding force of the peripheral part,
Switch the intermediate part from open to a state where pressure is applied,
Switch the peripheral part from open to applied pressure
A wafer bonding method. Support of the second holder is executed by suction from a port provided on the holding surface,
2. The wafer bonding method according to claim 1, wherein the switching is performed by opening the port to an atmospheric pressure or pressurizing by injecting a gas. A wafer bonding method according to claim 1 or 2 , wherein
At the time of the holding, a wafer bonding method characterized by holding the area of 50% or more of the sucked wafer surface in a non-contact state. The wafer bonding method according to claim 1 , further comprising a step of pressurizing and heating the two wafers on which the electrodes are superimposed. A wafer bonding apparatus for bonding two semiconductor wafers having a plurality of semiconductor devices formed on at least one surface,
An alignment mechanism for aligning two wafers;
A support mechanism for supporting a pair of wafer holders respectively holding two wafers in a plane;
A wafer moving mechanism;
Have
The holding force and pressure pressurizing the wafer to hold the wafer for at least one of the pair of the wafer holder, have a controller to switch independently for each of a plurality of holding areas in the plane,
The plurality of holding regions include a central part, a peripheral part, and an intermediate part between the central part and the peripheral part,
The controllers are sequentially
Release the holding force of the intermediate part,
Switch the holding force of the central part to the applied pressure,
Release the holding force of the peripheral part,
Switch the intermediate part from open to a state where pressure is applied,
A wafer bonding apparatus, wherein the peripheral portion is switched from an open state to an applied pressure state . A method of laminating two wafers,
Preparing two wafers to be laminated,
Bonding the two wafers;
And pressurizing and heating the bonded wafer,
In the step of bonding the wafer,
A wafer laminating method using the wafer bonding method according to claim 1 .