JP2017507568A5 - - Google Patents

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Publication number
JP2017507568A5
JP2017507568A5 JP2016548641A JP2016548641A JP2017507568A5 JP 2017507568 A5 JP2017507568 A5 JP 2017507568A5 JP 2016548641 A JP2016548641 A JP 2016548641A JP 2016548641 A JP2016548641 A JP 2016548641A JP 2017507568 A5 JP2017507568 A5 JP 2017507568A5
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JP
Japan
Prior art keywords
clock signal
delayed clock
signal
generate
delayed
Prior art date
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Application number
JP2016548641A
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English (en)
Japanese (ja)
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JP2017507568A (ja
JP6665100B2 (ja
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Publication date
Priority claimed from US14/167,972 external-priority patent/US9166577B2/en
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Publication of JP2017507568A publication Critical patent/JP2017507568A/ja
Publication of JP2017507568A5 publication Critical patent/JP2017507568A5/ja
Application granted granted Critical
Publication of JP6665100B2 publication Critical patent/JP6665100B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2016548641A 2014-01-29 2015-01-28 差動遅延されたクロックによる変調 Expired - Fee Related JP6665100B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/167,972 US9166577B2 (en) 2014-01-29 2014-01-29 Modulation through differentially delayed clocks
US14/167,972 2014-01-29
PCT/US2015/013245 WO2015116655A1 (en) 2014-01-29 2015-01-28 Modulation through differentially delayed clocks

Publications (3)

Publication Number Publication Date
JP2017507568A JP2017507568A (ja) 2017-03-16
JP2017507568A5 true JP2017507568A5 (enExample) 2018-02-15
JP6665100B2 JP6665100B2 (ja) 2020-03-13

Family

ID=52595418

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016548641A Expired - Fee Related JP6665100B2 (ja) 2014-01-29 2015-01-28 差動遅延されたクロックによる変調

Country Status (6)

Country Link
US (1) US9166577B2 (enExample)
EP (1) EP3100352A1 (enExample)
JP (1) JP6665100B2 (enExample)
KR (1) KR20160114630A (enExample)
CN (1) CN105940604B (enExample)
WO (1) WO2015116655A1 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10680863B2 (en) * 2015-03-31 2020-06-09 Sony Corporation Modulation apparatus
US11221644B2 (en) * 2018-05-21 2022-01-11 Samsung Electronics Co., Ltd. System for transceiving data based on clock transition time

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0583502A (ja) * 1991-09-25 1993-04-02 Brother Ind Ltd 変調装置
US6032028A (en) 1996-04-12 2000-02-29 Continentral Electronics Corporation Radio transmitter apparatus and method
KR19990074228A (ko) 1998-03-03 1999-10-05 윤종용 영교차 검출을 이용한 변조장치 및 방법
US6301310B1 (en) 1998-12-14 2001-10-09 Hughes Electronics Corporation Efficient implementation for systems using CEOQPSK
KR100588753B1 (ko) 2001-12-13 2006-06-13 매그나칩 반도체 유한회사 위상쉬프트키잉 방식의 변조기
KR100746201B1 (ko) * 2006-05-13 2007-08-03 삼성전자주식회사 Ｐｗｍ변조기와 이를 구비하는 ｄ급 증폭기
US7932790B2 (en) 2006-10-27 2011-04-26 Telefonaktiebolaget Lm Ericsson (Publ) Switched modulation of a radio-frequency amplifier
US8179957B2 (en) 2007-12-11 2012-05-15 Telefonaktiebolaget L M Ericsson (Publ) Quadrature pulse-width modulation methods and apparatus
US7760041B2 (en) 2007-12-11 2010-07-20 Telefonaktiebolaget L M Ericsson (Publ) Pulse-width modulator methods and apparatus
WO2009122333A2 (en) * 2008-03-31 2009-10-08 Nxp B.V. Digital modulator
US7957712B2 (en) 2008-06-16 2011-06-07 Telefonaktiebolaget Lm Ericsson (Publ) Double-LINC switched-mode transmitter
WO2010052668A1 (en) * 2008-11-10 2010-05-14 Nxp B.V. Variable duty cycle generation for out-phasing and pwm power amplifiers
WO2011059842A2 (en) * 2009-11-12 2011-05-19 Rambus Inc. Techniques for phase detection
JP5820252B2 (ja) * 2011-11-30 2015-11-24 サクラテック株式会社 アレイアンテナ

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