JP2017154964A - Crystal substrate, ultraviolet emission element, and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a crystal substrate to be used as a practical template for a group III nitride semiconductor crystal in a nonpolar orientation.SOLUTION: A crystal substrate 1D includes an r-sapphire crystal plate 10 and an AlN buffer layer 20D having a nonpolar orientation. The AlN buffer layer 20D includes a base substrate protective layer 22 for suppressing increase of surface roughness of the AlN buffer layer 20D and a flattening layer 26 for making the surface of the AlN buffer layer flat. In order to enhance crystallinity of the AlN buffer layer 20D, a dislocation block layer for reducing a crystal defect may be added at the position between the base substrate protective layer 22 and the flattening layer 26. An ultraviolet emission element has an ultraviolet emission layer composed of an epitaxial growth layer where an n-type conductive layer, a rebonding layer, and a p-type conductive layer all of which are made of a group III nitride semiconductor crystal are arranged in that order on the surface of the crystal substrate 1D having the nonpolar AlN surface 20D.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a crystal substrate, an ultraviolet light-emitting device, and a method for manufacturing them. More particularly, the present invention relates to a crystal substrate suitable for forming an element made of a group III nitride semiconductor crystal, an ultraviolet light emitting element made of a group III nitride semiconductor crystal, and a method for manufacturing the same.

  Elements that realize various functions such as blue light emitting diodes (LEDs) and blue laser diodes (LDs) have been put into practical use by utilizing group III nitride semiconductor crystals as compound semiconductors. Solid state light sources are also required in the ultraviolet region, which is a shorter wavelength than blue, and ultraviolet light emitting diodes (UVLEDs) have been developed. Ultraviolet rays in the deep ultraviolet region of 350 nm or less in the ultraviolet region, particularly ultraviolet rays in the wavelength range of about 260 to 280 nm, which is a part of the UV-C wavelength band, are expected to have a wide range of applications extending from sterilization and water purification to medical applications. For this reason, development of LEDs in the UV-C wavelength band, that is, deep ultraviolet LEDs (DUVLEDs) is underway. A typical DUVLED configuration uses a sapphire crystal plate or an AlN single crystal substrate, and a semiconductor based on gallium aluminum nitride (AlGaN) mainly composed of aluminum (Al), gallium (Ga), and nitrogen (N). Is provided with a laminated structure. DUVLEDs have also been improved in output, and DUVLEDs that operate with an ultraviolet output of about 10 mW have been put into practical use.

  One of the technical problems of ultraviolet light emitting diodes is improvement of luminous efficiency. The use of a non-polar surface that can increase the light emission efficiency by forming a quantum well structure in the light emitting layer and further increase the overlap of both wave functions of electrons and holes has been sought. From the viewpoint of ease of crystal growth, it is advantageous to grow the C plane ((0001) plane), but in this case, polarization occurs in the thickness direction due to the difference in electronegativity. When polarization occurs, the wave functions of electrons and holes having opposite electrical polarities are biased away from each other in the thickness direction, leading to a decrease in light emission recombination probability. In addition, when the electron blocking layer is formed, the tunnel probability increases due to polarization, and the electron overflow increases. Furthermore, since the gradient of the electric field due to polarization in the light emitting layer changes depending on the carrier concentration, the emission wavelength is shifted according to the drive current.

  In order to fabricate a DUVLED using a nonpolar surface in order to fabricate a group III nitride semiconductor device, it is desirable that AlN capable of applying compressive strain be formed on the substrate. For this reason, it is useful if an AlN buffer layer having a nonpolar surface can be formed on a readily available sapphire crystal plate. Nonpolar AlN buffer layers are typically AlN layers having (1-100) orientation (referred to as “m-AlN layers” in this application) and AlN layers having (11-20) orientation ( “A-AlN layer”) can be employed. Of these, the m-AlN layer has only been reported as homoepitaxial growth employing an AlN substrate which is difficult to produce and very expensive. On the other hand, in the case of an a-AlN layer, relatively good lattice matching is obtained by a sapphire crystal plate having a (1-102) plane orientation (“r-sapphire crystal plate”).

Tomohiko Shibata et. Al., "AlN epitaxial growth on off-angle R-plane sapphire substrates by MOCVD," J. Crystal Growth, 229, 63-68 (2001) Reina Miyagawa et. Al., "A-plane AlN and AlGaN growth on r-plane sapphire by MOVPE," Phys. Status Solidi C 7, No. 7-8, 2107-2110 (2010), DOI 10.1002 / pssc.200983601 Isaac Bryan et. Al., "Homoepitaxial AlN thin films deposited on m-plane (11-00) AlN substrates by metalorganic chemical vapor deposition," J. Appl. Phys. 116, 133517 (2014); http: // dx. doi.org/10.1063/1.4897233 H. Hirayama et al., "222-282 nm AlGaN and InAlGaN-based deep-UV LEDs fabricated on high-quality AlN on sapphire," Phys. Stat. Solidi (a), 206, 1176, (2009)

  Under the background described above, an attempt has been made to grow an a-AlN layer serving as a buffer for an r-sapphire crystal plate. However, in the formed a-AlN layer, a phenomenon in which the surface is roughened by switching from the middle of growth to the columnar growth has been observed (for example, Non-Patent Document 1). In order to realize a flat a-AlN layer, treatment at a relatively high temperature such as 1450 ° C. or higher is preferable. However, when the temperature exceeds 1300 ° C., the surface of the r-sapphire crystal plate becomes rough due to oxygen desorption, and a high-quality layer cannot be formed (for example, Non-Patent Document 2).

  Further, the detailed conditions for forming a group III nitride semiconductor crystal layer such as AlGaN so as to be substantially nonpolar using the surface of the nonpolar plane orientation AlN crystal (nonpolar AlN surface) as a template are sufficient. Has not been investigated. Conventionally, no successful example has been reported on improving the light emission efficiency or avoiding the shift of the light emission wavelength by producing a DUVLED using an apolar surface using an r-sapphire crystal plate. The present inventor actually forms an a-plane-oriented AlGaN layer (a-AlGaN) which is a nonpolar plane and cannot control the ratio of AlN (Al composition ratio) in a mixed crystal of AlN and GaN as intended. Found that there is. In order to fabricate a functional element using a group III nitride semiconductor crystal layer, control of the Al composition ratio is indispensable.

  The present invention solves at least some of the above-mentioned problems, and forms a high-quality nonpolar plane-oriented AlN buffer layer for an r-sapphire crystal plate, thereby providing a group III in a nonpolar orientation. A crystal substrate serving as a highly practical template for a nitride semiconductor crystal is provided, and a composition control method for producing a device using a nonpolar orientation group III nitride semiconductor crystal is provided. Thus, the present invention contributes to high performance of the group III nitride semiconductor device.

  The inventor has conceived that the a-AlN layer is formed in a plurality of stages in order to improve the quality of the a-AlN buffer layer formed on the r-sapphire crystal plate. And it succeeded in improving the quality of the AlN buffer layer of a nonpolar surface orientation by controlling appropriately the formation conditions of each step of the a-AlN layer formed in an r-sapphire crystal plate.

  That is, in one aspect of the present invention, a crystal substrate comprising a sapphire crystal plate having an r-plane orientation and an AlN buffer layer having a plane orientation that covers at least a part of the surface of the sapphire crystal plate and becomes a nonpolar plane. The AlN buffer layer includes a base protective layer and a planarization layer, both of which are epitaxial growth layers of AlN crystals, in this order from the sapphire crystal plate side, and the base protective layer is formed of the AlN buffer layer. A crystal substrate is provided for suppressing an increase in surface roughness, wherein the planarization layer is for providing a planarized surface for the surface of the AlN buffer layer. .

  Further, the inventor of the present invention is also able to form a nonpolar plane-oriented AlGaN layer that can be formed using the above-described high-quality nonpolar plane-oriented AlN buffer layer or the surface of a nonpolar plane-oriented AlN crystal (nonpolar AlN surface). We have created a method that enables the growth of high-quality crystals and confirmed the high performance of ultraviolet light-emitting devices.

  That is, in one aspect of the present invention, a crystal substrate having a nonpolar AlN surface, an n-type conductive layer that is disposed in contact with the nonpolar AlN surface, and each is made of a group III nitride semiconductor crystal, a recombination layer, and The p-type conductive layer is an epitaxial growth layer arranged in this order from the crystal substrate side, and has an ultraviolet light emitting layer having a plane orientation to be a nonpolar plane, and is in contact with the p-type conductive layer or through another layer And a reflective electrode that is reflective to radiation UV, which is ultraviolet light emitted from the ultraviolet light emitting layer, is provided.

  In any embodiment of the present application, the crystal substrate refers to a plate-like object that is single crystal or polycrystalline and is used for supporting or maintaining a shape for some purpose. The use of the crystal substrate including the sapphire crystal plate and the AlN buffer layer is not particularly limited, although a substrate for an ultraviolet light emitting diode or an ultraviolet laser diode is typical. The specification of the plane by the mirror plane index including the designation of the crystal plane such as r-plane is in the field of crystallography. However, in this application, it is not necessarily intended to specify a geometrically perfect mirror surface index. Deviations from definitions that are intentionally set from the practical point of view, such as intentional inclination often introduced for ease of crystal growth (so-called off angle), and unintentional manufacturing deviations are also allowed. Is done.

Further, in any aspect of the present application, the fact that the AlN buffer layer covers at least a part of the surface of the sapphire substrate is disposed on at least a part of the surface of the sapphire substrate directly or via some crystal layer. It means that. If at least a part of the surface of the sapphire substrate is a plate-like one having two surfaces with a thickness of the sapphire substrate, typically the entire surface of one surface or a part of the one surface is Including. In the present application, a mixed crystal of AlN and GaN may be referred to as AlGaN, and a mixed crystal of (AlN) _x and (GaN) _1-x may be referred to as Al _x Ga _1-x N, respectively. In addition, it should be noted that the mixed crystal of AlN and GaN may contain components other than AlN and GaN (for example, InN, Mg or Si for doping that determines the conductivity type).

  In the present application, the term “ultraviolet light emitting element” generally refers to an element that emits ultraviolet light, and includes an ultraviolet laser diode in addition to an ultraviolet light emitting diode. An ultraviolet light-emitting diode (hereinafter referred to as “UVLED”), which is representative of ultraviolet light-emitting elements, is a light-emitting diode that emits electromagnetic waves (ultraviolet rays) in the ultraviolet region. UVLEDs in the wavelength range centered on deep ultraviolet, also called DUVLEDs in this application, are part of this. Similarly, an ultraviolet laser diode, which is an example of an ultraviolet light emitting diode, is a laser diode that emits ultraviolet electromagnetic waves (ultraviolet rays) by stimulated emission. In the present application, expressions in the optical field such as “light”, “light source”, “light emission”, “light extraction”, and the like are used in accordance with customary practices even for electromagnetic radiation that is not visible light, such as the ultraviolet region.

The ultraviolet light emitting layer is typically a multilayer body of AlGaN layers, that is, the composition of each layer constituting the multilayer body is Al _y Ga _1-y N (y is any value of 0 ≦ y ≦ 1). ) Composition ratio (which may include other materials), and a multilayer body in which a minute amount of an element (dopant) for further positive or negative conductivity type is further doped as necessary. The ultraviolet light emitting layer is generally formed by laminating an n-type conductive layer, a recombination layer, and a p-type conductive layer in this order, and including an accompanying layer as necessary. Note that each of the n-type conductive layer, the recombination layer, and the p-type conductive layer itself may be a multilayer film due to a quantum well structure or the like. Typical of the accompanying layer is, for example, an electron block layer or a p-type contact layer disposed from the p-type conductive layer side between the p-type conductive layer and the reflective electrode. Each of these layers may itself be a multilayer film.

  In any aspect of the present invention, it is possible to produce a crystal substrate having an AlN buffer layer having a good nonpolar plane orientation by using an r-plane oriented sapphire crystal plate. Also, in any aspect of the present invention, an AlGaN layer having a nonpolar plane orientation with a controlled composition is realized, thereby providing a high-performance ultraviolet light-emitting device utilizing a group III nitride semiconductor crystal. Is possible.

In embodiment of this invention, it is a schematic diagram which shows the structure of the crystal | crystallization board | substrate provided with the two-step film-forming AlN buffer layer formed into a film in two steps using a sapphire crystal plate. In an embodiment of the present invention, an atomic force microscope (AFM) image of the surface of the underlying protective layer under conditions where the film is formed at 1100 ° C. (FIG. 2A) and additionally annealed at 1500 ° C. (FIG. 2B) It is. In embodiment of this invention, it is a scanning electron microscope (SEM) image of the planarization layer surface formed into a film at each temperature of 1300, 1400, and 1500 degreeC (FIG. 3A-3C respectively). It is a SEM image of the surface of the planarization layer obtained on the conditions which changed V / III ratio into 12.5, 50, 500, and 5000 (FIGS. 4A-4D, respectively) in embodiment of this invention. In embodiment of this invention, it is an AFM image of the surface of the crystal substrate sample which formed the planarization layer on the conditions in which the flat surface was obtained. It is a graph which shows the relationship between the growth temperature and the full width at half maximum of an X-ray diffraction peak in the AlN buffer layer formed in the sapphire crystal plate in the embodiment of the present invention. FIG. 3 is a schematic diagram showing the structure of a three-stage deposited AlN buffer layer in which an additional AlN layer (dislocation block layer) is disposed between a base protective layer and a planarization layer using a sapphire crystal plate in an embodiment of the present invention. . It is the graph which plotted the X-ray rocking curve of the 3-step film-forming AlN buffer layer with the nonpolar surface formed combining the typical manufacturing conditions in embodiment of this invention. In embodiment of this invention, it is a graph which shows the width | variety (full width at half maximum) of the peak of the X-ray rocking curve acquired from the sample of the dislocation block layer obtained by changing growth time. It is a schematic diagram which shows the structure which formed the AlGaN layer of the nonpolar surface on the surface of the crystal substrate which formed the AlN buffer layer in the sapphire crystal board in embodiment of this invention. In the example of the embodiment of the present invention, the SEM image obtained by photographing the outermost surface of the AlGaN layer formed by changing the growth temperature to 1200 ° C. (FIG. 11A) and 1300 ° C. (FIG. 11B) and setting the V / III ratio to 25. It is. In the embodiment of the present invention, it is a graph showing the AlN mixed crystal composition ratio obtained in the film formed under the condition that the growth temperature and NH ₃ flow rate are fixed and the material supply ratio of TMAl and TMGa is changed. In the Example of embodiment of this invention, it is a graph of the theoretical calculation value which shows the relationship between material supply ratio and Al composition ratio x, when Ga desorption can be ignored (FIG. 13A) and when it is remarkable (FIG. 13B). is there. The Al composition ratio in the embodiment of the present invention is a graph showing relative NH ₃ supply. It is an AFM image of the surface of the AlGaN layer formed in the embodiment of the present invention. FIG. 16A is a schematic diagram illustrating a structure of an ultraviolet light-emitting diode provided in an embodiment of the present invention, FIG. 16A is a perspective view, and FIG. 16B is a schematic cross-sectional view. It is the emission spectrum at room temperature in the some excitation light intensity | strength obtained from the light emission operation | movement confirmation sample produced in embodiment of this invention.

  Hereinafter, embodiments of the crystal substrate, the ultraviolet light-emitting element, and the manufacturing method thereof according to the present invention will be described with reference to the drawings, taking an ultraviolet light-emitting diode (UVLED) as an example. In the description, unless otherwise specified, common parts or elements are denoted by common reference numerals throughout the drawings. Also, the drawings are not shown with the scale of each part maintained.

1. First Embodiment: Crystal Substrate In this embodiment, a high-quality AlN buffer layer is formed on an r-sapphire crystal plate to provide a crystal substrate. In the a-AlN layer on the r-sapphire crystal plate, the [0001] direction of the a-AlN layer is the [1-101] direction of the sapphire crystal plate, and the [1-100] direction of the a-AlN layer is the sapphire crystal. It grows in a positional relationship parallel to the [11-20] direction of the plate. The lattice constant difference with respect to the a-AlN layer is 3% elongation strain in the [0001] direction and 11.6% compression strain in the [1-100] direction. Growth is possible.

  Here, when an r-sapphire crystal plate is used, the roughness of the surface of sapphire becomes severe at 1300 ° C. or higher (described above, Non-Patent Document 2). Further, the importance of temperature has been pointed out in an example in which m-AlN crystals, not the intended a-AlN layer, are formed homoepitaxially on a support substrate having the same plane orientation (Non-patent Document 3). According to a report in Non-Patent Document 3, film formation at a relatively high temperature (1450 ° C. or higher) is required to realize a flat surface at the atomic level of m-AlN crystals. The inventor tried to form a-AlN on an r-sapphire crystal plate, and obtained knowledge about the growth temperature and other conditions. Then, an attempt was made to form an AlN buffer layer made of a-AlN crystals in a plurality of stages that are distinguished by the production conditions. In this embodiment, unless otherwise specified, the sapphire crystal plate and the AlN layer are an AlN buffer layer (a-AlN buffer layer) formed of an r-sapphire crystal plate or an a-AlN layer.

1-1. Improvement of temperature resistance of sapphire crystal plate: two-step AlN buffer layer An attempt was made to suppress the phenomenon of rough surface of the sapphire crystal plate, which is an obstacle to the formation of an AlN layer at a high temperature. The inventor of the present application firstly forms a two-step process of forming an AlN layer for protecting the surface of the sapphire crystal plate, that is, a base protective layer, and a layer for providing a planarized AlN layer surface, that is, a planarizing layer. An AlN buffer layer was formed by epitaxial growth of the film. FIG. 1 is a schematic diagram showing the structure of a crystal substrate 1D having a two-stage film-forming AlN buffer layer 20D formed using a sapphire crystal plate 10 in two stages.

The sapphire crystal plate 10 has a (1-102) plane orientation and an off angle of 0.5 °. A base protective layer 22 and a planarizing layer 26 were formed on the surface under various conditions by MOCVD, to obtain a two-stage deposited AlN buffer layer 20D. At this time, the base protective layer 22 had a substrate temperature of 1100 ° C. and a thickness of about 30 nm. The planarizing layer 26 was formed to a thickness of about 2 μm by changing the temperature in the range of 1300 to 1500 ° C. for each test sample. The pressure condition at the time of film formation in these layers was 76 Torr (1.013 × 10 ⁴ Pa).

  When the base protective layer 22 was formed with a V / III ratio of the source gas of 5000: 1, a small island-like AlN region was formed under the film forming conditions of 1100 ° C. The V / III ratio is the supply ratio of the gas for group V element (ammonia) and the gas for group III element (TMAl). Group V: Group III is expressed as 5000: 1 etc. For convenience, it is also described as a V / III ratio of 5000. FIG. 2 shows an atomic force microscope (AFM) of the surface of the underlying protective layer in a sample as it was deposited at 1100 ° C. (FIG. 2A) and a sample that was additionally annealed at 1500 ° C. (FIG. 2B). It is a statue. The AFM image in FIG. 2 was acquired in an area of 1 μm × 1 μm. As shown in FIG. 2, even when the formed AlN base protective layer 22 was heated to 1500 ° C. as it was, no significant change in the surface morphology occurred. From this result, it was confirmed that the underlying protective layer 22 formed exhibited an action of suppressing the surface roughness of r-sapphire under temperature conditions up to about 1500 ° C. In addition, since the temperature of 1500 degreeC has no problem normally in operating a MOCVD apparatus, there are few practical problems. Further, it is possible to form the base protective layer 22 at a higher temperature as long as it is not higher than the decomposition temperature of AlN.

In the planarization layer 26 formed subsequent to the base protective layer 22, the conditions for the surface of the AlN layer planarized by changing the conditions of the growth temperature and the V / III ratio were investigated. First, the V / III ratio was fixed to 500, and the growth surfaces were changed to compare the surfaces formed. FIG. 3 is a scanning electron microscope (SEM) image of the planarized layer surface formed at each temperature of 1300, 1400, and 1500 ° C. in the order of FIGS. In a comparison between 1300 and 1500 ° C., it was confirmed that the flatness improved as the temperature increased. Specifically, at 1300 ° C., fine irregularities were formed on the surface of the planarizing layer 26, and only a white cloudy AlN layer was obtained by visual observation. On the other hand, at 1400 ° C. or 1500 ° C., a good mirror surface surface was obtained visually. However, as seen in the SEM images of FIGS. 3B and 3C, void-like structural defects were observed at 1400 ° C. or 1500 ° C., and the defect densities were 1 × 10 ⁸ cm ⁻² (1400 ° C.) and 3 × 10 ^7. It decreased with the rise of cm ^<-2> (1500 degreeC) and growth temperature. This phenomenon is thought to be because the diffusion of Al atoms is promoted at high temperatures. The surface roughness of the sapphire crystal plate 10 at a high temperature is continuously suppressed by the formation of the base protective layer 22, and the roughness is a problem at a temperature of 1300 to 1500 ° C. when the planarizing layer 26 is formed. Never happened. Considering report examples (Non-patent Documents 1 and 2) in which the roughness of sapphire becomes a problem by raising the temperature, the result of the present embodiment that the problem is not caused when the planarizing layer 26 is formed is that the underlying protective layer 22 It can be said that this is functional evidence.

  In order to control the diffusion of Al atoms to obtain a higher quality surface, an attempt was made to produce a two-stage deposited AlN buffer layer 20D for the crystal substrate 1D by changing the V / III ratio. FIG. 4 is an SEM image of the planarized layer surface obtained under the conditions in which the V / III ratio was changed to 12.5, 50, 500, and 5000 in the order of FIGS. The aim is to control the diffusion behavior of Al atoms on the surface by the V / III ratio. The other conditions for forming the planarizing layer 26 were a growth temperature fixed at 1500 ° C. and a gas (TMAl) supply amount for group III elements fixed at 20 sccm. The film forming conditions of the base protective layer 22 are not changed.

  As shown in FIG. 4, as the V / III ratio decreased from 5000 to 500, 50, the individual size of void-like defects was reduced on the surface of the planarizing layer 26, and the density thereof was also reduced. As a result, it was confirmed that the surface of the planarization layer 26 can be flattened by reducing the V / III ratio to about 50. This is considered because the diffusion of Al atoms is promoted by lowering the V / III ratio. This is a condition change corresponding to the promotion of the diffusion of Al atoms by increasing the growth temperature. However, when the V / III ratio was extremely reduced to 12.5, a wave-like structure was developed as shown in FIG. 4A and a flat surface was not obtained. This wave-like structure is a structure showing irregularities in the <0001> axis direction, and seems to be a phenomenon peculiar to a nonpolar surface such as anisotropy of the growth rate on the + c plane and the −c plane. This means that there is an optimum value for the V / III ratio in the growth of nonpolar surfaces. Note that the V / III ratio at the time of forming the base protective layer 22 is sufficient as long as the function of surface protection is exhibited, and is not limited to special conditions.

Furthermore, the surface of the crystal substrate 1D sample (FIG. 4B) on which the planarization layer 26 was formed under the conditions of a V / III ratio of 50 and a growth temperature of 1500 ° C. at which a flat surface was obtained was observed by AFM. FIG. 5 is an AFM image of the surface of the crystal substrate 1D sample (FIG. 4B). The AFM image of FIG. 5 was acquired in an area of 1 μm × 1 μm. The surface of the planarization layer 26 obtained at a V / III ratio of 50 had an average square roughness (RMS value) of 2.2 nm, and it was confirmed that the surface was extremely flat. The RMS value is Rq = (Σ _i (z _i −z _ave ) ² ) ^1/2 / N
Is calculated by Where N is the total number of measurement points included in the measurement area, z _i is the height value of the measurement points in the measurement area identified by the index i, z _{ave is} the average value of the z _i values in the measurement area, and Σ _i is a sum operation symbol over index i. By setting the RMS value to 10 nm or less, for example, it becomes easy to form a quantum well of a light emitting element. In particular, an RMS value of 3 nm or less is preferable because the interface of the quantum well becomes clear.

  As described above, by providing the base protective layer 22 and the planarization layer 26 on the r-sapphire crystal plate 10, the crystal substrate 1D having the two-layer AlN buffer layer 20D having a flat surface is manufactured. succeeded in. The RMS value of 2.2 nm shows sufficient flatness as a template for forming an element made of a group III nitride semiconductor crystal having a quantum structure (quantum well structure) or the like.

1-2. Improvement for achieving both crystallinity and flatness: three-stage deposited AlN buffer layer Next, the crystallinity of the AlN buffer layer was investigated in order to further improve the quality of crystals grown later as a template for crystal growth. In order to investigate the compatibility with the above-described good flattening, the investigation target is the condition of the two-stage deposited AlN buffer layer 20D from which the AFM image of FIG. The growth temperature was changed in the range up to.

  FIG. 6 is a graph showing the growth temperature and the full width at half maximum of the X-ray diffraction peak in the AlN buffer layer formed on the sapphire crystal plate 10. The full width at half maximum of the X-ray diffraction peak is calculated from the X-ray rocking curve in the ω scan mode for samples prepared at growth temperatures of 1300, 1400, and 1500 ° C., and c in the a plane, that is, the (11-20) plane The measurement was performed for the axial and m-axis directions and for the (10-11) plane which is a semipolar plane. As indicated by the full width at half maximum, the AlN buffer layer that provides a narrow X-ray diffraction peak corresponding to good crystallinity is higher than the high temperature, which is a condition with good flatness, in the growth temperature range of 1300 to 1500 ° C. Rather, it is formed at a low temperature. From this experimental fact, even if the present inventors succeeded in planarization by forming the planarization layer 26 at a high temperature (1500 ° C.) like the two-step AlN buffer layer 20D of the crystal substrate 1D, the crystallinity is further increased. I thought there was room for improvement.

  Based on the above-mentioned examination, the present inventor has achieved both crystallinity and flatness by adopting a three-stage film formation in which an additional AlN layer is disposed at a position sandwiched between the base protective layer 22 and the flattening layer 26. I expected it to be so FIG. 7 shows a three-stage AlN buffer layer according to this embodiment in which an additional AlN layer (dislocation block layer 24) is disposed between the base protective layer 22 and the planarization layer 26 using the r-sapphire crystal plate 10. It is a schematic diagram which shows the structure of 20T. The three-stage AlN buffer layer 20T is formed by using the sapphire crystal plate 10 to form the base protective layer 22, the dislocation block layer 24, and the planarization layer 26 in this order by epitaxial growth of AlN crystals. In order to use the surface of the planarization layer 26 of the three-stage deposited AlN buffer layer 20T as a template more suitable for crystal growth, the production conditions of the dislocation block layer 24 were investigated.

  The role that the dislocation blocking layer 24 should play in the three-stage deposited AlN buffer layer 20T is to reduce crystal defects, particularly dislocations (block threading dislocations) through its growth. That is, the dislocation block layer 24 is formed following the island structure (FIG. 2) formed by the base protective layer 22. For this reason, although the crystal | crystallization of the foundation | substrate protective layer 22 is inferior to the flatness of the surface, it forms with high coherence with respect to the crystal lattice of the sapphire crystal plate 10. FIG. When the planarization layer 26 is formed at a high temperature (for example, a growth temperature of 1500 ° C.) subsequent to the base protective layer 22 as in the two-step AlN buffer layer 20D, planarization is achieved, but the crystallinity is At that time, it is realized by the underlying protective layer 22 and is taken over as it is. Therefore, if the crystallinity of the underlying protective layer 22 can be further enhanced by using the dislocation block layer 24 formed subsequently thereto, the planarization layer 26 has a sufficient planarization effect, so that the crystallinity and flatness can be improved. It is assumed that it is possible to achieve both.

The growth conditions required for the dislocation block layer 24 are, in short, the conditions that can form a film with high crystallinity and do not exhibit a strong flattening action like the flattening layer 26. As shown in FIG. 6, film formation at a low temperature is desirable in the range of 1300 to 1500 ° C. However, the growth temperature (T1) of the base protective layer 22 is a temperature that does not roughen the surface of the sapphire crystal plate 10, and there is no problem even if the planarizing layer is formed at a high temperature in the two-step AlN buffer layer 20D. For this reason, the growth temperature (T2) of the dislocation block layer 24 can be set to be equal to or higher than the growth temperature T1 of the base protective layer 22. Further, if the growth temperature T2 of the dislocation block layer 24 is set to a high temperature like the growth temperature (T3) of the planarization layer 26, the same planarization action as the planarization layer 26 occurs, which is not preferable. From these combinations, the preferred temperature relationship is:
T1 ≦ T2 <T3
It becomes.

There is a more preferable range in the relational expression of the temperature, specifically,
T1 ≦ 1200 ℃
T1 ≦ T2 ≦ 1300 ° C
1400 ° C ≦ T3
It is. That is, the growth temperature T1 of the base protective layer 22 is a temperature that does not roughen the surface of the sapphire crystal plate 10, and is preferably set to 1200 ° C. or lower. However, since the crystallinity of AlN is better than about 1100 ° C., the lower limit of the growth temperature T1 of the base protective layer 22 is determined from the viewpoint of the crystallinity. The growth temperature T3 of the planarization layer 26 is set to 1400 ° C. or higher so that the planarization effect can be exhibited. Then, the growth temperature T2 of the dislocation block layer 24 is set to 1300 ° C. or lower so that the flattening action is unlikely to occur, and is set to be higher than the growth temperature T1 of the base protective layer 22 so that a good crystal can be grown. Since the growth temperature T2 of the dislocation blocking layer 24 starts to have a flattening action at about 1300 ° C., it is more preferable that the growth temperature T2 is further lowered to increase the function of blocking dislocations when approaching the growth temperature T1 of the underlying protective layer 22. Can do.

  Conditions other than temperature are also determined according to the function of each layer described above. Preferably, a V / III ratio that causes an island-like structure to appear is employed in the film formation conditions of the base protective layer 22. The V / III ratio of the dislocation block layer 24 has a certain range.

  A typical manufacturing condition for the three-step deposited AlN buffer layer 20T that satisfies the above conditions is 30 nm under the conditions of a growth temperature of 1100 ° C. and a V / III ratio of 5000 for the base protective layer 22 in the same manner as described above. To form. Subsequently, the dislocation block layer 24 is formed to a thickness of 1 μm under conditions of a growth temperature of 1200 ° C. and a V / III ratio of 50. Subsequently, the planarizing layer 26 is formed to a thickness of 2 μm under conditions of a growth temperature of 1200 ° C. and a V / III ratio of 50.

  FIG. 8 relates to the c-axis of the (11-20) plane which is one of the planes parallel to the c-axis of the three-stage deposited AlN buffer layer 20T having a nonpolar plane formed by combining the above typical manufacturing conditions. It is the graph which plotted the X-ray rocking curve. For comparison, a curve of a two-stage deposited AlN buffer layer 20D (FIG. 1) that does not employ a dislocation block layer is also plotted. When compared with the full width at half maximum, the peak of the two-stage deposited AlN buffer layer 20D was 1100 arcsec, whereas the peak of the three-stage deposited AlN buffer layer 20T was 620 arcsec. Although not shown, it was confirmed that the full width at half maximum, which was 2500 arcsec when there was no dislocation block layer, was reduced to 1200 arcsec by disposing the dislocation block layer even in the other plane orientation (10-11). . From these results, it was confirmed that the crystallinity was actually greatly improved in the three-stage AlN buffer layer 20T having the dislocation block layer 24 added thereto. In particular, the X-ray rocking curve with respect to the c-axis of the (11-20) plane is 1000 arcsec or less only in the case of the three-stage AlN buffer layer 20T, and in two stages by the three-stage AlN buffer layer 20T. It was confirmed that a good quality template was realized as compared with the deposited AlN buffer layer 20D.

  In the three-stage deposited AlN buffer layer 20T, the surface roughness of the outermost surface was comparable to that in the two-stage deposited AlN buffer layer 20D. That is, even if the dislocation block layer 24 is employed, the flatness obtained on the planarized layer surface is not affected, and the RMS value on the planarized layer surface is measured to be about 2 nm.

  Regarding the phenomenon of the growth process of the dislocation block layer 24, the present inventor predicts that the following phenomenon occurs. The dislocation block layer 24 grows while maintaining sufficient coherence with respect to the sapphire crystal plate 10 through the base protective layer 22. At this time, since the irregularities of the island-like structure (FIG. 2) formed on the surface of the base protective layer 22 are reflected, the facets that are minute surfaces of various plane orientations at the initial growth stage of the dislocation block layer 24 are each facet. The growth proceeds by reflecting the difference in the growth rate. In particular, the macroscopic plane orientation of the entire growing AlN layer is the (11-20) plane, but the (10-1-2) plane facet inclined from this plane has a high growth rate. As a result of the fast growth of the facets of the (10-1-2) plane, the growth of the dislocation block layer 24 progresses while burying small islands among the islands of the base protective layer 22, and dislocations that are crystal defects are dislocation block layers 24. It extends diagonally from the normal of the macroscopic surface (perpendicular direction). Since the facets are aggregated by encountering facets from different directions, the number of dislocations decreases along with this aggregation, so that the dislocations decrease during the growth of the dislocation block layer 24. In other words, the dislocation block layer 24 whose conditions are appropriately determined has an effect of sufficiently reducing the number of dislocations and improving the crystallinity by simply forming the dislocation block layer 24 to a certain thickness. In this process, the irregularities of the island-like structure may appear or increase on the surface as it is, which is desirable for blocking dislocations, and a flattening layer 26 is provided later. Since sufficient flatness is obtained, there is no particular problem.

  As described above, using a sapphire crystal plate, the peak relating to the (11-20) plane of the X-ray rocking curve has both high crystallinity and high flatness with a full width at half maximum of about 620 arcsec and an RMS value of about 2 nm. It has been demonstrated that a nonpolar plane orientation AlN buffer layer is feasible.

  In the growth of the dislocation blocking layer 24, an important index from the viewpoint of the function of blocking dislocations is the thickness D2 of the dislocation blocking layer 24, and the number of threading dislocations can be reduced to the desired level. It is. In order to determine a range of preferable values for the thickness D2 of the dislocation block layer 24, an index having a length dimension in some amount for indexing the fineness of the surface shape is used. For example, the size characterizing the island-like structure of the underlying protective layer (FIG. 2) can be a reference for this indicator.

  Therefore, it was investigated how the crystallinity changes according to the thickness D2 of the dislocation block layer 24. FIG. 9 shows the peak width (full width at half maximum) of the X-ray rocking curve obtained from each sample of the dislocation block layer 24 obtained by changing the growth time for several diffraction peaks. The sample that has acquired the X-ray rocking curve is one in which the dislocation block layer 24 is formed and the planarization layer 26 is not formed. The growth conditions for producing this sample are as follows. The dislocation blocking layer 24 was epitaxially grown by the MOCVD process for the growth time indicated on the horizontal axis of the graph under the conditions of a substrate temperature of 1200 ° C. and a V / III ratio of 50. In each sample, the film forming conditions for the base protective layer 22 and the film forming conditions for the dislocation block layer 24 other than the growth time are common. For this reason, the thickness D2 of the dislocation block layer 24 formed is substantially proportional to the growth time on the horizontal axis of the graph, and the growth times of 10 minutes, 30 minutes, and 60 minutes are about 0.3 μm, 1 μm, and 2 μm, respectively. Corresponds to the thickness D2. The label “(002) c” indicates a peak obtained from a rocking curve around the c-axis of the diffraction peak (002). Similarly, “(002) m” is around the m-axis of the diffraction peak (002), and “(102)” is that of the diffraction peak (102).

  From this result, it was confirmed that the crystallinity generally improved as the thickness D2 of the dislocation blocking layer 24 increased in the range of 0.3 μm to 2 μm. For this reason, it can be said that the function of blocking dislocations expected in the dislocation blocking layer 24 is perfect with the thickness. More specifically, the crystallinity is greatly improved when the thickness D2 of the dislocation blocking layer 24 is changed from 0.3 μm to 1 μm, whereas the crystallinity is not significantly changed even when the thickness D2 is 2 μm. That is, the dislocation blocking function of the dislocation blocking layer 24 has a relationship that the thickness D2 increases with the thickness up to about 1 μm, is saturated with the thickness of about 1 μm, and does not change thereafter. Since good crystallinity means that the density of crystal defects (threading dislocations) penetrating through the thickness of the base protective layer 22 is reduced, the dislocation blocking function of the dislocation blocking layer 24 is actually about 1 μm thick. It was confirmed that it was sufficiently obtained with This indicates that it is preferable to form the dislocation block layer 24 with a thickness of about 1 μm in order to obtain the effect even if the growth time is shortened, and 1 μm when there is no restriction on the growth time. It shows that the dislocation block layer 24 is preferably formed to a thickness with a certain margin with the degree as the lower limit. As can be seen in the AFM images of FIGS. 2A and 2B, the island-like structure on the surface of the base protective layer 22 is composed of a large number of islands in the AlN region that can be characterized by submicron sizes. As described above, the unevenness effect due to the island-like structure of the base protective layer 22 is eliminated by the dislocation block layer 24 having a thickness of about 1 μm, which is about several times the size characterizing the island, and the dislocation block has such a thickness. It was confirmed that the function was saturated. When the size characterizing the island on the base protective layer 22 changes, the lower limit value of the preferable range as the thickness of the dislocation blocking layer 24 can be changed from about 1 μm to another value accordingly.

  A preferable thickness can be determined for the other layers forming the three-stage AlN buffer layer 20T. The base protective layer 22 is formed at a temperature at which the surface of the sapphire crystal plate 10 serving as a base is not roughened. The thickness D1 of the base protective layer 22 is determined so that the surface roughness of the sapphire crystal plate 10 does not increase the surface roughness of the entire three-stage deposited AlN buffer layer 20T. This thickness is very thin, and the aforementioned 30 nm is sufficient. The thickness D3 of the planarization layer 26 can be determined as a thickness sufficient for planarization. Since how much roughness is generated at the time when the flattening layer is formed depends on this thickness D3, the surface of the dislocation block layer 24 has some unevenness, and after the flattening layer 26 is formed. If the surface of the three-stage AlN buffer layer 20T is flattened, the thickness D3 of the flattened layer is set appropriately.

2. Second Embodiment: Element Produced with AlGaN Layer Next, a method for forming an AlGaN layer having a nonpolar surface according to a second embodiment of the present application will be described. FIG. 10 shows a nonpolar plane on the surface of the crystal substrate 1D or 1T on which the a-plane two-step AlN buffer layer 20D or the three-step AlN buffer layer 20T is formed on the r-sapphire crystal plate 10. A structure in which a plane orientation AlGaN layer 30 is formed is schematically shown. Unless otherwise specified, the AlGaN layer and the AlN buffer layer have an a-plane orientation, and the sapphire crystal plate has an r-plane orientation. Here, the AlGaN layer 30 is formed of an aN-oriented AlN buffer layer, such as the two-stage deposited AlN buffer layer 20D and the three-stage deposited AlN buffer layer 20T of the first embodiment, or other nonpolar plane-oriented AlN. The crystal surface is used as a template. Since the AlGaN layer 30 is formed for an element (for example, an LED element) manufactured by the AlGaN layer, the AlGaN layer 30 is not only formed with crystals of a quality necessary for element manufacturing but also desired Al A composition ratio needs to be realized.

2-1. Flatness In order to determine the film forming conditions of the AlGaN layer 30 shown in FIG. 10, the growth temperature is changed within a relatively high range of 1200 to 1400 ° C., and the V / III ratio is also within a range of 2.5 to 250. Experiments were performed with changes. Each sample was formed using a two-stage deposited AlN buffer layer 20D (FIG. 1) that does not employ the dislocation block layer 24. The normal growth temperature of the AlGaN layer is less than 1200 ° C.

  11A and 11B are SEM images obtained by photographing the outermost surface of the AlGaN layer 30 (thickness: about 2 μm) formed by changing the growth temperature to 1200 ° C. and 1300 ° C. and setting the V / III ratio to 25, respectively. In the case where the AlGaN layer 30 is formed in a nonpolar plane orientation, it was confirmed that a flat surface can be realized at a growth temperature of a relatively high temperature (1300 ° C. or higher, FIG. 11B). That is, as shown in FIG. 11A, at the growth temperature of 1200 ° C., a large number of facets on the (1-101) plane appeared and the phenomenon that the surface was roughened was observed. This roughness was particularly severe as the Al composition was small. On the other hand, under the condition of 1300 ° C., a flat surface could be formed over the entire range of the material supply ratio that increases the Al composition.

2-2. Control of AlN mixed crystal composition ratio For the purpose of controlling Al composition, the material supply ratio of aluminum and gallium source gas (trimethylaluminum (TMAl) and trimethylgallium (TMGa)) was changed. Turned out to be difficult. FIG. 12 is a graph showing the AlN mixed crystal composition ratio obtained in a film formed under the conditions that the growth temperature is fixed at 1300 ° C. and the NH ₃ flow rate is fixed at 100 sccm and the material supply ratio of TMAl and TMGa is changed. is there. The horizontal axis is the flow rate of TMAl with respect to the total flow rate of TMAl and TMGa, and the vertical axis is the Al mixed crystal composition ratio. As a reason why the Al mixed crystal composition ratio is not reflected in spite of a large change in the material supply ratio depending on the flow rate, Ga desorption is dominant due to high vapor pressure in a high temperature environment such as 1300 ° C. The inventor thought that this was because of this.

More specifically, the Al composition ratio x is given by the following equation under a low temperature condition in which the detachment of the material is negligible.
On the other hand, when Ga desorption becomes significant at high temperature,
The Al composition ratio x is given by the relational expression. FIG. 13 is a graph of theoretical calculation values showing the relationship between the material supply ratio and the Al composition ratio x when Ga desorption can be ignored (FIG. 13A) and when it is remarkable (FIG. 13B). When Ga desorption is negligible, the Al composition ratio x changes so as to be approximately proportional to the material supply ratio. On the other hand, when Ga desorption is significant, the Al composition ratio x has a very small material supply ratio. The range, that is, the horizontal axis rapidly increases in the range up to about 0.2, and then slowly changes. For this reason, when Ga desorption is significant, a change in controlling the Al composition ratio x by changing the condition of the material supply ratio is too sensitive in a region where the material supply ratio is very small, and too insensitive beyond that region.

Therefore, in order to realize the control of the composition ratio corresponding to Ga desorption, the analysis was performed based on the equilibrium theory. The growth reaction of AlN at the gas phase / solid phase interface corresponding to the molecular species involved in the reaction is
Al (g) + NH ₃ (g) = AlN (s) + 3 / 2H ₂ (g)
It is expressed. Similarly, the growth reaction of GaN is
Ga (g) + NH ₃ (g) = GaN (s) + 3 / 2H ₂ (g)
It is expressed. The reaction rate is calculated by the law of mass action and is common to III-N, that is, AlN or GaN.
It is expressed by the relationship. Where a _III-N is the activity of III-N, that is, AlN or GaN, and P is the partial pressure of the material indicated by the subscript. Since the equilibrium constant K is kept constant, it can be said that if the NH ₃ partial pressure P _NH3 is increased, the equilibrium in the growth reaction is biased to the right and Ga is less likely to leave. That is, it is expected that it is effective to control _PNH3 in order to adjust the composition ratio between Al with little desorption and Ga that is easily desorbed.

Based on the analysis described above, an experiment was conducted in which the NH ₃ partial pressure P _NH3 was changed by controlling the V / III ratio. FIG. 14 is a graph showing the Al composition ratio with respect to the NH ₃ supply amount. The growth temperature was fixed at 1300 ° C., and other conditions including the ratio of TMAl and TMGa were also constant. As clearly shown in the graph of FIG. 14, the Al mixed crystal composition ratio shown on the vertical axis showed a clear polygonal line dependency on the NH ₃ supply amount shown on the horizontal axis. Specifically, in the low V / III ratio region where the NH ₃ supply amount is 100 sccm or less, Ga desorption cannot be suppressed, and the AlN composition ratio remains constant. On the other hand, in the region of the high V / III ratio of the NH ₃ supply amount exceeding 100 sccm, the Al composition ratio decreased as the NH ₃ supply amount was increased. Controllability that can be adjusted to a desired Al composition ratio simply by adjusting the NH ₃ supply amount is a process for producing an element with an AlGaN composition, particularly a crystal growth process for forming a quantum well structure by modulating the Al composition ratio. Is extremely useful.

The control of the Al composition ratio by the NH ₃ supply amount can be combined with the control of the material supply ratio of TMAl and TMGa. Even in the case of high temperature, a sufficient amount of NH ₃ is required to change from the dependency that is difficult to control as shown in FIG. 13B to the dependency that is easily controlled by the material supply ratio as shown in FIG. 13A. This is because it may be supplied. That is, the crystal growth process for forming the quantum well structure that modulates the Al composition ratio is grown while ensuring flatness, for example, by MOCVD at a temperature exceeding 1200 ° C. In the MOCVD method under these conditions, if the ammonia gas partial pressure in the source gas is increased to a sufficient amount, the Al composition ratio after film formation can be controlled in accordance with the material supply ratio.

  Next, surface observation was performed to reconfirm whether or not the flat surface in the high-temperature film formation shown in FIG. 11B can be obtained even with different Al composition ratios. If a flat surface is obtained during growth in the element forming the quantum well, the interface of the quantum well layer becomes smooth, and flatness is an index for the availability of nonpolar plane orientation AlGaN formed by high temperature film formation. It is to become. In FIG. 15, the film was formed to have a thickness of 1.5 μm under film forming conditions in which 1300 ° C., a V / III ratio of 100: 1, and an Al composition ratio x matched 0.5 with a barrier and 0.4 with a well. 2 is an AFM image of the surface of an AlGaN layer 30. The AFM image in FIG. 15 was acquired in an area of 5 μm × 5 μm. As shown in the drawing, a relatively flat nonpolar plane orientation AlGaN was formed, and the measured RMS value was 7.1 nm.

  As described above, the AlGaN layer 30 exhibiting good flatness was actually formed using the two-stage deposited AlN buffer layer 20D. In addition, the inventors have found a method of controlling the Al composition ratio of the AlGaN layer 30 by a method that is consistent with the formation conditions of the three-stage AlN buffer layer 20T. The AlGaN layer 30 confirmed in the experiment was due to the two-stage AlN buffer layer 20D that does not employ the dislocation block layer 24, but the non-polar plane three-layer AlN that employs the dislocation block layer 24. Even if nonpolar plane AlGaN is formed using the buffer layer 20T as a template, the same flatness and better crystallinity can be expected.

2-3. Confirmation of Ultraviolet Light Emission Operation and Structure of Ultraviolet Light Emitting Element The present inventor has confirmed by experiments that ultraviolet light emission is realized from a quantum well structure fabricated using the above-described crystal growth method. The sample with a quantum well structure (light emission operation confirmation sample) produced in the experiment is a nonpolar surface AlGaN having a flat interface using a crystal substrate having a nonpolar AlN buffer layer formed on the surface of a sapphire crystal plate. The quantum well structure is fabricated by forming and modulating the composition of the nonpolar plane AlGaN. The light emission operation confirmation sample is for the purpose of confirming the formation characteristics of the crystal or quantum well structure produced through the characteristics of ultraviolet light emission, and does not have a complete structure for a light emitting diode (LED).

FIG. 16 is a schematic view showing the structure of the ultraviolet light emitting diode 1000 provided in the present embodiment, FIG. 16A is a perspective view, and FIG. 16B is a schematic sectional view. In the ultraviolet light-emitting diode 1000, the AlN buffer layer 120 is formed in two stages on one surface 114 of a sapphire crystal plate 110 having a r-plane orientation that is a generally flat α-Al ₂ O ₃ single crystal and a nonpolar surface. Similar to the AlN buffer layer 20D (FIG. 1) or the three-stage deposited AlN buffer layer 20T (FIG. 7), it is epitaxially grown so as to have an a-plane orientation. Thus, the crystal substrate 101 is manufactured. The crystal substrate 101 has the same structure as the crystal substrate 1D (FIG. 1). The ultraviolet light emitting layer 130 in which the composition of each layer is controlled by applying the control method of the Al composition ratio by NH ₃ confirmed in the AlGaN layer 30 (FIG. 10) is in contact with the AlN buffer layer 120 on the outermost surface of the crystal substrate 101. Be placed. The crystal of the ultraviolet light emitting layer 130 is also epitaxially grown with respect to the AlN buffer layer 120. The ultraviolet light emitting layer 130 is configured such that an n-type conductive layer 132, a recombination layer 134, and a p-type conductive layer 136 are sequentially stacked from the AlN buffer layer 120 side. The material of the ultraviolet light emitting layer 130 is typically a composition doped with AlGaN or a trace element (Si for n-type, Mg for p-type, etc.). A first electrode 140 is electrically connected to the n-type conductive layer 132. On the other hand, the p-type conductive layer 136 is provided with a p-type contact layer 150 and a reflective electrode 160 that acts as a second electrode. The reflective electrode 160 is reflective and may be a multilayer film as necessary to establish ohmic contact. Electrical connection with the p-type conductive layer 136 is established via the p-type contact layer 150. Then, the light output L is radiated from the light extraction surface 112 which is the other surface of the sapphire crystal plate 110.

The AlN buffer layer 120 preferably has a high crystallinity including the dislocation block layer 24 similar to the three-stage deposited AlN buffer layer 20T. However, the AlN buffer layer 120 has a dislocation block layer like the two-stage deposited AlN buffer layer 20D. Even if only the base protective layer 22 and the planarizing layer 26 are formed without forming the layer 24, a good quantum well structure of the ultraviolet light emitting layer 130 can be formed. The AlN buffer layer 120 is formed to a thickness of about 2 to 3 μm, for example. For the ultraviolet light emitting layer 130, the n-type conductive layer 132 is, for example, an Al _0.60 Ga _0.40 N layer doped with Si so as to be n-type, that is, Al _0.60 Ga _0.40 N; Si layer. . The recombination layer 134 is an MQW (multiple quantum well) stack in which thin films having a composition of Al _0.60 Ga _0.40 N and Al _0.53 Ga _0.47 N are stacked so as to have a superlattice structure. The number of quantum wells in the recombination layer 134 is about 3, for example. The p-type conductive layer 136 is an AlGaN; Mg layer, that is, an AlGaN layer doped with Mg so as to be p-type. In the ultraviolet light emitting diode 1000 of this embodiment, an electron blocking layer 138 may be optionally provided on the p-type conductive layer 136. In this case, the electron block layer 138 is made of, for example, MQB. The p-type contact layer 150 is made of, for example, GaN which is gallium nitride doped with magnesium; a material containing Mg or Al, that is, a material obtained by doping Mg into a mixed crystal (AlGaN) material of AlN and GaN. The first electrode 140 is a metal electrode having a Ni / Au laminated structure from the base side. This Ni is a thin layer having a thickness of, for example, 25 nm inserted between Au and the underlying semiconductor layer in order to realize ohmic contact. For this embodiment, an ultraviolet light emitting diode 1000 having the above structure is manufactured.

In the light emission operation confirmation sample for confirming the ultraviolet light emission operation, up to the ultraviolet light emission layer 130 of the structure of the ultraviolet light emitting diode 1000 is manufactured, but Al _{0.60 in} which Si doping is omitted from the n-type conductive layer 132. It was set as the layer of _Ga0.40N . The recombination layer 134 was manufactured including the quantum well as described above including the MQW (multiple quantum well) stack. The p-type conductive layer 136, the electron block layer 138, and the electrode were omitted. FIG. 17 is a photoluminescence emission spectrum at room temperature at a plurality of excitation light intensities obtained from the produced light emission operation confirmation sample. As shown in FIG. 17, from the light emission operation confirmation sample, UV-C region emission was actually observed from a quantum well structure made of an AlGaN composition with a nonpolar plane orientation, and the peak wavelength was about 287 nm. . The emission behavior at several excitation light intensities did not change or change in the wavelength distribution of the emission spectrum nor the peak wavelength, although the emission intensity changed according to the excitation light intensity. The light emission in which the characteristics of the nonpolar AlGaN composition in the UV-C wavelength region have not been reported so far. In the light emission operation confirmation sample prepared for confirming the characteristics of the ultraviolet light emitting diode 1000, the inventor actually produced light emission as intended using a nonpolar plane orientation in a non-polar AlGaN quantum well. It is thought that the quantum well structure was fabricated.

2-4. Modification 1: AlN Crystal Substrate As a first modification of the second embodiment, an aN-plane AlN crystal substrate may be employed instead of the sapphire crystal plate 110 described above. All the explanations in the case of employing the sapphire crystal plate 110 are also applied to this modification example employing an AlN crystal substrate. In this modification, the AlN buffer layer 120 may be omitted. The ultraviolet light emitting layer 130 for Modification 1 is formed by epitaxial growth of AlGaN as in FIG. 16, and is disposed in contact with the r-AlN crystal of the substrate or buffer layer (if used). Even when an AlN crystal substrate is used, the effectiveness of controlling the Al composition ratio in AlGaN by the NH ₃ supply amount can be similarly expected.

3. Modified Example 2 of Each Embodiment: Application to Electric Equipment The ultraviolet emission source having the characteristics of the ultraviolet light emitting diode 1000 of the second embodiment and improved efficiency also increases the usefulness of electric equipment using the same. Such an electrical device is arbitrary and not particularly limited. Non-limiting examples of such electrical equipment include sterilization devices, water purification devices, chemical substance decomposition devices (including exhaust gas purification devices), information recording / reproducing devices, and the like. When operating these electric devices, if an ultraviolet radiation source with high efficiency is obtained, power for operation can be suppressed, environmental load is reduced, and running cost is also suppressed. In addition, if the efficiency of the emission source is increased, not only the number of emission sources themselves can be suppressed in the configuration of these electric devices, but also the heat dissipation structure, the configuration of the drive power source, and the like are simplified. These contribute to the reduction in size and weight of electrical equipment, and the equipment price is also suppressed.

4). Summary In the first embodiment of the present invention, a technology related to an AlN buffer layer on a nonpolar surface is provided. The nonpolar AlN buffer layer was able to realize a crystal substrate formed on the surface of the r-sapphire crystal plate so as to suppress the surface roughness and to have a flattened surface. It was also confirmed that crystal dislocations can be blocked as necessary. In the second embodiment, a non-polar AlGaN layer related technology is provided. It was confirmed that the nonpolar AlGaN layer can control the Al composition ratio according to the NH ₃ flow rate. Further, an ultraviolet light emitting element having a quantum well structure made of nonpolar AlGaN was actually fabricated, and light emission in the UV-C region was confirmed. These techniques are important techniques for realizing an ultraviolet light emitting element, particularly a practical nonpolar DUVLED.

  The embodiment of the present invention has been specifically described above. Each of the above-described embodiments and configuration examples are described for explaining the invention, and the scope of the invention of the present application should be determined based on the description of the claims. Moreover, the modification which exists in the scope of the present invention including other combinations of each embodiment is also included in a claim.

  The crystal substrate of the present invention is a useful member for crystal growth using it. Moreover, the ultraviolet light-emitting device of the present invention can be used for any electrical device that generates ultraviolet light.

1D, 1T, 101 Crystal substrate 1000 Ultraviolet light emitting diode (ultraviolet light emitting element)
112 Light extraction surface 114 One surface of sapphire crystal plate 10, 110 r-sapphire crystal plate 20D, 120 Two-stage film formation AlN buffer layer 20T Three-stage film formation AlN buffer layer 22 Underlayer protection layer 24 Dislocation block layer 26 Planarization layer 30 AlGaN layer 130 UV light emitting layer 132 n-type conductive layer 134 recombination layer 136 p-type conductive layer 138 electron block layer 140 first electrode 150 p-type contact layer 160 reflective electrode

Claims (24)

a sapphire crystal plate having an r-plane orientation;
A crystal substrate that covers at least a part of the surface of the sapphire crystal plate and has an AlN buffer layer having a plane orientation to be a nonpolar plane,
The AlN buffer layer includes a base protective layer and a planarization layer, both of which are epitaxially grown AlN crystals, in this order from the sapphire crystal plate side.
The base protective layer is for suppressing an increase in surface roughness of the AlN buffer layer,
The planarization layer is for providing a planarized surface for the surface of the AlN buffer layer;
Crystal substrate. The AlN buffer layer includes a dislocation block layer, which is an epitaxially grown layer of AlN crystal, between the base protective layer and the planarization layer,
The crystal substrate according to claim 1, wherein the dislocation block layer has a thickness for reducing the number of crystal defects in the AlN buffer layer. The planarization layer has at least a part of its surface exhibiting an average square roughness of 10 nm or less.
The crystal substrate according to claim 1,
However, the mean square roughness: Rq = (Σ _i (z _i -z _ave ) ² ) ^1/2 / N,
Here, N: the total number of measurement points included in the measurement area,
z _i : height value of the measurement point in the measurement area distinguished by the index i,
z _ave : average value of z _i values in the measurement area, and Σ _i : sum operation symbol over index i. The surface protective layer has an island-like surface, and the dislocation block layer has a thickness filling the island-like structure.
The crystal substrate according to claim 2. The thickness of the dislocation block layer is 1 μm or more;
The crystal substrate according to claim 2, wherein a density of threading dislocations reaching the planarized surface through the AlN buffer layer is reduced by the dislocation block layer. The AlN buffer layer exhibits crystallinity having a full width at half maximum with a peak in the X-ray rocking curve in the ω scan mode of 1000 arcsec or less in the c-axis direction of the (11-20) plane.
The crystal substrate according to claim 2. A crystal substrate having a nonpolar AlN surface;
An n-type conductive layer, a recombination layer, and a p-type conductive layer, all of which are made of a group III nitride semiconductor crystal, are arranged in this order from the crystal substrate side. An ultraviolet light emitting layer having a plane orientation to be a nonpolar plane,
Adopting a nonpolar crystal substrate, which is disposed in contact with the p-type conductive layer or through another layer, and has a reflective electrode that is reflective to radiation UV, which is ultraviolet light emitted from the ultraviolet light emitting layer. Ultraviolet light emitting device. The group III nitride semiconductor crystal is a mixed crystal containing AlN and GaN, and includes a plurality of layers having different composition ratios, and is grown while ensuring flatness by MOCVD at a temperature exceeding 1200 ° C. ,
The composition ratio is controlled by increasing or decreasing the ammonia gas partial pressure in the raw material gas of the MOCVD method.
The ultraviolet light-emitting device according to claim 7. The group III nitride semiconductor crystal is a mixed crystal containing AlN and GaN, and includes a plurality of layers having different composition ratios, and is grown while ensuring flatness by MOCVD at a temperature exceeding 1200 ° C. ,
The material supply is performed under the condition that the partial pressure of ammonia gas in the MOCVD source gas is increased so that the composition ratio can be modulated by the material supply ratio of the source gas of aluminum and gallium at the temperature. The ultraviolet light emitting element according to claim 7, which is controlled by changing a ratio. The crystal substrate comprises a sapphire crystal plate having an r-plane orientation and an AlN buffer layer covering at least a part of the surface of the sapphire crystal plate,
The AlN buffer layer includes a base protective layer and a planarization layer, both of which are epitaxially grown AlN crystals, in this order from the sapphire crystal plate side.
The base protective layer is for suppressing an increase in surface roughness of the AlN buffer layer,
The planarization layer is for providing a planarized surface for the surface of the AlN buffer layer;
The nonpolar AlN surface is the surface of the AlN buffer layer;
The ultraviolet light-emitting device according to claim 7. The AlN buffer layer includes a dislocation block layer, which is an epitaxially grown layer of AlN crystal, between the base protective layer and the planarization layer,
The ultraviolet light-emitting device according to claim 10, wherein the dislocation block layer has a thickness for reducing the number of crystal defects in the AlN buffer layer. preparing a sapphire crystal plate having an r-plane orientation;
A buffer layer forming step of forming an AlN buffer layer, which is an epitaxially grown layer of AlN crystal having a plane orientation that becomes a nonpolar plane, covering at least a part of the surface of the sapphire crystal plate, A manufacturing method comprising:
The buffer layer forming step includes:
A base protective layer forming step of epitaxially growing a base protective layer for suppressing an increase in surface roughness of the AlN buffer layer;
A planarization step of epitaxially growing a planarization layer for providing a planarized surface on the surface of the AlN buffer layer. The buffer layer forming step further includes a dislocation block layer forming step of epitaxially growing a dislocation block layer for reducing the number of crystal defects in the AlN buffer layer between the base protective layer forming step and the planarizing step. ,
The method for manufacturing a crystal substrate according to claim 12, wherein the planarization step is to epitaxially grow the planarization layer so as to cover at least a part of the base protective layer via the dislocation block layer. The base protective layer forming step is performed by a MOCVD method at a growth temperature that does not reach a temperature that roughens the surface of the r-plane orientation of the sapphire crystal plate,
The planarization step is performed by an MOCVD method at a growth temperature that reaches or exceeds the temperature required for planarization at a temperature equal to or higher than the growth temperature of the base protective layer formation step.
The manufacturing method of the crystal substrate of Claim 12. The growth temperature in the base protective layer forming step is 1200 ° C. or less,
The growth temperature in the planarization step is 1400 ° C. or higher.
The manufacturing method of the crystal substrate of Claim 14. The undercoat protective layer forming step is performed by a MOCVD method at a growth temperature that does not reach a temperature that roughens the surface of the r-plane orientation of the sapphire crystal plate;
The dislocation block layer forming step is performed by MOCVD method,
The planarization step is performed by a MOCVD method at a growth temperature that reaches or exceeds the temperature required for planarization above the growth temperature of the base protective layer formation step,
The MOCVD method of the dislocation block layer forming step is performed at a temperature that is equal to or higher than the growth temperature of the base protective layer forming step and lower than the growth temperature of the planarization step.
A method for manufacturing a crystal substrate according to claim 13. The growth temperature in the base protective layer forming step is 1200 ° C. or less;
The growth temperature in the planarization step is 1400 ° C. or higher;
The growth temperature in the dislocation block layer forming step is not less than the growth temperature in the base protective layer forming step and not more than 1300 ° C.,
The manufacturing method of the crystal substrate of Claim 16. The base protective layer forming step is performed at a V / III ratio included in a range in which an island-like structure appears on the surface of the base protective layer.
A method for manufacturing a crystal substrate according to claim 12 or claim 13. The planarization step is performed at a V / III ratio included in a range in which a wave-like structure does not appear on the surface of the planarization layer and a void-like structural defect does not occur on the surface.
A method for manufacturing a crystal substrate according to claim 12 or claim 13. A crystal substrate preparation step of preparing a crystal substrate having a nonpolar AlN surface;
On at least a part of the nonpolar AlN surface of the crystal substrate, an n-type conductive layer, a recombination layer, and a p-type conductive layer each made of a group III nitride semiconductor crystal are arranged in this order from the crystal substrate side. A III-nitride semiconductor crystal layer forming step for epitaxially growing an ultraviolet light emitting layer that is disposed and has a plane orientation to be a nonpolar plane;
A reflective electrode forming step of forming a reflective electrode showing reflectivity with respect to radiation UV, which is ultraviolet light emitted from the ultraviolet light emitting layer, in contact with the p-type conductive layer or through another layer; Method for producing an ultraviolet light emitting device. The group III nitride semiconductor crystal includes a plurality of layers having a composition ratio different from each other in a mixed crystal containing AlN and GaN.
The group III nitride semiconductor crystal layer forming step is a step of growing while ensuring flatness by MOCVD at a temperature exceeding 1200 ° C.,
The group III nitride semiconductor crystal layer forming step includes a step of controlling the composition ratio by increasing or decreasing the ammonia gas partial pressure in the source gas of the MOCVD method.
The manufacturing method of the ultraviolet light emitting element of Claim 20. The group III nitride semiconductor crystal includes a plurality of layers having a composition ratio different from each other in a mixed crystal containing AlN and GaN.
The group III nitride semiconductor crystal layer forming step is a step of growing while ensuring flatness by MOCVD at a temperature exceeding 1200 ° C.,
The III-nitride semiconductor crystal layer forming step increases the ammonia gas partial pressure in the source gas of the MOCVD method so that the composition ratio can be modulated by the material supply ratio of the source gas of aluminum and gallium at the temperature. Under the above conditions, the step of controlling the composition ratio by changing the material supply ratio,
The manufacturing method of the ultraviolet light emitting element of Claim 20. The crystal substrate preparing step includes a buffer layer forming step of forming an AlN buffer layer covering at least a part of the surface of the sapphire crystal plate having an r-plane orientation;
The buffer layer forming step includes:
A base protective layer forming step of epitaxially growing a base protective layer for suppressing an increase in roughness of the nonpolar AlN surface;
A planarization step of epitaxially growing a planarization layer to provide a planarized surface for the nonpolar AlN surface;
The nonpolar AlN surface is the surface of the AlN buffer layer;
The manufacturing method of the ultraviolet light emitting element of Claim 20. The buffer layer forming step further includes a dislocation block layer forming step of epitaxially growing a dislocation block layer for reducing the number of crystal defects in the AlN buffer layer between the base protective layer forming step and the planarizing step. ,
24. The method of manufacturing an ultraviolet light emitting element according to claim 23, wherein the planarization step is to epitaxially grow the planarization layer so as to cover at least a part of the base protective layer via the dislocation block layer.