JP7430316B2 - Semiconductor growth substrate, semiconductor element, semiconductor light emitting element, and semiconductor element manufacturing method - Google Patents

Description

Application of Article 30, Paragraph 2 of the Patent Law March 2018 Meijo University Graduate School of Science and Engineering, Department of Electrical and Electronic Engineering, Information Technology and Materials Engineering Doctoral Thesis "Study on epitaxial growth of non-polar a-plane group III nitride semiconductors on r-plane sapphire substrates" Published in

The present invention relates to a semiconductor growth substrate, a semiconductor element, a semiconductor light emitting element, and a semiconductor element manufacturing method, and more particularly to a semiconductor growth substrate for growing an a-plane GaN crystal layer, a semiconductor element, a semiconductor light emitting element, and a semiconductor element manufacturing method.

Compound semiconductors made of gallium nitride (GaN)-based materials are generally used as LEDs that emit light from violet to blue and are used for lighting purposes. In recent years, as lighting devices and the like using light emitting diodes (LEDs) have become widespread, there has been a desire for LED chips to have higher brightness. In order to increase the brightness of LEDs, the thickness of the light-emitting layer is increased to lower the carrier density inside the light-emitting layer so that electrons and holes can efficiently recombine through light emission even when the current density is increased. There is a need.

However, in the commonly used GaN-based semiconductor material whose main surface is the c-plane, a piezoelectric field is generated in the c-axis direction, which creates a potential difference in the thick light-emitting layer and causes electrons and holes to move spatially. The problem is the droop characteristic in which the radiative recombination efficiency is significantly reduced.

To solve this problem, by forming the light-emitting layer with a GaN-based material whose main surface is non-polar or semi-polar, the effect of the piezoelectric field in the stacking direction can be eliminated and the film can be made thicker. Techniques that enable light emission using electric current have also been proposed. In a GaN-based semiconductor layer, the a-plane and the m-plane are nonpolar planes, and the r-plane is a typical example of a semipolar plane.

Patent Document 1 discloses a technique of growing an a-plane GaN layer on the r-plane of a sapphire substrate using metal organic chemical vapor deposition (MOCVD). By using an a-plane GaN layer formed on an r-plane sapphire substrate as a base layer and growing an n-type layer, a light-emitting layer, and a p-type layer in sequence, the main surface of the light-emitting layer can be made to be an a-plane and the film can be thickened. It is possible to improve the droop characteristics of the LED.

Japanese Patent Application Publication No. 2008-214132

However, in a-plane GaN formed on r-plane sapphire, there are +c-axis, -c-axis, and m-axis directions within the growth plane, resulting in large in-plane anisotropy, good crystallinity, and a flat surface. It has been difficult to obtain a high quality a-plane GaN layer with excellent properties.

The present invention has been made in view of the above-mentioned conventional problems, and provides a semiconductor growth substrate and a semiconductor device capable of growing a high-quality a-plane GaN layer with good crystallinity and excellent surface flatness. An object of the present invention is to provide a semiconductor light emitting device and a semiconductor device manufacturing method.

In order to solve the above problems, a semiconductor growth substrate of the present invention includes a sapphire substrate having an r-plane as a main surface, and an AlN buffer layer formed on the main surface, and the AlN buffer layer is formed by stacking layers. The AlN buffer layer has a uniaxial orientation in the a-axis direction and a uniaxial orientation in the in-plane direction at least in the m-axis direction, and the impurity concentration of carbon contained in the AlN buffer layer is 2.5×10 ¹⁹ atoms/cm. ³ , and the impurity concentration of oxygen is less than 7.0×10 ²⁰ atoms/cm ³ .

In such a substrate for semiconductor growth of the present invention, the AlN buffer layer has uniaxial orientation in the stacking direction and in-plane direction, thereby suppressing abnormal growth and producing a high-quality product with good crystallinity and excellent surface flatness. It becomes possible to grow an a-plane GaN layer.

Further, in one aspect of the present invention, the AlN buffer layer has an X-ray diffraction peak angle in the stacking direction shifted to a lower angle in the range of 0.2 to 0.8 degrees than that of the bulk AlN single crystal. .

Further, in one aspect of the present invention, the AlN buffer layer has a peak angle of X-ray diffraction in the in-plane direction that is shifted to a higher angle side in a range of 0.2 to 0.8 degrees than that of the bulk AlN single crystal. .

Further, in one aspect of the present invention , the AlN buffer layer has a half width of 1 degree or less when measured by an X-ray rocking curve in the in-plane direction .

Moreover, in order to solve the above-mentioned problem, a semiconductor element of the present invention uses the semiconductor growth substrate described in any one of the above, and is characterized in that a functional layer is provided on the semiconductor growth substrate.

Further, in order to solve the above problems, a semiconductor light emitting device of the present invention is characterized in that it uses the semiconductor growth substrate described in any one of the above and includes an active layer on the semiconductor growth substrate.

Further, in order to solve the above problems, the semiconductor device manufacturing method of the present invention includes a sputtering step of forming an AlN buffer layer by sputtering on a sapphire substrate having an r-plane as a main surface, and annealing the AlN buffer layer. an annealing step for single crystallization having uniaxial orientation in the a-axis direction in the stacking direction and uniaxial orientation in at least the m-axis direction in the in-plane direction; and growing an a-plane GaN layer on the AlN buffer layer. A semiconductor layer growth step is provided , and the AlN buffer layer has a carbon impurity concentration of less than 2.5×10 ¹⁹ atoms/cm ³ and an oxygen impurity concentration of 7.0×10 ²⁰ atoms/cm ^{3 .} It is characterized by being less than or equal to

In such a semiconductor device manufacturing method of the present invention, since the AlN buffer layer has uniaxial orientation in the stacking direction and in-plane direction, abnormal growth is suppressed and a high-quality alumina with good crystallinity and excellent surface flatness is produced. It becomes possible to grow a planar GaN layer.

The present invention provides a semiconductor growth substrate, a semiconductor device, a semiconductor light emitting device, and a method for manufacturing a semiconductor device, which are capable of growing a high-quality a-plane GaN layer with good crystallinity and excellent surface flatness. can.

FIG. 1 is a schematic cross-sectional view showing a semiconductor growth substrate in the first embodiment. 2 is a table showing the impurity concentration in the AlN buffer layer 2 and the crystallinity of the a-plane GaN layer 3 due to differences in sputtering conditions. 2 is a graph showing the results of XRC (X-ray Rocking Curve) measurement of the AlN buffer layer 2, in which (A) shows the half-value width in the a-plane, and (B) shows the half-value width in the m-plane. It is a graph showing the X-ray diffraction measurement results of the AlN buffer layer 2, (A-1) shows the 2θ/θ measurement results, (B-1) shows the 2θ _χ /φ measurement results, and (A-2) (B-2) shows the relationship between the film thickness and the peak diffraction intensity on the a-plane, and (B-2) shows the relationship between the film thickness and the peak diffraction intensity on the m-plane. It is a graph showing the diffraction spectrum of the XRC measurement of the a-plane GaN layer 3, (A) shows the result in the c-axis direction in the a-plane, and (B) shows the result in the m-axis direction in the a-plane. , (C) shows the results within the {10-11} plane. It is a schematic cross-sectional view showing LED10 which is a semiconductor device of a 2nd embodiment.

(First embodiment)
Embodiments of the present invention will be described in detail below with reference to the drawings. Identical or equivalent constituent elements, members, and processes shown in each drawing are denoted by the same reference numerals, and redundant explanations will be omitted as appropriate. FIG. 1 is a schematic cross-sectional view showing a semiconductor growth substrate in a first embodiment of the present invention.

As shown in FIG. 1, the semiconductor growth substrate of this embodiment includes a sapphire substrate 1 having a hexagonal r-plane as its main surface, an AlN buffer layer 2 formed on the sapphire substrate 1, and an AlN buffer layer 2 formed on the sapphire substrate 1. An a-plane GaN layer 3 having an a-plane main surface formed thereon is provided. Although a just substrate with an inclination angle of 0 degrees is shown here as the sapphire substrate 1, it may be an off-substrate in which the r-plane is inclined several degrees in a predetermined plane direction.

The AlN buffer layer 2 is a layer for alleviating the difference in lattice constant between the sapphire substrate 1 and the a-plane GaN layer 3. The thickness of the AlN buffer layer 2 is preferably in the range of 5 to 300 nm, more preferably in the range of 5 to 90 nm, even more preferably in the range of 5 to 30 nm, since the crystal quality of the a-plane GaN layer 3 will deteriorate if it is too thick. . Further, the impurity concentration contained in the AlN buffer layer 2 is preferably less than 2.5×10 ¹⁹ atoms/cm ³ for carbon and less than 7.0×10 ²⁰ atoms/cm ³ for oxygen. If the impurity concentration contained in the AlN buffer layer 2 is above these ranges, the single crystal a-plane GaN layer 3 cannot be epitaxially grown.

The a-plane GaN layer 3 is a base layer grown on the AlN buffer layer 2 so that its main surface becomes the a-plane, and is a layer on which a nitride semiconductor layer is epitaxially grown. As a method for forming the a-plane GaN layer 3, known methods such as MOCVD and HVPE (Hydride Vapor Phase Epitaxy) can be used, but it is preferable to use MOCVD. Although the thickness of the a-plane GaN layer 3 is not particularly limited, it is preferably formed to be 1 μm or more.

Next, a method for manufacturing the semiconductor growth substrate shown in FIG. 1 will be described.

(Sputtering process)
First, an AlN buffer layer 2 is formed using a sputtering method on a sapphire substrate 1 having an r-plane as its main surface. As the sputtering method for forming the AlN buffer layer 2, a reactive sputtering method using Al as a target material and N ₂ and Ar gas may be adopted, but it is more preferable to use Ar gas as AlN as a target material. The AlN serving as the target material may be a single crystal substrate or a powder fired body, and its state and form are not limited.

When forming the AlN buffer layer 2 using _N2 and Ar gas using Al as a target material by reactive sputtering, in addition to the physical deposition process of the AlN film, a reaction between the Al target material and _N2 gas is required. Process needs to be considered. Therefore, in the reactive sputtering method, it is difficult to appropriately set and control film forming conditions to obtain the desired AlN buffer layer 2. In particular, as semiconductor substrates become larger in area, it becomes even more difficult as it becomes necessary to consider the in-plane distribution of the substrate surface.

On the other hand, when forming the AlN buffer layer 2 by a sputtering method using AlN as a target material and Ar gas, there is no need to consider the reaction process between the Al target material and _N2 , and the Ar gas flow rate and the vacuum degree in the chamber are All you need to do is to optimize the parameters such as Therefore, it is easier to set and control the film forming conditions when forming the AlN buffer layer 2 by using a sputtering method using Ar gas using AlN as a target material than by forming the AlN buffer layer 2 by a reactive sputtering method. Therefore, it is easy to cope with increasing the area.

As conditions for reactive sputtering to form the AlN buffer layer 2, the substrate temperature is preferably in a range of 200°C or more and less than 500°C. If the substrate temperature is higher than 500° C., the impurity concentration of oxygen and carbon contained in the AlN buffer layer 2 after film formation becomes high, making it impossible to epitaxially grow the a-plane GaN layer 3 on the AlN buffer layer 2, which is not preferable. In the semiconductor device growth method of this embodiment, the sputtering process is performed at a temperature of 200 to 500°C, which is lower than the 1500°C at which high-quality AlN crystals are obtained. It seems to be sexual.

(annealing process)
Next, the AlN buffer layer 2 formed by the sputtering process is annealed to promote recrystallization of the AlN buffer layer 2 and give it uniaxial orientation in the stacking direction and in-plane direction. For the annealing treatment, for example, a heat treatment apparatus using a high frequency induction heating method can be used. As for the annealing conditions, it is preferable to maintain the substrate temperature at 1300° C. or higher and lower than 1700° C. for 0.5 to 3.0 hours in an inert gas (eg, nitrogen or Ar) atmosphere. More preferably, the temperature is 1300°C or higher and 1600°C or lower. If the annealing temperature is 1700° C. or higher, the sapphire substrate 1 will be thermally decomposed and deteriorated, which is not preferable. Further, if the annealing temperature is less than 1300° C., the recrystallization of the AlN buffer layer 2 will be insufficient, and the uniaxial orientation of the AlN buffer layer 2 in the stacking direction and in-plane direction will be insufficient.

(Semiconductor layer growth process)
Next, after cleaning the surface of the AlN buffer layer 2, an MOCVD method is performed using hydrogen and nitrogen as a carrier gas, ammonia (NH ₃ ) as a group V raw material, and TMG (TrimethylGallium) as a group III raw material. An a-plane GaN layer 3 is grown. At this time, the growth sequence consists of two stages, in which the growth temperature is held constant after the temperature is raised, and the reactor pressure, V/III ratio, and growth time are changed. For example, in the first step immediately after raising the temperature, the V/III ratio is set to about 4000 to 5000, the pressure is set to 900 to 1000 hPa, and the pressure is maintained for about 10 to 20 minutes. In the second step, for example, the V/III ratio is set to about 100 to 200, and the pressure is maintained at 100 to 150 hPa for 90 to 120 minutes. By growing the a-plane GaN layer 3 and then cooling it to room temperature and taking it out, the semiconductor growth substrate of this embodiment shown in FIG. 1 can be obtained.

(Example 1-3)
In the sputtering process, the AlN buffer layer 2 is formed under the following conditions: RF output of 450 W, 10 rpm, Ar flow rate of 5.0 sccm, N ₂ flow rate of 5.0 sccm, substrate temperature of 300° C., and ultimate vacuum of 1.53×10 ^-5 Pa. did. Thereafter, in an annealing step, the substrate was set in a carbon susceptor of a heat treatment apparatus, the pressure was reduced, N ₂ was filled in to 380 torr, the temperature was raised to 1600° C. at a temperature increase rate of 20° C./min, and annealing was performed for one hour. Next, in the semiconductor device growth process, the temperature was raised to 1010°C, and then the growth temperature was kept constant at 1010°C. In the first stage, the V/III ratio was 4400, the pressure was 933 hPa, and the growth time was 10 minutes. An a-plane GaN layer 3 was grown at a V/III ratio of 100, a pressure of 100 hPa, and a growth time of 90 minutes to obtain a substrate for semiconductor growth. Examples 1-3 were those in which the thickness of the AlN buffer layer 2 was 30 nm, 90 nm, and 180 nm, respectively.

(Comparative example 1-3)
A substrate for semiconductor growth was obtained under the same conditions as in Example 1, except that the annealing process was not performed after the sputtering process and the semiconductor element growth process was performed. Comparative Examples 1-3 were those in which the AlN buffer layer 2 had a thickness of 30 nm, 90 nm, and 180 nm, respectively.

(Comparative example 4)
A semiconductor growth substrate of Comparative Example 4 was obtained under the same conditions as Comparative Example 1, except that the substrate temperature in the sputtering step was 600 ° C. and the ultimate vacuum was 4.47×10 ⁻⁴ Pa.

(Comparative Example 5-7)
A substrate for semiconductor growth was obtained in the same manner as Comparative Example 1-3, except that an AlN buffer layer 2 was epitaxially grown using the MOCVD method on a sapphire substrate 1 having an r-plane main surface without using a sputtering process. Ta. The growth conditions were a growth temperature of 1340° C. and a V/III ratio of 6300. Comparative Examples 5-7 were those in which the AlN buffer layer 2 had a thickness of 30 nm, 90 nm, and 180 nm, respectively.

(Sputtering conditions)
FIG. 2 is a table showing the impurity concentration in the AlN buffer layer 2 and the crystallinity of the a-plane GaN layer 3 depending on the sputtering conditions. The impurity concentration in the AlN buffer layer 2 was measured by SIMS (Secondary Ion Mass Spectrometry), and the crystallinity of the a-plane GaN layer 3 was evaluated by a SEM (Scanning Electron Microscope) image and X-ray diffraction. The left side of the figure shows the results of Example 1, and the right side of the figure shows the results of Comparative Example 4.

As shown in FIG. 2, in Example 1, the impurity concentrations contained in the AlN buffer layer 2 are such that the oxygen concentration is 6.58×10 ²⁰ atoms/cm ³ and the carbon concentration is 2.19×10 ¹⁹ atoms/cm ^{3 .} Met. Further, in Comparative Example 4, the oxygen concentration was 2.66×10 ²¹ atoms/cm ³ and the carbon concentration was 9.72×10 ¹⁹ atoms/cm ³ . From the SEM image and X-ray diffraction results, in Example 1, a single-crystal a-plane GaN layer 3 could be grown on the AlN buffer layer 2, but in Comparative Example 4, a single-crystal a-plane GaN layer 3 could not be grown. I know that it's not. Therefore, it can be seen that when the sputtering condition is 500° C. or higher, the impurity concentration becomes high due to the low ultimate vacuum degree, making it impossible to grow a single-crystal a-plane GaN layer.

(Evaluation of AlN buffer layer 2)
FIG. 3 is a graph showing the results of XRC (X-ray Rocking Curve) measurement of the AlN buffer layer 2, in which (A) shows the half-width in the a-plane, and (B) shows the half-width in the m-plane. ing. Annealed sp-AlN in the graph indicates Example 1-3, sp-AlN indicates Comparative Example 1-3, and ep-AlN indicates Comparative Example 5-7.

As shown in (A) and (B) of FIG. 3, the half width in the a-plane and the m-plane is the largest in Comparative Example 1-3, and the smallest in Example 1-3. Therefore, it can be seen that the crystallinity of the AlN buffer layer 2 is the best in Example 1-3, which was formed by sputtering and then subjected to an annealing process.

FIG. 4 is a graph showing the X-ray diffraction measurement results of the AlN buffer layer 2, (A-1) shows the 2θ/θ measurement results, (B-1) shows the 2θ _χ /φ measurement results, and ( A-2) shows the relationship between the film thickness and the peak diffraction intensity on the a-plane, and (B-2) shows the relationship between the film thickness and the peak diffraction intensity on the m-plane.

In (A-1), diffraction peaks can be confirmed around 53° and 59° in all measurement results. The peak around 53° corresponds to the r-plane of the sapphire substrate 1, and the peak around 59° corresponds to the a-plane of the AlN buffer layer 2. Further, in Example 1-3, the peak angle is shifted to a lower angle in the range of 0.2 to 0.8 degrees than the theoretical peak angle in the bulk AlN single crystal. The peak angle toward the lower angle side in the 2θ/θ measurement indicates the spread of the lattice spacing in the stacking direction of the AlN buffer layer 2, and it seems that tensile stress is acting in the stacking direction in Example 1-3. .

Furthermore, as shown in (A-2), the peak intensity in Example 1-3 is significantly greater than that in Comparative Example 1-3, and the peak intensity in Examples 1 and 2 is greater than that in Comparative Examples 5 and 6. Therefore, it can be seen that in Examples 1 and 2, the AlN buffer layer 2 is well oriented along the a-axis in the stacking direction.

In (B-1), a diffraction peak can be seen around 33° in all measurement results. The peak near 33° corresponds to the m-plane of the AlN buffer layer 2. Further, in Example 1-3, the peak angle is shifted to a higher angle in the range of 0.2 to 0.8 degrees than the theoretical peak angle in the bulk AlN single crystal. The peak angle toward the high angle side in the 2θ _χ /φ measurement indicates a narrowing of the lattice spacing in the in-plane direction of the AlN buffer layer 2, and it seems that in-plane compressive stress is acting in Example 1-3. .

Furthermore, as shown in (B-2), the peak intensity in Examples 1 and 2 is significantly greater than that in Comparative Examples 1 and 2, and the peak intensity in Example 1 is greater than that in Comparative Example 5. Therefore, it can be seen that in Examples 1 and 2, the AlN buffer layer 2 has good m-axis orientation in the in-plane direction.

As shown in FIG. 4, the uniaxial orientation of the AlN buffer layer 2 in the in-plane direction and the stacking direction is highest in Examples 1 and 2, and the smaller the film thickness, the better the uniaxial orientation in the in-plane direction. I can say that. Furthermore, in Example 1-3, the theoretical peak angle in the bulk AlN single crystal was shifted to a lower angle in the range of 0.2 to 0.8 degrees in the stacking direction, and by 0.2 degrees in the in-plane direction. The angle is shifted to the high angle side in the range of ~0.8 degrees, and in-plane compressive stress is applied to the AlN buffer layer 2.

(Evaluation of crystallinity of a-plane GaN layer 3)
FIG. 5 is a graph showing the diffraction spectrum of the XRC measurement of the a-plane GaN layer 3, where (A) shows the results in the c-axis direction in the a-plane, and (B) shows the results in the m-axis direction in the a-plane. (C) shows the results in the {10-11} plane. 5A to 5C show the measurement results of Example 1, Comparative Example 1, and Comparative Example 5 in which the thickness of the AlN buffer layer 2 was 30 nm.

The half width (unit: arcsec) in the measurement results shown in FIG. 5(A) was 505 for Example 1, 609 for Comparative Example 1, and 562 for Comparative Example 5. In FIG. 5(B), the number was 729 for Example 1, 758 for Comparative Example 1, and 995 for Comparative Example 5. In FIG. 5(C), the number was 1071 for Example 1, 1472 for Comparative Example 1, and 1404 for Comparative Example 5.

As shown in FIGS. 5A to 5C, the crystallinity of Example 1 was better than that of Comparative Examples 1 and 5, and the AlN buffer layer 2 had uniaxial orientation in the in-plane direction and the stacking direction. By using this, the crystallinity and surface flatness of the a-plane GaN layer 3 can be improved.

As described above, in the semiconductor growth substrate of this embodiment, the AlN buffer layer has uniaxial orientation in the stacking direction and in-plane direction, which suppresses abnormal growth and provides good crystallinity and surface flatness. It becomes possible to grow an excellent high quality a-plane GaN layer.

(Second embodiment)
Next, a second embodiment of the present invention will be described using FIG. 6. FIG. 6 is a schematic cross-sectional view showing an LED 10 which is a semiconductor device of the second embodiment. As shown in FIG. 6, the LED 10 includes a sapphire substrate 11 having an r-plane main surface, an AlN buffer layer 12, an a-plane GaN layer 13, an n-type semiconductor layer 14, a light emitting layer (active layer) 15, and a p-type semiconductor layer 16. , an n-side electrode 17, and a p-side electrode 18.

Similar to the first embodiment, a sapphire substrate 11 having an r-plane as its main surface is prepared, and an AlN buffer layer 12 is formed on the sapphire substrate 11 by a sputtering process. Next, in an annealing step, the AlN buffer layer 12 is annealed to become a single crystal, and has uniaxial orientation in the stacking direction and in-plane direction. Next, in a semiconductor layer growth step, an a-plane GaN layer 13 is epitaxially grown on the AlN buffer layer 12, and then an n-type semiconductor layer 14, a light-emitting layer 15, and a p-type semiconductor layer 16 are sequentially grown by MOCVD to form a semiconductor substrate. get.

Next, a portion of the p-type semiconductor layer 16 and the light emitting layer 15 are removed by photolithography and etching using a predetermined pattern to expose a portion of the n-type semiconductor layer 14. Next, an electrode material is formed on the exposed surfaces of the n-type semiconductor layer 14 and the p-type semiconductor layer 16 by vapor deposition or the like, and the LED 10 is obtained by dicing into individual chips.

Although the n-type semiconductor layer 14 and the p-type semiconductor layer 16 are each described as a single layer here, they may each include a plurality of layers having different materials and compositions. For example, the n-type semiconductor layer 14 and the p-type semiconductor layer Layer 16 may include cladding layers, contact layers, current spreading layers, electron blocking layers, waveguide layers, and the like. Furthermore, although the light emitting layer 15 has been described as a single layer, it may be configured with multiple layers such as a multi-quantum well structure (MQW).

The n-type semiconductor layer 14 is an n-type impurity-doped semiconductor layer that is epitaxially grown on the a-plane GaN layer 13 and has the a-plane as its main surface. Electrons are injected from the n-side electrode 17 into the light emitting layer 15. This is a layer that supplies electrons. As for the material constituting the n-type semiconductor layer 14, examples of the III-V compound semiconductor layer include GaN, AlGaN, InGaN, and AlInGaN, and examples of the n-type impurity include Si.

The light-emitting layer 15 is a semiconductor layer that is epitaxially grown on the n-type semiconductor layer 14 and has an a-plane as its main surface, and the LED 10 emits light by radiative recombination of electrons and holes within the layer. The light emitting layer 15 is made of a material whose band gap is smaller than that of the n-type semiconductor layer 14 and the p-type semiconductor layer 16, and examples thereof include InGaN and AlInGaN. The light emitting layer 15 may be a non-doped layer that does not intentionally contain impurities, or may be an n-type layer that includes an n-type impurity, or a p-type layer that includes a p-type impurity. Since the light-emitting layer 15 is a semiconductor layer whose main surface is the a-plane, spatial separation of electrons and holes due to a piezoelectric field is difficult to occur even when the film is thickened, and even if the current density is increased, electrons and holes are efficiently separated. The pores are capable of luminescent recombination.

The p-type semiconductor layer 16 is a semiconductor layer that is epitaxially grown on the light-emitting layer 15 and has an a-plane as its main surface, and is a layer in which holes are injected from the p-side electrode 18 and supplies holes to the light-emitting layer 15. . As for the material constituting the p-type semiconductor layer 16, examples of the III-V compound semiconductor layer include GaN, AlGaN, InGaN, and AlInGaN, and examples of the p-type impurity include Zn and Mg.

In this embodiment as well, an n-type semiconductor layer 14, a light-emitting layer 15, and a p-type semiconductor layer 16 are formed on an AlN buffer layer 12 having uniaxial orientation in the stacking direction and in-plane direction, with an a-plane GaN layer 13 as a base layer. Epitaxial growth. Therefore, as described in the first embodiment, the a-plane GaN layer 13 has good crystallinity and surface flatness, and the n-type semiconductor layer 14, light-emitting layer 15, and p-type semiconductor layer 16 grown thereon also have good crystallinity and surface flatness. Good crystallinity and surface flatness. This improves the characteristics of the n-type semiconductor layer 14, the light-emitting layer 15, and the p-type semiconductor layer 16, and is expected to improve the external quantum efficiency of the LED 10. Note that this embodiment is an example including an n-type semiconductor layer 14, a light-emitting layer 15, and a p-type semiconductor layer 16 as functional layers. Here, the functional layer is a layer for exhibiting a predetermined electrical function in a semiconductor element.

(Third embodiment)
The LED 10, which is a semiconductor device of the present invention, has little droop due to the piezoelectric field as described above, and has small anisotropy in the a-plane and has good crystal quality, so it can achieve high brightness, so it can be used in vehicles. By using it in lamps and other lamps, it is possible to reduce the number of chips and increase output.

Further, the semiconductor device is not limited to an LED, and may be used for other purposes such as a semiconductor laser or a high electron mobility transistor (HEMT). Also in these semiconductor devices, the functional layer is a layer for exhibiting a predetermined electrical function in the semiconductor element.

The present invention is not limited to the embodiments described above, and various modifications can be made within the scope of the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. are also included within the technical scope of the present invention.

10...LED
1, 11... Sapphire substrate 2, 12... AlN buffer layer 3, 13... A-plane GaN layer 14... N-type semiconductor layer 15... Light-emitting layer 16... P-type semiconductor layer 17... N-side electrode 18... P-side electrode

Claims (7)

a sapphire substrate with an r-plane as its main surface;
an AlN buffer layer formed on the main surface,
The AlN buffer layer has uniaxial orientation in the a-axis direction in the stacking direction and uniaxial orientation in the in-plane direction at least in the m-axis direction,
The AlN buffer layer has a carbon impurity concentration of less than 2.5×10 ¹⁹ atoms/cm ³ and an oxygen impurity concentration of less than 7.0×10 ²⁰ atoms/cm ³ . A substrate for semiconductor growth. The semiconductor growth substrate according to claim 1 ,
The AlN buffer layer is for semiconductor growth, characterized in that the peak angle of X-ray diffraction in the stacking direction is shifted to a lower angle in the range of 0.2 to 0.8 degrees than that of the bulk AlN single crystal. substrate. The semiconductor growth substrate according to claim 1 or 2 ,
The AlN buffer layer is for semiconductor growth, characterized in that the peak angle of X-ray diffraction in the in-plane direction is shifted to a higher angle side in the range of 0.2 to 0.8 degrees than that of the bulk AlN single crystal. substrate. A substrate for semiconductor growth according to any one of claims 1 to 3 ,
A substrate for semiconductor growth, wherein the AlN buffer layer has a half width of 1 degree or less when measured by an X-ray rocking curve in the in-plane direction. Using the semiconductor growth substrate according to any one of claims 1 to 4 ,
A semiconductor device comprising a functional layer on the semiconductor growth substrate. Using the semiconductor growth substrate according to any one of claims 1 to 4 ,
A semiconductor light emitting device comprising an active layer on the semiconductor growth substrate. a sputtering step of forming an AlN buffer layer using a sputtering method on a sapphire substrate having an r-plane as its main surface;
an annealing step of annealing the AlN buffer layer to form a single crystal having uniaxial orientation in the a-axis direction in the stacking direction and uniaxial orientation in at least the m-axis direction in the in-plane direction;
comprising a semiconductor layer growth step of growing an a-plane GaN layer on the AlN buffer layer,
The AlN buffer layer has a carbon impurity concentration of less than 2.5×10 ¹⁹ atoms/cm ³ and an oxygen impurity concentration of less than 7.0×10 ²⁰ atoms/cm ³ . A semiconductor device manufacturing method.