JP2006179879A - Semiconductor multilayer substrate, manufacturing method thereof, and light emitting element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor multilayer substrate used as a light emitting element exhibiting high luminance. <P>SOLUTION: The semiconductor multilayer substrate has a semiconductor layer containing inorganic particles other than metal nitrides. The inorganic particles contain at least one of materials selected from a group including nitrides, carbides, borides, sulfides, selenides, and metals. The inorganic particles include a mask material for growth of a semiconductor layer. The mask material is at least one of zirconia, titania, silicon nitride, silicon boride, W, Mo, Cr, Co, Si, Au, Zr, Ta, Ti, Nb, Pt, V, Hf and Pd. The manufacturing method of the semiconductor multilayer substrate includes a step of disposing inorganic particles other than metal nitrides, and a step of growing a semiconductor layer. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor laminated substrate used as a semiconductor light emitting device exhibiting high luminance, a method for manufacturing the same, and a light emitting device.

The semiconductor multilayer substrate is used as a semiconductor light emitting element such as a nitride semiconductor light emitting element, a polymer LED, or a low molecular organic LED, which is a component of various display devices.
For example, a nitride semiconductor multilayer substrate having a nitride semiconductor layer represented by the formula In _x Ga _y Al _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) Are used as semiconductor light emitting devices such as blue, green light emitting diode elements or ultraviolet, blue, green laser diode elements, and these semiconductor light emitting elements have high luminance from the viewpoint of improving the performance of display devices. There is a demand (see, for example, Patent Document 1, Patent Document 2, Patent Document 3, and Patent Document 4).

JP-A-6-260682 JP-A-7-15041 Japanese Patent Laid-Open No. 9-64419 Japanese Patent Laid-Open No. 9-36430

  The objective of this invention is providing the semiconductor laminated substrate used as a light emitting element which shows high brightness | luminance.

As a result of intensive studies on the semiconductor laminated substrate, the present inventors have completed the present invention.
That is, the present invention relates to [1] a semiconductor multilayer substrate comprising a semiconductor layer containing inorganic particles excluding metal nitride.
Furthermore, the present invention provides [2] the semiconductor multilayer substrate according to [1], wherein the inorganic particles include at least one selected from the group consisting of oxides, nitrides, carbides, borides, sulfides, selenides, and metals. ,
[3] The semiconductor laminated substrate according to [1] or [2], wherein the inorganic particles include a mask material in the growth of the semiconductor layer,
[4] The mask material is selected from the group consisting of silica, zirconia, titania, silicon nitride, boron nitride, W, Mo, Cr, Co, Si, Au, Zr, Ta, Ti, Nb, Pt, V, Hf and Pd. The semiconductor laminated substrate according to [3], which is at least one of the above.
The present invention also provides [5] a method for producing a semiconductor laminated substrate including the following steps (a) and (b):
(a) placing inorganic particles excluding metal nitride on a substrate;
(b) A step of growing a semiconductor layer.
[6] Manufacturing method of semiconductor laminated substrate including the following steps (a1), (a2) and (b),
(a1) a step of arranging inorganic particles excluding metal nitride on a substrate;
(a2) growing a low temperature buffer layer,
(b) a step of growing a semiconductor layer;
It is related to.
The present invention also relates to [7] a light emitting device including the semiconductor multilayer substrate according to any one of [1] to [4].

  The semiconductor multilayer substrate of the present invention provides a semiconductor light emitting element exhibiting high luminance, and the semiconductor light emitting element is suitable for a display device. And according to the manufacturing method of this invention, since the semiconductor laminated substrate which gives the semiconductor light-emitting device which shows a high brightness | luminance can be manufactured, this invention is very important industrially.

The semiconductor laminated substrate of the present invention includes a semiconductor layer, and usually includes a substrate and a semiconductor layer.
The semiconductor layer is, for example, a metal nitride, a high molecular organic compound, or a low molecular organic compound. When the semiconductor layer is a metal nitride, the semiconductor multilayer substrate is used as a nitride semiconductor light emitting device. Moreover, when a semiconductor layer is a high molecular organic compound and a low molecular organic compound, a semiconductor laminated substrate is used as high molecular organic LED and low molecular organic LED, respectively. What is necessary is just to obtain | require the composition of a semiconductor layer by cut | disconnecting a semiconductor laminated element and analyzing a cross section by SEM-EDX.

The semiconductor layer is preferably a metal nitride, and is, for example, In _x Ga _y Al _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1). The semiconductor layer is, for example, an n-type conductive layer (n-type contact layer, n-type clad layer, etc.), a light emitting layer, a p-type conductive layer (p-type contact layer, p-type clad layer, etc.), and nitride semiconductor light emission It may include layers necessary for the operation of the device.

  In addition, the semiconductor layer may be, for example, a single layer or a multilayer (thick film layer, superlattice thin film layer, etc.), or a buffer layer for making a layer necessary for the operation of the nitride semiconductor light emitting device a high quality crystal May be included.

  The semiconductor layer contains inorganic particles other than the metal nitride. This semiconductor layer may exist between the light emitting layer and the substrate, or may exist on the side facing the light emitting layer with respect to the substrate. This semiconductor layer is preferably present between the light emitting layer and the substrate, more preferably present between the light emitting layer and the substrate, and more preferably in contact with the substrate.

  The semiconductor layer preferably has a half-value width FWHM of a diffraction peak of (302) plane measured by X-ray diffraction rocking curve of 650 arcsec or less.

  Inorganic particles include, for example, oxides, nitrides, carbides, borides, sulfides, selenides, and metals. These contents are usually 50% by weight or more, preferably 90% or more, and more preferably 95% or more with respect to the inorganic particles. What is necessary is just to obtain | require the composition of the inorganic particle in a semiconductor layer by cut | disconnecting a semiconductor laminated element and analyzing a cross section by SEM-EDX.

Examples of the oxide include silica, alumina, zirconia, titania, ceria, zinc oxide, tin oxide, and yttrium aluminum garnet (YAG).
Examples of the nitride include silicon nitride and boron nitride.
Examples of the carbide include silicon carbide (SiC), boron carbide, diamond, graphite, and fullerenes.
Examples of borides include zirconium boride (ZrB ₂ ) and chromium boride (CrB ₂ ).
Examples of the sulfide include zinc sulfide, cadmium sulfide, calcium sulfide, and strontium sulfide.
Examples of selenides include zinc selenide and cadmium selenide.
Oxides, nitrides, carbides, borides, sulfides, and selenides may be partially substituted with other elements in the elements contained therein. Examples of these include cerium and europium as activators. And phosphors of silicate and aluminate.

  Examples of metals include silicon (Si), nickel (Ni), tungsten (W), tantalum (Ta), chromium (Cr), titanium (Ti), magnesium (Mg), calcium (Ca), aluminum (Al), gold (Au), silver (Ag), and zinc (Zn).

Inorganic particles may be used alone or in combination. Examples of combinations include inorganic particles having oxides on nitride particles.
Among these, the inorganic particles are preferably oxides, and more preferably silica.

  The inorganic particles preferably contain a mask material for the growth of the semiconductor layer, and more preferably have a mask material on the surface thereof. When the mask material is present on the surface of the inorganic particles, the mask material preferably covers 30% or more of the surface of the inorganic particles, and more preferably covers 50% or more.

  The mask material is, for example, silica, zirconia, titania, silicon nitride, boron nitride, tungsten (W), molybdenum (Mo), chromium (Cr), cobalt (Co), silicon (Si), aluminum (Au), zirconium ( Zr), tantalum (Ta), titanium (Ti), niobium (Nb), nickel (Ni), platinum (Pt), vanadium (V), hafnium (Hf), palladium (Pd), preferably silica. . These may be used alone or in combination. The composition of the inorganic particle mask material may be determined by cutting the semiconductor multilayer element and analyzing the cross section of the inorganic particles by SEM-EDX.

The inorganic particles have a spherical shape (for example, a cross section of a circle or an ellipse), a plate shape (for example, an aspect ratio L / T of a length L and a thickness T of 1.5 to 100), It is acicular (for example, the ratio L / W of the width W to the length L is 1.5 to 100) or indeterminate (including particles of various shapes and having irregular shapes as a whole). It may be spherical, preferably spherical.
The inorganic particles have an average particle size of usually 5 nm or more, preferably 10 nm or more, more preferably 0.1 μm or more, and usually 50 μm or less, preferably 10 μm or less, more preferably 1 μm or less. When the inorganic particles having an average particle size in the above range are included, a semiconductor layer laminated substrate serving as a light emitting element exhibiting high luminance can be obtained. The shape and average particle diameter of the inorganic particles may be obtained from a cross-sectional electron micrograph of the inorganic particles by cutting the semiconductor multilayer element.
In addition, the inorganic particles have a d / λ of usually 0.01 or more, preferably when the emission wavelength of the light-emitting element including the semiconductor layer laminated substrate is λ (nm) and the average particle diameter of the inorganic particles is d (nm). It is 0.02 or more, more preferably 0.2 or more, and is usually 100 or less, preferably 30 or less, more preferably 3.0 or less.

  When the semiconductor layer is a nitride, for example, the semiconductor laminated substrate is as described in JP-A-6-260682, JP-A-7-15041, JP-A-9-64419, JP-A-9-36430. , Substrate, buffer layer (GaN, AlN, etc.), n-type conductive layer (n-GaN, n-AlGaN, n-type contact layer, n-type cladding layer), light emitting layer (InGaN, GaN, etc.), p-type When the conductive layer (p-type contact layer, p-type cladding layer such as p-GaN, p-AlGaN) has in this order, the inorganic particles may be included in any of the above layers. It is preferably present above.

The substrate is, for example, sapphire, SiC, Si, MgAl ₂ O ₄ , LiTaO ₃ , ZrB ₂ , CrB ₂ , gallium nitride, and a composite in which a nitride semiconductor is grown thereon.

The composite includes, for example, a substrate and a low temperature buffer layer thereon. The low-temperature buffer layer has, for example, the formula: Al _a Ga _1-a N [a is usually 0 or more and 1 or less, preferably 0.5 or less. ] Is represented.
Further, the composite may include an InGaAlN layer on the low-temperature buffer layer.

In a semiconductor laminated substrate including a substrate such as sapphire, SiC, Si, MgAl ₂ O ₄ , LiTaO ₃ , ZrB ₂ , CrB ₂ , gallium nitride, since the inorganic particles are arranged on the substrate, the substrate and the semiconductor layer Compared with a semiconductor laminated substrate having a small bonding area and no inorganic particles, the substrate is easily peeled off from the semiconductor layer. The peeling is performed using, for example, a laser or an ultrasonic wave. In the case of peeling the substrate, a conductive substrate or a high thermal conductivity substrate may be bonded to the semiconductor layer before peeling. In addition, the semiconductor multilayer substrate may be used after being cut into an appropriate size in order to function as a light emitting element.

  The light emitting device of the present invention includes the above-mentioned semiconductor laminated substrate and an electrode. An electrode supplies an electric current to a light emitting layer, for example, is a metal like Au, Pt, Pd, or ITO.

In a light-emitting element in which the semiconductor layer is a metal nitride, an n-type conductive layer (n-type contact layer, n-type cladding layer, etc.), a light-emitting layer, a p-type conductive layer (p-type contact layer, p-type cladding layer, etc.) In addition, a layer necessary for the operation of the nitride semiconductor light emitting device is included. These layers are, for example, In _x Ga _y Al _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1). The light emitting device may further include a single layer or a multilayer (a thick film layer, a superlattice thin film layer, etc.) or a buffer layer for making a layer necessary for the operation of the nitride semiconductor light emitting device a high quality crystal. Good. Such a light-emitting element in which the semiconductor layer is a metal nitride may be manufactured by the method described in Appl. Phys. Lett. Vol. 60, p.

In a light-emitting element in which a semiconductor layer is a high molecular organic compound, the semiconductor layer is used as either an electron transport layer or a hole transport layer. The light emitting element includes a semiconductor laminated substrate, an electrode, and a light emitting layer. For example, the light emitting element includes a substrate, an anode, a hole transport layer, a light emitting layer, an electron transport layer, and a cathode in this order, and further includes an electrode.
The substrate is usually glass. The anode is, for example, ITO. The hole transport layer is polyvinyl carbazole or a derivative thereof, polysilane or a derivative thereof, a polysiloxane derivative having an aromatic amine compound group in a side chain or a main chain, polyaniline or a derivative thereof, polythiophene or a derivative thereof. The light emitting layer may be, for example, poly (p-phenylene vinylene), polyfluorene (Jpn. J. Appl. Phys. Vol. 30, L1941, 1999), polyparaphenylene derivative (Adv Mater. Vol. 4, p. 36, 1992). ), A triplet light emitting complex Ir (ppy) ₃ (Appl. Phys. Lett. Vol. 75, p. 4, 1999) having iridium as a central metal. The electron transport layer is an oxadiazole derivative, anthraquinodimethane or a derivative thereof, benzoquinone or a derivative thereof, or the like. The cathode is preferably made of a material having a low work function, such as lithium, sodium, potassium, rubidium, cesium, beryllium, magnesium, calcium, strontium, barium, and aluminum. The electrode should just supply an electric current to a light emitting layer. A light emitting device in which the semiconductor layer is a high molecular organic compound may be manufactured by the method described in Nature Vol.347, p.539, 1990, for example.

  The method for producing a semiconductor laminated substrate of the present invention includes a step (a) of arranging inorganic particles excluding metal nitride on a substrate.

The substrate is a composite in which sapphire, SiC, Si, MgAl ₂ O ₄ , LiTaO ₃ , ZrB ₂ , CrB ₂ , gallium nitride, and a nitride semiconductor are grown thereon.

The composite is obtained, for example, by growing a low-temperature buffer layer on a substrate. What is necessary is just to grow a low temperature buffer layer in the temperature range of 400 to 700 degreeC, for example. When growing the low temperature buffer layer, the low temperature buffer layer may be one layer or two or more layers.
Furthermore, the composite may be one in which an InGaAlN layer is grown on a low-temperature buffer layer.

  Inorganic particles include, for example, oxides, nitrides, carbides, borides, sulfides, selenides, and metals. These contents are usually 50% by weight or more, preferably 90% or more, and more preferably 95% or more with respect to the inorganic particles. The composition of the inorganic particles may be obtained by chemical analysis, emission analysis, or the like.

Examples of the oxide include silica, alumina, zirconia, titania, ceria, zinc oxide, tin oxide, and yttrium aluminum garnet (YAG).
Examples of the nitride include silicon nitride and boron nitride.
Examples of the carbide include silicon carbide (SiC), boron carbide, diamond, graphite, and fullerenes.
Examples of borides include zirconium boride (ZrB ₂ ) and chromium boride (CrB ₂ ).
Examples of the sulfide include zinc sulfide, cadmium sulfide, calcium sulfide, and strontium sulfide.
Examples of selenides include zinc selenide and cadmium selenide.
Oxides, nitrides, carbides, borides, sulfides, and selenides may be partially substituted with other elements in the elements contained therein. Examples of these include cerium and europium as activators. And phosphors of silicate and aluminate.

  As the metal, silicon (Si), nickel (Ni), tungsten (W), tantalum (Ta), chromium (Cr), titanium (Ti), magnesium (Mg), calcium (Ca), aluminum (Al), gold (Au), silver (Ag), and zinc (Zn).

  The inorganic particles may be a material that becomes the oxide, nitride, carbide, boride, sulfide, selenide, or metal when heat-treated, and may be, for example, silicone. Silicone is a polymer having an Si—O—Si inorganic bond as a main skeleton and a structure having an organic substituent in Si. When heat-treated at about 500 ° C., it becomes silica.

Inorganic particles may be used alone or in combination. Examples of combinations include inorganic particles having oxides on nitride particles.
Among these, the inorganic particles are preferably oxides, and more preferably silica.

  The inorganic particles preferably contain a mask material for the growth of the semiconductor layer, and more preferably have a mask material on the surface thereof. When the mask material is present on the surface of the inorganic particles, the mask material preferably covers 30% or more of the surface of the inorganic particles, and more preferably covers 50% or more. The mask material is, for example, silica, zirconia, titania, silicon nitride, boron nitride, tungsten (W), molybdenum (Mo), chromium (Cr), cobalt (Co), silicon (Si), aluminum (Au), zirconium ( Zr), tantalum (Ta), titanium (Ti), niobium (Nb), nickel (Ni), platinum (Pt), vanadium (V), hafnium (Hf), palladium (Pd), preferably silica. . These may be used alone or in combination. The inorganic particles having a mask material on the surface may be prepared by, for example, a method of covering the particle surface with a mask material by vapor deposition or sputtering, or hydrolyzing a compound on the particle surface.

The inorganic particles have a spherical shape (for example, one having a circular or elliptical cross section), a plate shape (one having an aspect ratio L / T of length L and thickness T of 1.5 to 100), and needle shape. (For example, the ratio L / W of the width W to the length L is 1.5 to 100) or indefinite shape (including particles having various shapes and irregular shapes as a whole). Well, preferably spherical. Therefore, the inorganic particles are more preferably spherical silica.
As the spherical silica, use of colloidal silica is recommended from the viewpoint that monodispersed and relatively uniform particle diameters can be easily obtained. Colloidal silica is a colloidal dispersion of silica particles in a solvent (such as water), and is obtained by a method of ion-exchange of sodium silicate or a method of hydrolyzing an organosilicon compound such as tetraethylorthosilicate (TEOS). .

The inorganic particles have an average particle size of usually 5 nm or more, preferably 10 nm or more, more preferably 0.1 μm or more, and usually 50 μm or less, preferably 10 μm or less, more preferably 1 μm or less. When the inorganic particles having an average particle size in the above range are included, a semiconductor layer laminated substrate serving as a light emitting element exhibiting high luminance can be obtained.
In addition, the inorganic particles have a d / λ of usually 0.01 or more, preferably when the emission wavelength of the light-emitting element including the semiconductor layer laminated substrate is λ (nm) and the average particle diameter of the inorganic particles is d (nm). It is 0.02 or more, more preferably 0.2 or more, and is usually 100 or less, preferably 30 or less, more preferably 3.0 or less.

  The average particle diameter is a volume average particle diameter measured by a centrifugal sedimentation method. The average particle diameter may be measured by a measurement method other than the centrifugal sedimentation method, for example, a dynamic light scattering method, a Coulter counter method, a laser diffraction method, or an electron microscope. What is necessary is just to convert into the volume average particle diameter measured by the method. For example, the average particle size of the standard particles is obtained by a centrifugal sedimentation method and other particle size measurement methods, and these correlation coefficients are calculated. The correlation coefficient is preferably obtained by calculating a correlation coefficient with respect to the volume average particle diameter measured by the centrifugal sedimentation method for a plurality of standard particles having different particle diameters and creating a calibration curve. If a calibration curve is used, the volume average particle diameter can be obtained from the average particle diameter obtained by a measurement method other than the centrifugal sedimentation method.

  The inorganic particles may be arranged by, for example, a method of immersing the substrate in a slurry containing inorganic particles and a medium, or a method of drying after applying or spraying the slurry onto the substrate. The medium is water, methanol, ethanol, isopropanol, n-butanol, ethylene glycol, dimethylacetamide, methyl ethyl ketone, methyl isobutyl ketone, and preferably water. The application is preferably performed by spin coating, and according to this method, the arrangement density of the inorganic particles can be made uniform. Drying may be performed using a spinner.

The coverage of the inorganic particles on the substrate is determined by the number P of particles in the measurement field (area S) when the substrate surface on which the inorganic particles are arranged is observed from above with a scanning electron microscope (SEM), and the average particle diameter d of the particles. Thus, the following equation can be obtained.
Coverage (%) = ((d / 2) ² × π · P · 100) / S
The coverage of the inorganic particles on the substrate is usually 0.1% or more, preferably 5% or more, more preferably 30% or more, and usually 90% or less, preferably 80% or less, more preferably 80% or less.

  The inorganic particles may be arranged in two or more layers on the substrate, but it is preferable that the inorganic particles are arranged in one layer, for example, 90% or more of the inorganic particles are arranged in one layer. In the case of one layer, the semiconductor layer is epitaxially grown and planarization proceeds. FIG. 1A shows a cross-sectional view of a structure in which inorganic particles are arranged on a substrate.

  The manufacturing method of the present invention further includes a step (b) of growing a semiconductor layer on the one obtained in the step (a).

As the semiconductor layer, for example, a metal nitride is exemplified, and preferably represented by In _x Ga _y Al _z N (where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1). Group 3-5 nitride. There may be one semiconductor layer or two or more semiconductor layers.

  The semiconductor layer may be either one that forms a facet structure or one that does not form a facet structure, but one that forms a facet structure is preferable when the coverage of inorganic particles is high. The semiconductor layer forming the facet structure is easily flattened.

In the case where the semiconductor layer is grown while forming the facet structure, the preferred composition of the group 3-5 nitride semiconductor layer depends on the particle size and arrangement state of the inorganic particles, but when the coverage of the inorganic particles is high, Usually, a high Al composition is preferable. However, when the buried layer is a GaN layer or an AlGaN layer having a lower Al composition than the Al composition of the facet structure, if the Al composition of the Group 3-5 nitride semiconductor layer becomes too high, the buried layer and the facet structure Lattice mismatch that occurs between them increases, and cracks and dislocations may occur in the substrate.
The Al composition of the facet structure may be adjusted according to the particle size and arrangement state of the inorganic particles from the viewpoint of obtaining crystals with excellent crystal quality without cracks. For example, the coverage of the inorganic particles is 50% or more In this case, it is preferable to grow a facet structure represented by the formula: Al _d Ga _1-d N [0 <d <1], and Al _d Ga _1-d N [0.01 ≦ d ≦ 0.5] ( More preferably, the AlN mixed crystal ratio is 1.0% or more and 50% or less.

  The facet growth temperature is usually 700 ° C. or higher, preferably 750 ° C. or higher, and is usually 1000 ° C. or lower, preferably 950 ° C. or lower. When the low temperature buffer layer is grown, the growth temperature of the facet structure is preferably between the growth temperature of the low temperature buffer layer and the growth temperature of the buried layer. The facet layer may be one layer or two or more layers. As an example of a semiconductor laminated substrate including a low-temperature buffer layer in FIG. 2, a semiconductor laminated substrate including a substrate 21, a low-temperature buffer layer 22, a facet structure 24, a semiconductor layer 25, and inorganic particles 23 are present on the substrate 21. Indicates.

When there is a low-temperature buffer layer, crystal nuclei of a semiconductor layer (for example, a nitride semiconductor layer) are easily formed, and a semiconductor layer with high crystal quality (for example, a diffraction peak of the (302) plane in X-ray diffraction rocking curve measurement) A semiconductor layer having a full width at half maximum FWHM of 650 arcsec or less, preferably 550 arcsec or less) is grown. The low-temperature buffer layer has, for example, the formula: Al _a Ga _1-a N [a is usually 0 or more and 1 or less, preferably 0.5 or less. ] Is represented.

  The X-ray diffraction rocking curve measurement method is a method for evaluating the crystal orientation of a film. An X-ray incident angle and a detection angle are set so that a specific crystal plane of a sample satisfies a diffraction condition, and in that state, The angle dependence of the diffracted light intensity when the angle is changed is measured, and the variation in crystal orientation is evaluated from the extent of the spread. In general, the degree of variation in crystal orientation is represented by the half width of the X-ray diffraction rocking curve peak. In semiconductors grown on the sapphire substrate C plane, hexagonal columnar crystals are generally easily formed, and the inclination of the crystal is evaluated from diffraction measurements of crystal planes parallel to the C plane such as the (002) plane and (004) plane. do it. The crystal twist in the C plane may be evaluated from diffraction measurement of a crystal plane inclined from the C plane. For example, diffraction peaks such as the (102) plane and the (302) plane may be used.

The growth may be performed by an epitaxial growth method such as MOVPE, molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE).
When the group 3-5 nitride semiconductor layer is grown by MOVPE, the following group 3 source and group 5 source may be introduced by a method of introducing a reactor using a carrier gas.

Group 3 raw materials are, for example,
Trimethylgallium [(CH ₃ ) ₃ Ga, hereinafter referred to as TMG. ],
Triethylgallium [(C ₂ H ₅ ) ₃ Ga, hereinafter referred to as TEG. ] Like formula:
R ₁ R ₂ R ₃ Ga
[R ₁ , R ₂ and R ₃ represent a lower alkyl group. ] Trialkylgallium represented by
Trimethylaluminum [(CH ₃ ) ₃ Al, hereinafter referred to as TMA. ],
Triethylaluminum [(C ₂ H ₅ ) ₃ Al, hereinafter referred to as TEA. ],
Expression like triisobutylaluminum _{[(i-C 4 H 9} ) 3 Al]:
R ₁ R ₂ R ₃ Al
[R ₁ , R ₂ and R ₃ represent a lower alkyl group. ] A trialkylaluminum represented by
Trimethylamine alane [(CH ₃ ) ₃ N: AlH ₃ ];
Trimethylindium [(CH ₃ ) ₃ In, hereinafter referred to as TMI. ],
Formulas such as triethylindium [(C ₂ H ₅ ) ₃ In]:
R ₁ R ₂ R ₃ In
[R ₁ , R ₂ and R ₃ represent a lower alkyl group. ] A trialkylindium represented by
1 to 2 alkyl groups substituted with halogen atoms from trialkylindium such as diethylindium chloride [(C ₂ H ₅ ) ₂ InCl];
Formulas such as indium chloride [InCl]:
InX
Indium halide or the like represented by [X is a halogen atom].
These may be used alone or in combination.
Of the Group 3 materials, TMG is preferred as the gallium source, TMA as the aluminum source, and TMI as the indium source.

  Examples of the Group 5 raw material include ammonia, hydrazine, methyl hydrazine, 1,1-dimethylhydrazine, 1,2-dimethylhydrazine, t-butylamine, ethylenediamine, and the like. These may be used alone or in combination. Of the Group 5 materials, ammonia and hydrazine are preferable, and ammonia is more preferable.

  Examples of the atmospheric gas during growth and the raw material carrier gas include nitrogen, hydrogen, argon, and helium, preferably hydrogen and helium. These may be used alone or in combination.

  The reaction furnace includes, for example, a reaction furnace, a supply line for supplying raw materials from a storage container to the reaction furnace, and a susceptor. The susceptor is a device for heating the substrate, and is placed in a reaction furnace. Further, the susceptor usually has a structure that rotates by power in order to uniformly grow the semiconductor layer. The susceptor has a heating device such as an infrared lamp inside. The raw material supplied to the reaction furnace through the supply line is thermally decomposed on the substrate by the heating device, and a semiconductor layer is vapor-phase grown on the substrate. Of the raw materials supplied to the reaction furnace, unreacted raw materials are usually discharged from the reaction furnace to the outside through an exhaust line and sent to an exhaust gas treatment device.

When the group 3-5 nitride semiconductor layer is grown by HVPE, the following group 3 raw material and group 5 raw material may be introduced by the above-described method using a carrier gas.
The Group 3 raw material is, for example, gallium chloride gas generated by reacting gallium metal and hydrogen chloride gas at a high temperature, or indium chloride gas generated by reacting indium metal and hydrogen chloride gas at a high temperature.
The Group 5 raw material is, for example, ammonia.
The carrier gas is, for example, nitrogen, hydrogen, argon, helium, preferably hydrogen, helium. These may be used alone or in combination.

In addition, when the group 3-5 nitride semiconductor layer is grown by MBE, the semiconductor layer may be grown by the above-described method of introducing the reactor using the group 3 material and the group 5 material with a carrier gas.
The Group 3 raw material is, for example, a metal such as gallium, aluminum, or indium.
The Group 5 raw material is, for example, nitrogen or ammonia gas.
The carrier gas is, for example, nitrogen, hydrogen, argon, helium, preferably hydrogen, helium. These may be used alone or in combination.

  In the production method of the present invention, steps (a) and (b) may be repeated, or steps (a), (b) and (c) may be repeated. By repeating the process, a semiconductor laminated substrate used as a light emitting element exhibiting higher luminance can be obtained.

  In the step (b), normally, the semiconductor layer starts growing in a region where inorganic particles are not present (see reference numeral 13 in FIG. 1A), and then a facet structure is formed (FIG. 1 ( see b)

The production method of the present invention preferably further includes a step (c) of growing a semiconductor layer and planarizing the surface after the step (b).
In the step (c), for example, by promoting lateral growth, the facet structure of the substrate obtained by growing the semiconductor layer while forming the facet structure is embedded and planarized (see FIG. 1C). ). When the semiconductor layer is grown in this way, the dislocations reaching the facet are bent laterally, and the inorganic particles are buried in the semiconductor layer. As a result, crystal defects in the semiconductor layer are reduced.

  Similarly, a semiconductor laminated substrate in which a semiconductor layer is a polymer compound may be manufactured by a method including a step of disposing inorganic particles on a substrate and a step of forming a semiconductor layer on the substrate. An anode (for example, an ITO layer having a thickness of 100 to 200 nm) is formed on a glass substrate (for example, a glass substrate), and an inorganic particle-containing poly (ethylenedioxythiophene) / polystyrene sulfonic acid solution (product) by spin coating on the anode After applying a name “Baytron” (manufactured by Bayer) and drying to form a hole transport layer (eg, thickness of about 50 nm), a chloroform solution of a polymer light emitter was applied by spin coating, and about 80 ° C. under reduced pressure. To form a light emitting layer (eg, about 70 nm thick), and then deposited by evaporation to form a cathode buffer layer (eg, 0.4 nm thick lithium fluoride). Beam layer), a cathode (e.g., the thickness 25nm of the calcium layer), followed by aluminum layer (for example, may be formed thickness 40 nm).

The present invention will be described with reference to examples, but the present invention is not limited thereto.
Example 1
As the substrate, sapphire whose C surface was mirror-polished was used. Colloidal silica (manufactured by Fuso Chemical Industry Co., Ltd., PL-20 (trade name), average particle diameter of 370 nm, particle concentration of 24% by weight) was used as the inorganic particles. A substrate was set on a spinner, and colloidal silica diluted to 10% by weight was applied thereon and spin-coated. When observed with SEM, the coverage of the substrate surface with colloidal silica particles was 39%.
The nitride semiconductor layer was epitaxially grown, and colloidal silica particles were embedded in the nitride semiconductor layer. Epitaxial growth was performed by atmospheric pressure MOVPE. A GaN low-temperature buffer layer having a thickness of about 500 mm was grown at 1 atm by supplying susceptor temperature of 485 ° C., carrier gas as hydrogen, and supplying carrier gas, ammonia and TMG. Next, the temperature of the susceptor was set to 900 ° C., and carrier gas, ammonia, and TMG were supplied to form an undoped GaN layer for forming facets. Next, the furnace pressure is lowered to 1/4 atm with a susceptor temperature of 1040 ° C., carrier gas, ammonia and TMG are supplied to form an undoped GaN layer having a thickness of about 5 μm, and colloidal silica particles are formed in the GaN crystal. A nitride semiconductor multilayer substrate contained in layers was obtained. An electron micrograph of a cross section of the nitride semiconductor multilayer substrate is shown in FIG. Further, when the cross-sectional transmission electron microscope of the nitride semiconductor multilayer substrate was observed, dislocations were bent.

In the X-ray diffraction rocking curve measurement, the half width of the (302) plane diffraction peak was 494 arcsec, and the half width of the (004) plane diffraction peak was 215 arcsec.

  An n-type semiconductor layer, an InGaN light emitting layer (MQW structure), and a p-type semiconductor layer are grown in this order on the nitride semiconductor multilayer substrate, etched to expose the n-type contact layer, electrodes are formed, and then the elements are separated Thus, a blue LED having an emission wavelength of 440 nm was obtained (d / λ = 0.8). The blue LED had an optical output of 8.5 mW at a current of 20 mA.

Example 2
Example 1 except that colloidal silica (manufactured by Nippon Shokubai Co., Ltd., Seahoster KE-W50 (trade name), average particle size 550 nm, particle concentration 20 wt% diluted to 10 wt%) was used as the inorganic particles. Blue LEDs were obtained by performing the same operations as [Inorganic particle arrangement], [Semiconductor layer growth] and [Light emitting device production] (d / λ = 1.3). The coverage of the substrate surface with colloidal silica particles was 36%.

In the X-ray diffraction rocking curve measurement, the half value width of the diffraction peak on the (302) plane was 493 arcsec, and the half value width of the diffraction peak on the (004) plane was 220 arcsec. FIG. 4 shows the relationship between the Al composition of the low-temperature buffer layer and the half-value width of the peak on the (302) plane.
The blue LED had a light output of 9.9 mW at a current of 20 mA.

Example 3
Example 1 [Inorganic particle arrangement], [Semiconductor layer growth] and [Manufacturing light-emitting element] in Example 1 except that a GaN layer grown on sapphire whose C-surface was mirror-polished was used as the substrate. The same operation was performed to obtain a blue LED (d / λ = 0.8). The coverage of the substrate surface with colloidal silica particles was 32%. Further, the blue LED had an optical output of 7.3 mW when the current was 20 mA.

Example 4
Example 1 except that colloidal silica (manufactured by Nissan Chemical Industries, MP-1040 (trade name), average particle size of 100 nm, particle concentration of 40% by weight diluted to 10% by weight) was used as the inorganic particles. The same operation as in [Disposition of inorganic particles] was performed. The coverage of the substrate surface with colloidal silica particles was 55%.
[Growth of semiconductor layer] and [Manufacture of light-emitting device] in Example 1 except that the facet was formed as a two-layer structure of an 800 ° C. undoped AlGaN layer (AlN composition 1.7%) and an 900 ° C. undoped GaN layer. The same operation was performed to obtain a blue LED (d / λ = 0.2).
The blue LED had a light output at a current of 20 mA that was 2.4 times that of the LED not containing silica.

Example 5
Implemented except that colloidal silica (manufactured by Nissan Chemical Industries, Ltd., MP-2040 (trade name), average particle size 200 nm, particle concentration 40 wt% diluted to 10 wt%) was used as the inorganic particles. Blue LEDs were obtained by performing the same operations as in [Inorganic particle arrangement], [Semiconductor layer growth] and [Light emitting device production] in Example 1 (d / λ = 0.5). The coverage of the substrate surface with colloidal silica particles was 40%. The blue LED had a light output at a current of 20 mA that was 2.2 times that of the LED not containing silica.

Example 6
Implemented except that colloidal silica (manufactured by Nissan Chemical Industries, Ltd., MP-2040 (trade name), average particle size 200 nm, particle concentration 40% by weight diluted to 20% by weight) was used as the inorganic particles. Perform the same operation as [Inorganic particle arrangement] in Example 1. The coverage of the substrate surface with colloidal silica particles was 76%.
Next, the same operation as in [Growth of semiconductor layer and production of light emitting device] in Example 4 was performed to obtain a blue LED (d / λ = 0.5).
The blue LED had a light output of 2.7 times higher than that not containing silica at 20 mA.

Example 7
Implemented except that colloidal silica (manufactured by Nissan Chemical Industries, Ltd., MP-3040 (trade name), average particle size of 300 nm, particle concentration of 40% by weight diluted to 20% by weight) was used as the inorganic particles. The same operation as [Inorganic particle arrangement] in Example 1 was performed. The coverage of the substrate surface with colloidal silica particles was 37%.
Next, the same operation as in [Growth of semiconductor layer and production of light emitting device] in Example 4 was performed to obtain a blue LED (d / λ = 0.7).
The blue LED had a light output of 3.5 times that at 20 mA energization as compared with that containing no silica.

Example 8
Implemented except that colloidal silica (manufactured by Nissan Chemical Industries, Ltd., MP-3040 (trade name), average particle size of 300 nm, particle concentration of 40% by weight diluted to 30% by weight) was used as the inorganic particles. The same operation as [Inorganic particle arrangement] in Example 1 was performed. The coverage of the substrate surface with colloidal silica particles was 71%.
Next, the same operation as in [Growth of semiconductor layer and production of light emitting device] in Example 4 was performed to obtain a blue LED (d / λ = 0.7).
The blue LED had a light output at a current of 20 mA that was 3.3 times that of the LED not containing silica.

Example 9
Implemented except that colloidal silica (manufactured by Nissan Chemical Industries, Ltd., MP-4540 (trade name), average particle size 450 nm, particle concentration 40% by weight diluted to 20% by weight) was used as the inorganic particles. The same operation as [Inorganic particle arrangement] in Example 1 was performed. The coverage of the substrate surface with colloidal silica particles was 30%.
Next, the same operation as in [Growth of semiconductor layer and production of light emitting device] in Example 4 was performed to obtain a blue LED (d / λ = 1.0).
The blue LED had a light output at a current of 20 mA that was 3.0 times that of the LED not containing silica.

Example 10
Implemented except that colloidal silica (manufactured by Nissan Chemical Industries, Ltd., MP-4540 (trade name), average particle size 450 nm, particle concentration 40 wt% diluted to 30 wt%) was used as the inorganic particles. The same operation as [Inorganic particle arrangement] in Example 1 was performed. The coverage of the substrate surface with colloidal silica particles was 48%.
Next, the same operation as in [Growth of semiconductor layer and production of light emitting device] in Example 4 was performed to obtain a blue LED (d / λ = 1.0).
The blue LED had a light output of 4.5 times that at 20 mA energization compared to the one not containing silica.

Example 11
[Inorganic particle arrangement] in Example 1 except that colloidal silica (manufactured by Nissan Chemical Industries, Ltd., MP-4540 (trade name), average particle size 450 nm, particle concentration 40% by weight) was used as the inorganic particles. The same operation was performed. The coverage of the substrate surface with colloidal silica particles was 48%.
Next, the same operation as in [Growth of semiconductor layer and production of light emitting device] in Example 4 was performed to obtain a blue LED (d / λ = 1.0).
The blue LED had a light output at a current of 20 mA that was 3.0 times that of the LED not containing silica.

Example 12
Example 1 except that colloidal silica (manufactured by Nippon Shokubai Co., Ltd., Seahoster KE-W50 (trade name), average particle size 550 nm, particle concentration 20 wt% diluted to 10 wt%) was used as the inorganic particles. The same operation as [Disposition of inorganic particles] was performed.
Next, the same operation as in [Growth of semiconductor layer and production of light emitting device] in Example 4 was performed to obtain a blue LED (d / λ = 1.3).
The blue LED had a light output at a current of 20 mA that was 2.4 times that of the LED not containing silica.

Example 13
The same operation as [Inorganic particle arrangement] in Example 1 except that colloidal silica (manufactured by Nippon Shokubai Co., Ltd., Seahoster KE-W50 (trade name), average particle size 550 nm, particle concentration 20% by weight) was used as the inorganic particles. Went. The coverage of the substrate surface with colloidal silica particles was 60%.
Next, the same operation as in [Growth of semiconductor layer and production of light emitting device] in Example 4 was performed to obtain a blue LED (d / λ = 1.3).
The blue LED had a light output of 2.9 times that at 20 mA energization compared to the one not containing silica.

Example 14
Example 1 [inorganic, except that silica (Ube Nitto Kasei, high plesica UF (trade name), average particle size 1.0 μm, dispersed in ethanol so as to be 8% by weight) was used as the inorganic particles. The same operation as in [Particle Arrangement] was performed. The coverage of the substrate surface with colloidal silica particles was 56%.
Next, the same operation as in [Growth of semiconductor layer and production of light emitting device] in Example 4 was performed to obtain a blue LED (d / λ = 2.3).
The blue LED had a light output at a current of 20 mA that was 2.2 times that of the LED not containing silica.

Comparative Example 1
A blue LED was obtained in the same manner as in [Inorganic particle arrangement], [Semiconductor layer growth], and [Light emitting device production] in Example 1 except that inorganic particles were not used.
The blue LED had a light output of 5.0 mW at a current of 20 mA.

Comparative Example 2
A SiO ₂ film having a thickness of 100 nm was formed on the base substrate by sputtering, and a stripe pattern in the <1-100> direction having an opening portion of 5 μm and a pattern portion of 5 μm was produced using a normal photolithography method. Using this substrate, a nitride semiconductor multilayer substrate and then a nitride semiconductor light emitting device were obtained in the same manner as in Example 1 except that inorganic particles were not used. When the light output of the obtained nitride semiconductor light emitting device at an electric current of 20 mA was measured, it was 4.5 mW.

Test example 1
Colloidal silica (manufactured by Nippon Shokubai Co., Ltd., Seahoster KE-W50 (trade name), average particle size 550 nm, particle concentration 20% by weight diluted to 10% by weight) was used as inorganic particles, and (susceptor temperature The same operation as [Inorganic particle arrangement] and [Semiconductor layer growth] in Example 1 was performed except that the low temperature buffer layer (grown at 485 ° C.) was not grown.
The surface of the obtained semiconductor laminated substrate had large irregularities and was not a mirror surface.

Test example 2
Colloidal silica (manufactured by Nippon Shokubai Co., Ltd., Seahoster KE-W50 (trade name), average particle size 550 nm, particle concentration 20% by weight diluted to 10% by weight) was used as inorganic particles, and (susceptor temperature The same operations as in [Inorganic particle arrangement] and [Semiconductor layer growth] in Example 1 were performed except that the undoped GaN layer for forming facets (growing at 900 ° C.) was not grown.
The surface of the obtained semiconductor laminated substrate had large irregularities and was not a mirror surface.

Test example 3
As the inorganic particles, colloidal silica (manufactured by Nippon Shokubai Co., Ltd., Seahoster KE-W50 (trade name), average particle size 550 nm, particle concentration 20 wt% diluted to 10 wt%) was used, and the susceptor temperature was A nitride semiconductor multilayer substrate is obtained by performing the same operations as [Inorganic particle arrangement] and [Semiconductor layer growth] in Example 1 except that the low-temperature buffer layer grown at 485 ° C. is Al _0.3 Ga _0.7 N. It was. The half width of the X-ray diffraction rocking curve was 194 arcsec for the (004) plane and 470 arcsec for the (302) plane. FIG. 4 shows the relationship between the Al composition of the low-temperature buffer layer and the half-value width of the peak on the (302) plane.

Test example 4
A nitride semiconductor substrate was obtained by performing the same operation as in Test Example 3 except that the low-temperature buffer layer grown at a susceptor temperature of 485 ° C. was Al _0.4 Ga _0.6 N. The half width of the X-ray diffraction rocking curve was 199 arcsec for the (004) plane and 447 arcsec for the (302) plane. The result is shown in FIG.

Test Example 5
A nitride semiconductor substrate was obtained by performing the same operation as in Test Example 3 except that the low-temperature buffer layer grown at a susceptor temperature of 485 ° C. was AlN. The half width of the X-ray diffraction rocking curve was 283 arcsec for the (004) plane and 596 arcsec for the (302) plane. The result is shown in FIG.

Test Example 6
A nitride semiconductor substrate was obtained by performing the same operation as in Test Example 3 except that a low-temperature buffer layer grown at a susceptor temperature of 485 ° C. was not grown. The crystal surface was uneven and a mirror surface could not be obtained.

  The present invention provides a semiconductor multilayer substrate used as a semiconductor light emitting device exhibiting high luminance. Moreover, this invention provides the manufacturing method of a semiconductor laminated substrate. Furthermore, this invention provides the light emitting element containing a semiconductor laminated substrate.

The process schematic explaining the manufacturing method of the nitride semiconductor laminated substrate. The figure which shows the semiconductor laminated substrate containing a low-temperature buffer layer and a facet formation layer. The electron micrograph of the cross section of a semiconductor laminated substrate. The figure which shows the relationship of the half value width of the peak of (302) plane in Al composition of a low-temperature buffer layer, and a X-ray diffraction rocking curve measurement.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 Substrate 12 Inorganic particle 13 Growth region 14 for growing nitride semiconductor Facet structure 15 of nitride semiconductor Epitaxially grown nitride semiconductor layer 21 Substrate 22 Low-temperature buffer layer 23 Inorganic particle 24 Facet structure 25 Semiconductor layer

Claims (28)

  A semiconductor laminated substrate comprising a semiconductor layer containing inorganic particles excluding metal nitride.   The semiconductor multilayer substrate according to claim 1, wherein the semiconductor layer contains a metal nitride, a high molecular organic compound, or a low molecular organic compound in a portion other than the inorganic particles.   The semiconductor multilayer substrate according to claim 1, wherein the semiconductor layer contains a metal nitride in a portion other than the inorganic particles.   The semiconductor multilayer substrate according to any one of claims 1 to 3, wherein the inorganic particles include at least one selected from the group consisting of oxides, nitrides, carbides, borides, sulfides, selenides, and metals.   The semiconductor multilayer substrate according to claim 4, wherein the oxide is at least one selected from the group consisting of silica, alumina, zirconia, titania, ceria, magnesia, zinc oxide, tin oxide, and yttrium aluminum garnet.   The semiconductor multilayer substrate according to claim 1, wherein the inorganic particles include a mask material for the growth of the semiconductor layer.   The semiconductor laminated substrate according to claim 6, wherein the inorganic particles have a mask material on a surface thereof.   The semiconductor laminated substrate according to claim 7, wherein the mask material is present so as to cover 30% or more of the surface of the inorganic particles.   The mask material is at least one selected from the group consisting of silica, zirconia, titania, silicon nitride, boron nitride, W, Mo, Cr, Co, Si, Au, Zr, Ta, Ti, Nb, Pt, V, Hf and Pd. The semiconductor laminated substrate according to claim 6, wherein   The semiconductor laminated substrate according to claim 1, wherein the inorganic particles have a spherical shape, a plate shape, a needle shape, or an indeterminate shape.   The semiconductor multilayer substrate according to claim 1, wherein the inorganic particles have an average particle diameter of 5 nm or more and 50 μm or less.   The semiconductor multilayer substrate according to claim 1, further comprising a substrate. A method for producing a semiconductor laminated substrate, comprising the following steps (a) and (b).
(a) placing inorganic particles excluding metal nitride on a substrate;
(b) A step of growing a semiconductor layer. Furthermore, the manufacturing method of Claim 13 including a process (c) after a process (b).
(c) A step of growing the semiconductor layer to flatten the surface. A method for producing a semiconductor multilayer substrate, comprising the following steps (a1), (a2) and (b).
(a1) a step of arranging inorganic particles excluding metal nitride on a substrate;
(a2) growing a low temperature buffer layer,
(b) A step of growing a semiconductor layer. Furthermore, the manufacturing method of Claim 15 including a process (c) after a process (b).
(c) A step of growing the semiconductor layer to flatten the surface.   The manufacturing method according to claim 16, wherein the growth temperature in the step (b) is between the growth temperature in the step (a2) and the growth temperature in the step (c).   The manufacturing method according to claim 13, wherein the semiconductor layer has a diffraction peak half-value width of (302) plane in X-ray diffraction rocking curve measurement of 650 arcsec or less.   The manufacturing method according to claim 13, wherein the semiconductor layer contains a metal nitride.   The manufacturing method according to claim 13, wherein the semiconductor layer is grown by one selected from the group consisting of metal organic chemical vapor deposition, molecular beam epitaxy, and hydride vapor deposition. 21. The semiconductor layer according to claim 13, wherein the semiconductor layer has a facet structure and is represented by a formula In _x Ga _y Al _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1). The manufacturing method in any one. The manufacturing method according to claim 21, wherein the semiconductor layer has a facet structure and is represented by a formula Al _d Ga _1-d N (0 <d <1).   The manufacturing method according to any one of claims 13 to 22, wherein the inorganic particles are arranged so as to cover 0.1% to 90% of the growth surface of the substrate.   24. The manufacturing method according to claim 13, wherein the placement is performed by spin coating.   The light emitting element containing the semiconductor laminated substrate in any one of Claims 1-12.   The light emitting device according to claim 25, further comprising an electrode.   27. The light emitting device according to claim 25 or 26, wherein d / λ is 0.2 or more and 3.0 or less, where λ is an emission wavelength of the light emitting device and d is an average particle diameter of inorganic particles. The semiconductor laminated substrate obtained by the manufacturing method in any one of Claims 13-24.

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