JP2017098394A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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JP2017098394A
JP2017098394A JP2015228429A JP2015228429A JP2017098394A JP 2017098394 A JP2017098394 A JP 2017098394A JP 2015228429 A JP2015228429 A JP 2015228429A JP 2015228429 A JP2015228429 A JP 2015228429A JP 2017098394 A JP2017098394 A JP 2017098394A
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metal pattern
resin substrate
mounting
wire bonding
semiconductor device
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JP6581886B2 (en
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佳織 立花
Yoshiori Tachibana
佳織 立花
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Stanley Electric Co Ltd
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Stanley Electric Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/02002—Arrangements for conducting electric current to or from the device in operations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/024—Arrangements for cooling, heating, ventilating or temperature compensation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48471—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area being a ball bond, i.e. wedge-to-ball, reverse stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Led Device Packages (AREA)
  • Light Receiving Elements (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device capable of preventing breaking of wires caused by thermal expansion/contraction of a resin substrate.SOLUTION: At a surface side of a resin substrate 1, an LED element mounting metal pattern 11, a ZD element mounting metal pattern 12, a connection metal pattern 13, a wire bonding metal pattern 14, and a first dummy metal pattern 15 connected with the LED element mounting metal pattern 11 are formed. At a rear face side of the resin substrate 1, a mounting terminal metal pattern 16 and a mounting terminal metal pattern 17 are formed. The LED element mounting metal pattern 11 and the mounting terminal metal pattern 16 are electrically connected with each other, and the wire bonding metal pattern 14 and the mounting terminal metal pattern 17 are electrically connected with each other by the metal via 19. The wire bonding metal pattern 14 is sandwiched between the connection metal pattern 13 and the first dummy metal pattern 15.SELECTED DRAWING: Figure 1

Description

本発明は複数の半導体素子を搭載した半導体装置に関する。たとえば、半導体素子としては、発光ダイオード（ＬＥＤ）素子、レーザダイオード（ＬＤ）素子等の半導体発光素子、フォトダイオード（ＰＤ）素子等の半導体発光素子、及び逆電圧保護素子がある。   The present invention relates to a semiconductor device equipped with a plurality of semiconductor elements. For example, the semiconductor element includes a semiconductor light emitting element such as a light emitting diode (LED) element and a laser diode (LD) element, a semiconductor light emitting element such as a photodiode (PD) element, and a reverse voltage protection element.

従来の半導体装置としてガラスエポキシ基板等の樹脂基板を有するものがある（参照：特許文献１）。この樹脂基板の表面側において、電極パッド上にＬＥＤ素子及びツェナダイオード（ＺＤ）素子を搭載し、ＬＥＤ素子の一電極及びＺＤ素子の一電極は上記電極パッドから離間した他の電極パッド上にワイヤによって電気的に接続される。表面側のＬＥＤ素子が搭載された電極パッドと裏面側の電極パッドとはＬＥＤ素子の底面積より大きい断面積の延長部によって接続され、また、表面側の他の電極パッドと裏面側の他の電極パッドとは小さい断面積の電極によって接続される。これにより、ＬＥＤ素子から発生する熱をＬＥＤ素子の底面積より大きい断面積の延長部によって放熱し、高密度実装による熱的悪影響を排除する。   Some conventional semiconductor devices have a resin substrate such as a glass epoxy substrate (see Patent Document 1). On the surface side of the resin substrate, an LED element and a Zener diode (ZD) element are mounted on the electrode pad, and one electrode of the LED element and one electrode of the ZD element are wired on the other electrode pad separated from the electrode pad. Is electrically connected. The electrode pad on which the LED element on the front surface side is mounted and the electrode pad on the back surface side are connected by an extension of a cross-sectional area larger than the bottom area of the LED element, and the other electrode pad on the front surface side and the other electrode on the back surface side The electrode pad is connected by an electrode having a small cross-sectional area. As a result, heat generated from the LED element is dissipated by the extension of the cross-sectional area larger than the bottom area of the LED element, and the adverse thermal effects due to high-density mounting are eliminated.

特開２００８−７１９５５号公報JP 2008-71955 A

しかしながら、上述の従来の半導体装置をプリント配線基板に半田付けして使用状態にして熱衝撃試験を行うと、樹脂基板の熱応力による膨張収縮によってワイヤが断線するという課題がある。   However, when the above-described conventional semiconductor device is soldered to a printed circuit board and used in a thermal shock test, there is a problem that the wire is disconnected due to expansion and contraction due to thermal stress of the resin substrate.

上述の課題を解決するために、本発明に係る半導体装置は、樹脂基板と、第１、第２の半導体素子と、樹脂基板の表面側に設けられた、第１の半導体素子を搭載する第１の素子搭載用金属パターン、第２の半導体素子を搭載する第２の素子搭載用金属パターン、第１の素子搭載用金属パターンと第２の素子搭載用金属パターンとを接続する接続用金属パターン、第１、第２の半導体素子にワイヤによって接続されたワイヤボンディング用金属パターン、及び第１の素子搭載用金属パターンに接続され、ワイヤボンディング用金属パターンに近接した第１のダミー金属パターンと、樹脂基板の裏面側に設けられた、第１の素子搭載用金属パターンに対向した第１の実装端子用金属パターン並びに第２の素子搭載用金属パターン及びワイヤボンディング用金属パターンに対向した第２の実装端子用金属パターンと、樹脂基板を貫通し、第１の素子搭載用金属パターンと第１の実装端子用金属パターンとを電気的に接続する金属構造体とを具備し、ワイヤボンディング用金属パターンは、接続用金属パターンと第１のダミー金属パターンとによって挟まれたものである。   In order to solve the above-described problem, a semiconductor device according to the present invention includes a resin substrate, first and second semiconductor elements, and a first semiconductor element mounted on the surface side of the resin substrate. 1 element mounting metal pattern, a second element mounting metal pattern for mounting a second semiconductor element, and a connection metal pattern for connecting the first element mounting metal pattern and the second element mounting metal pattern A wire bonding metal pattern connected to the first and second semiconductor elements by wires, and a first dummy metal pattern connected to the first element mounting metal pattern and proximate to the wire bonding metal pattern; A first mounting terminal metal pattern, a second element mounting metal pattern, and a wire bonder, which are provided on the back side of the resin substrate and face the first element mounting metal pattern. Metal structure for connecting the first element mounting metal pattern and the first mounting terminal metal pattern through the resin substrate and the second mounting terminal metal pattern facing the metal pattern for mounting The wire bonding metal pattern is sandwiched between the connection metal pattern and the first dummy metal pattern.

本発明によれば、第１の素子搭載用金属パターンとワイヤボンディング用金属パターンとの間の樹脂基板の部分の熱応力による膨張収縮を第１のダミー金属パターンによって抑制し、ワイヤが受ける負荷が小さくなり、この結果、ワイヤの断線を防止できる。   According to the present invention, the first dummy metal pattern suppresses the expansion and contraction due to the thermal stress of the portion of the resin substrate between the first element mounting metal pattern and the wire bonding metal pattern, and the load received by the wire is reduced. As a result, wire breakage can be prevented.

本発明に係る半導体装置の第１の実施の形態を示し、（Ａ）は上面図、（Ｂ）は（Ａ）の樹脂基板の表面側金属パターン図、（Ｃ）は（Ａ）の樹脂基板の裏面側金属パターン図である。1A is a top view of a semiconductor device according to the present invention, FIG. 1B is a metal pattern diagram of a surface side of a resin substrate of FIG. It is a back side metal pattern figure. 図１の半導体装置の断面図であり、（Ａ）は図１の（Ａ）のＡ−Ａ線断面図、（Ｂ）は図１の（Ａ）のＢ−Ｂ線断面図、（Ｃ）は図１の（Ａ）のＣ−Ｃ線断面図、（Ｄ）は図１の（Ａ）のＤ−Ｄ線断面図である。2A is a cross-sectional view of the semiconductor device of FIG. 1, wherein FIG. 1A is a cross-sectional view taken along line AA of FIG. 1A, FIG. 1B is a cross-sectional view taken along line BB of FIG. 1 is a cross-sectional view taken along the line CC of FIG. 1A, and FIG. 4D is a cross-sectional view taken along the line DD of FIG. 比較例としての半導体装置を示し、（Ａ）は上面図、（Ｂ）は（Ａ）の樹脂基板の表面側金属パターン図、（Ｃ）は（Ａ）の樹脂基板の裏面側金属パターン図である。The semiconductor device as a comparative example is shown, (A) is a top view, (B) is a front side metal pattern diagram of the resin substrate of (A), (C) is a rear side metal pattern diagram of the resin substrate of (A). is there. 図３の半導体装置の断面図であり、（Ａ）は図３の（Ａ）のＡ−Ａ線断面図、（Ｂ）は図３の（Ｂ）のＢ−Ｂ線断面図である。4A is a cross-sectional view of the semiconductor device of FIG. 3, wherein FIG. 3A is a cross-sectional view taken along line AA of FIG. 3A, and FIG. 3B is a cross-sectional view taken along line BB of FIG. 本発明に係る半導体装置の第２の実施の形態を示し、（Ａ）は上面図、（Ｂ）は（Ａ）の樹脂基板の表面側金属パターン図、（Ｃ）は（Ａ）の樹脂基板の裏面側金属パターン図である。2A is a top view of a semiconductor device according to the present invention, FIG. 2B is a metal pattern diagram of a surface side of the resin substrate of FIG. It is a back side metal pattern figure. 図５の半導体装置の断面図であり、（Ａ）は図５の（Ａ）のＡ−Ａ線断面図、（Ｂ）は図５の（Ａ）のＢ−Ｂ線断面図、（Ｃ）は図５の（Ａ）のＣ−Ｃ線断面図、（Ｄ）は図５の（Ａ）のＤ−Ｄ線断面図である。6A is a cross-sectional view of the semiconductor device of FIG. 5, where FIG. 5A is a cross-sectional view taken along line AA of FIG. 5A, FIG. 5B is a cross-sectional view taken along line BB of FIG. FIG. 5 is a cross-sectional view taken along the line CC of FIG. 5A, and FIG. 6D is a cross-sectional view taken along the line DD of FIG. 図１の半導体装置の完成状態を示す断面図である。FIG. 2 is a cross-sectional view showing a completed state of the semiconductor device of FIG. 1.

図１は本発明に係る半導体装置の第１の実施の形態を示し、（Ａ）は上面図、（Ｂ）は（Ａ）の樹脂基板の表面側金属パターン図、（Ｃ）は（Ａ）の樹脂基板の裏面側金属パターン図であり、図２は図１の半導体装置の断面図であり、（Ａ）は図１の（Ａ）のＡ−Ａ線断面図、（Ｂ）は図１の（Ａ）のＢ−Ｂ線断面図、（Ｃ）は図１の（Ａ）のＣ−Ｃ線断面図、（Ｄ）は図１の（Ａ）のＤ−Ｄ線断面図である。   1A and 1B show a first embodiment of a semiconductor device according to the present invention, in which FIG. 1A is a top view, FIG. 1B is a metal pattern diagram of a surface side of a resin substrate in FIG. 1A, and FIG. FIG. 2 is a cross-sectional view of the semiconductor device of FIG. 1, FIG. 2A is a cross-sectional view of the semiconductor device of FIG. 1, FIG. 2A is a cross-sectional view of FIG. 2A is a sectional view taken along line BB in FIG. 1A, FIG. 1C is a sectional view taken along line CC in FIG. 1A, and FIG. 2D is a sectional view taken along line DD in FIG.

図１、図２に示すように、樹脂基板１の表面側には、矩形状のＬＥＤ素子搭載用金属パターン１１、ＬＥＤ素子搭載金属パターン１１より小さい矩形状のＺＤ素子搭載用金属パターン１２、ＬＥＤ素子搭載用金属パターン１１とＺＤ素子搭載用金属パターン１２とを電気的に接続する接続用金属パターン１３、ワイヤボンディング用金属パターン１４、及び第１のダミー金属パターン１５が形成される。この場合、ワイヤボンディング用金属パターン１４及び第１のダミー金属パターン１５はＬＥＤ素子２のＺＤ素子３側の領域にあって、ＺＤ素子３が配置されていない領域に配置される。つまり、図１の（Ｂ）において、ワイヤボンディング用金属パターン１４及び第１のダミー金属パターン１５はＬＥＤ素子２の右側かつＺＤ素子３の下側に配置される。また、ワイヤボンディング用金属パターン１４は、ＬＥＤ素子搭載用金属パターン１１より小さい。   As shown in FIGS. 1 and 2, on the surface side of the resin substrate 1, a rectangular LED element mounting metal pattern 11, a rectangular ZD element mounting metal pattern 12 smaller than the LED element mounting metal pattern 11, and LEDs A connection metal pattern 13, a wire bonding metal pattern 14, and a first dummy metal pattern 15 that electrically connect the element mounting metal pattern 11 and the ZD element mounting metal pattern 12 are formed. In this case, the wire bonding metal pattern 14 and the first dummy metal pattern 15 are arranged in a region on the ZD element 3 side of the LED element 2 and in a region where the ZD element 3 is not arranged. That is, in FIG. 1B, the wire bonding metal pattern 14 and the first dummy metal pattern 15 are arranged on the right side of the LED element 2 and below the ZD element 3. The wire bonding metal pattern 14 is smaller than the LED element mounting metal pattern 11.

第１のダミー金属パターン１５はワイヤボンディング用金属パターン１４に近接して設けられる。この場合、第１のダミー金属パターン１５はＬＥＤ素子搭載用金属パターン１１に接続される。また、ワイヤボンディング用金属パターン１４が接続用金属パターン１３及び第１のダミー金属パターン１５によって挟まれるように、第１のダミー金属パターン１５を配置する。また、好ましくは、第１のダミー金属パターン１５は接続用金属パターン１３に平行に配置される。尚、ＺＤ素子搭載用金属パターン１２、ワイヤボンディング用金属パターン１４及び第１のダミー金属パターン１５は樹脂基板１のエッジまで延在させてもよい。   The first dummy metal pattern 15 is provided in the vicinity of the wire bonding metal pattern 14. In this case, the first dummy metal pattern 15 is connected to the LED element mounting metal pattern 11. In addition, the first dummy metal pattern 15 is arranged so that the wire bonding metal pattern 14 is sandwiched between the connection metal pattern 13 and the first dummy metal pattern 15. Preferably, the first dummy metal pattern 15 is arranged in parallel to the connection metal pattern 13. The ZD element mounting metal pattern 12, the wire bonding metal pattern 14, and the first dummy metal pattern 15 may extend to the edge of the resin substrate 1.

他方、樹脂基板１の裏面側には、極性が異なる大きい実装端子用金属パターン１６及び小さい実装端子用金属パターン１７が形成される。この場合、実装端子用金属パターン１６はＬＥＤ素子搭載用金属パターン１１に対向し、また、実装端子用金属パターン１７はＺＤ素子搭載用金属パターン１２及びワイヤボンディング用金属パターン１４に対向している。ＬＥＤ素子搭載用金属パターン１１と実装端子用金属パターン１６とは大きい断面積の金属構造体１８によって電気的に接続される。また、ワイヤボンディング用金属パターン１４と実装端子用金属パターン１７とは小さい断面積の金属ビア１９によって電気的に接続されている。金属ビア１９は、ワイヤボンディング用金属パターン１４において、ワイヤ４１、４２、４３の接続領域を避けて配置される。尚、金属構造体１８及び金属ビア１９は同一層によって形成できる。   On the other hand, a large mounting terminal metal pattern 16 and a small mounting terminal metal pattern 17 having different polarities are formed on the back side of the resin substrate 1. In this case, the mounting terminal metal pattern 16 faces the LED element mounting metal pattern 11, and the mounting terminal metal pattern 17 faces the ZD element mounting metal pattern 12 and the wire bonding metal pattern 14. The LED element mounting metal pattern 11 and the mounting terminal metal pattern 16 are electrically connected by a metal structure 18 having a large cross-sectional area. The wire bonding metal pattern 14 and the mounting terminal metal pattern 17 are electrically connected by a metal via 19 having a small cross-sectional area. The metal via 19 is disposed in the wire bonding metal pattern 14 so as to avoid the connection region of the wires 41, 42, and 43. The metal structure 18 and the metal via 19 can be formed of the same layer.

矩形状のＬＥＤ素子２はその一電極を下にしてＬＥＤ素子搭載用金属パターン１１上に搭載され、また、ＬＥＤ素子２より小さい矩形状のＺＤ素子３はＬＥＤ素子２より小さく、その一電極を下にしてＺＤ素子搭載用金属パターン１２上に搭載される。この場合、ＬＥＤ素子２及びＺＤ素子３は、ＬＥＤ素子２の一辺とＺＤ素子３の一辺とが略直線上に位置すると共に樹脂基板１の一辺と平行となるように、樹脂基板１上に配置される。   The rectangular LED element 2 is mounted on the LED element mounting metal pattern 11 with one electrode facing down, and the rectangular ZD element 3 smaller than the LED element 2 is smaller than the LED element 2, and the one electrode is It is mounted on the ZD element mounting metal pattern 12 facing down. In this case, the LED element 2 and the ZD element 3 are arranged on the resin substrate 1 so that one side of the LED element 2 and one side of the ZD element 3 are positioned on a substantially straight line and parallel to one side of the resin substrate 1. Is done.

ＬＥＤ素子２の上面の他電極はワイヤ４１、４２によってワイヤボンディング用金属パターン１４に電気的に接続され、また、ＺＤ素子３の上面の他電極もワイヤ４３によってワイヤボンディング用金属パターン１４に接続される。これにより、ＬＥＤ素子２とＺＤ素子３とは逆並列される。ワイヤ４１、４２、４３は第１ボンディングをワイヤボンディング用金属パターン１４に対して行い、第２ボンディングをＬＥＤ素子２及びＺＤ素子３に対して行う。第１ボンディングは、ボールボンド、第２ボンディングはステッチボンドで行う。ボールボンド工程では、装置のキャピラリの先端から繰り出したワイヤの先端に金ボールを形成し、超音波を伴ってワイヤボンディング用金属パターン１４上に熱圧着し、ボール接続部を形成した。次に、キャピラリを基板１の主面に対し垂直に引き上げた後、ワイヤを延ばしながらＬＥＤ素子２上まで水平に移動し、ＬＥＤ素子２上に超音波を伴って熱圧着後、ワイヤを引き上げて切断し、ステッチ接続部を形成する。従って、ワイヤ４１、４２、４３は、たとえば図２の（Ｂ）に示すごとく、ワイヤボンディング用金属パターン１４に対してほぼ垂直に立上り、ＬＥＤ素子２及びＺＤ素子３に対してほぼ水平となる。このようにして、ワイヤ４１、４２、４３の高さを低くすることにより半導体装置の薄型化を図っている。尚、ワイヤたとえば４２のワイヤボンディング用金属パターン１４との接続部分近傍（付け根部分）は、ボール部４２ａ、及びボール部４２ａ直上の他の領域より結晶粒度が大きいために力学的物性が弱い再結晶化部４２ｂよりなる。つまり、ワイヤボンディング工程が、先端が溶融してボール状になったワイヤをワイヤボンディング用金属パターン１４に固着した第１のボンディング後に、ワイヤを延ばし、もう一方の端部をＬＥＤ素子２又はＺＤ素子３上に押し付ける第２ボンディングを行い超音波を印加して固着することによって行われる。従って、溶融固着させたワイヤのワイヤボンディング用金属パターン１４との接続部分近傍は、溶融させていない部分と異なり、金属の再結晶化が発生し、力学的物性の弱い再結晶化部となる。   The other electrode on the upper surface of the LED element 2 is electrically connected to the wire bonding metal pattern 14 by wires 41 and 42, and the other electrode on the upper surface of the ZD element 3 is also connected to the wire bonding metal pattern 14 by wires 43. The Thereby, the LED element 2 and the ZD element 3 are antiparallel. The wires 41, 42, and 43 perform first bonding on the wire bonding metal pattern 14 and perform second bonding on the LED element 2 and the ZD element 3. The first bonding is performed by ball bonding, and the second bonding is performed by stitch bonding. In the ball bonding step, a gold ball was formed at the tip of the wire drawn out from the tip of the capillary of the apparatus, and thermocompression bonded onto the wire bonding metal pattern 14 with ultrasonic waves to form a ball connection portion. Next, the capillary is pulled up perpendicularly to the main surface of the substrate 1 and then moved horizontally to the LED element 2 while extending the wire. After thermocompression bonding with ultrasonic waves on the LED element 2, the wire is pulled up. Cut and form stitch connections. Accordingly, the wires 41, 42, 43 rise substantially perpendicular to the wire bonding metal pattern 14 and become substantially horizontal to the LED element 2 and the ZD element 3, for example, as shown in FIG. In this way, the height of the wires 41, 42, 43 is reduced to reduce the thickness of the semiconductor device. In the vicinity of the connection portion (base portion) of the wire, for example, the wire bonding metal pattern 14, the crystal grain size is larger than that of the ball portion 42 a and other regions immediately above the ball portion 42 a, so that recrystallization is weak. It consists of the conversion part 42b. That is, in the wire bonding step, after the first bonding in which the wire whose tip is melted and formed into a ball shape is fixed to the metal pattern 14 for wire bonding, the wire is extended, and the other end is the LED element 2 or the ZD element. 3 is performed by applying a second bonding to be pressed onto the surface 3 and applying an ultrasonic wave to fix it. Therefore, in the vicinity of the portion where the fused and fixed wire is connected to the wire bonding metal pattern 14, unlike the portion where the wire is not melted, recrystallization of the metal occurs, resulting in a recrystallized portion having weak mechanical properties.

ＬＥＤ素子２とＺＤ素子３とは極性の異なる実装端子用金属パターン１６、１７間に電気的に逆並列接続される。   The LED element 2 and the ZD element 3 are electrically connected in reverse parallel between the mounting terminal metal patterns 16 and 17 having different polarities.

図１、図２の半導体装置においては、樹脂基板１の表面側金属パターン１１、１２、１３、１４、１５と裏面側金属パターン１６、１７とをできる限り対峙させて樹脂基板１のみで外部応力に対応する領域を少なくし、樹脂基板１が変形して封止部（図示せず、例えば、図７における蛍光体層５または白色樹脂層６）にクラックが発生するのを防止できるようにする。但し、全体のサイズを小さくするために、表面側金属パターン１１、１４の正負の境界部と裏面側金属パターン１６、１７の正負の境界部とは重複している。   In the semiconductor device of FIGS. 1 and 2, external stress is applied only on the resin substrate 1 with the front side metal patterns 11, 12, 13, 14 and 15 of the resin substrate 1 facing the back side metal patterns 16 and 17 as much as possible. The resin substrate 1 is deformed to prevent cracks from occurring in the sealing portion (not shown, for example, the phosphor layer 5 or the white resin layer 6 in FIG. 7). . However, in order to reduce the overall size, the positive / negative boundary part of the front surface side metal patterns 11 and 14 and the positive / negative boundary part of the back surface side metal patterns 16 and 17 overlap.

図２の（Ａ）に示すごとく、Ａ−Ａ線断面におけるＬＥＤ素子２とＺＤ素子３との間の樹脂基板１の部分は、金属構造体１８に連続した接続用金属パターン１３によって補強されて熱応力による膨張収縮が抑制されている。同様に、図２の（Ｄ）に示すごとく、ＬＥＤ素子２のダミー金属パターン１５側の樹脂基板１の部分も、金属構造体１８に連続した第１のダミー金属パターン１５によって補強されて熱応力による膨張収縮が抑制されている。   As shown in FIG. 2A, the portion of the resin substrate 1 between the LED element 2 and the ZD element 3 in the cross section along the line AA is reinforced by the connecting metal pattern 13 continuous to the metal structure 18. Expansion and contraction due to thermal stress is suppressed. Similarly, as shown in FIG. 2D, the portion of the resin substrate 1 on the side of the dummy metal pattern 15 of the LED element 2 is also reinforced by the first dummy metal pattern 15 continuous to the metal structure 18 to cause thermal stress. Expansion and contraction due to is suppressed.

他方、図２の（Ｂ）、（Ｃ）に示すごとく、Ｂ−Ｂ線断面及びＣ−Ｃ線断面におけるＬＥＤ素子２とワイヤボンディング用金属パターン１４との間の樹脂基板１の部分は、金属パターンが存在しないので、熱応力による膨張収縮がＡ−Ａ線断面と比較して大きい。しかし、このＬＥＤ素子２とワイヤボンディング用金属パターン１４との間の樹脂基板１の部分の熱応力による膨張収縮は、ワイヤボンディング用金属パターン１４の両側に存在する熱応力による膨張収縮がしにくいＺＤ素子３側の樹脂基板１の部分及び第１のダミー金属パターン１５側の樹脂基板１の部分によって抑制され、従って、図２の（Ｂ）、（Ｃ）の矢印Ｚ１に示す湾曲は小さくなる。この結果、ワイヤ４１、４２、４３が受ける負荷は小さくなり、ワイヤ４１、４２、４３の断線を防止できると考えられる。   On the other hand, as shown in FIGS. 2B and 2C, the portion of the resin substrate 1 between the LED element 2 and the wire bonding metal pattern 14 in the cross section taken along the line BB and the line CC is made of metal. Since there is no pattern, expansion and contraction due to thermal stress is larger than that of the AA line cross section. However, the expansion and contraction due to the thermal stress of the portion of the resin substrate 1 between the LED element 2 and the wire bonding metal pattern 14 is difficult to expand and contract due to the thermal stress existing on both sides of the wire bonding metal pattern 14. It is suppressed by the portion of the resin substrate 1 on the element 3 side and the portion of the resin substrate 1 on the first dummy metal pattern 15 side, and therefore the curve indicated by the arrow Z1 in FIGS. 2B and 2C is reduced. As a result, the load received by the wires 41, 42, 43 is reduced, and it is considered that the wires 41, 42, 43 can be prevented from being disconnected.

図３は比較例としての半導体装置を示し、（Ａ）は上面図、（Ｂ）は（Ａ）の樹脂基板の表面側金属パターン図、（Ｃ）は（Ａ）の樹脂基板の裏面側金属パターン図であり、図４は図３の半導体装置の断面図であり、（Ａ）は図３の（Ａ）のＡ−Ａ線断面図、（Ｂ）は図３の（Ｂ）のＢ−Ｂ線断面図である。
図３、図４においては、図１、図２の第１のダミー金属パターン１５が設けられていない。 3A and 3B show a semiconductor device as a comparative example, in which FIG. 3A is a top view, FIG. 3B is a metal pattern diagram on the front surface side of the resin substrate in FIG. FIG. 4 is a cross-sectional view of the semiconductor device of FIG. 3, FIG. 4A is a cross-sectional view taken along line AA in FIG. 3A, and FIG. 4B is a cross-sectional view taken along line B- in FIG. It is B line sectional drawing.
3 and 4, the first dummy metal pattern 15 of FIGS. 1 and 2 is not provided.

上述の比較例としての図３、図４の半導体装置の実装端子用金属パターン１６、１７をプリント配線基板（図示せず）に半田付けして使用状態にすると、樹脂基板１の熱応力による膨張収縮によってワイヤ４１、４２、４３が捩れて断線する可能性がある。つまり、図４の（Ａ）に示すごとく、ＬＥＤ素子２とＺＤ素子３との間の樹脂基板１の部分は接続用金属パターン１３によって補強されて熱応力による膨張収縮が抑制されている。他方、図４の（Ｂ）に示すごとく、ＬＥＤ素子２とワイヤボンディング用金属パターン１４との間の樹脂基板１の部分は金属パターンを有していないので、熱応力による膨張収縮が比較的大きい。従って、ＬＥＤ素子２が結合された大きい実装端子用金属パターン１６がプリント配線基板に半田付けによって固定されていると、ワイヤボンディング用金属パターン１４側の樹脂基板１の部分は、熱応力による膨張収縮が小さいＺＤ素子３側の樹脂基板１の部分によって多少抑制されるものの、図４の（Ｂ）の矢印Ｚ０に示すごとく、大きく湾曲する。この結果、ワイヤ４１、４２、４３の負荷が大きくなり、特に、ワイヤボンディング用金属パターン１４上のワイヤ４１、４２、４３の１次ボンディング側の付け根の再結晶化部において細線化や断線する可能性がある。 When the mounting terminal metal patterns 16 and 17 of the semiconductor device of FIGS. 3 and 4 as the comparative example described above are soldered to a printed wiring board (not shown) and put into use, the resin substrate 1 expands due to thermal stress. There is a possibility that the wires 41, 42, and 43 are twisted and disconnected by contraction. That is, as shown in FIG. 4A, the portion of the resin substrate 1 between the LED element 2 and the ZD element 3 is reinforced by the connecting metal pattern 13 to suppress expansion and contraction due to thermal stress. On the other hand, as shown in FIG. 4B, since the portion of the resin substrate 1 between the LED element 2 and the wire bonding metal pattern 14 does not have a metal pattern, expansion and contraction due to thermal stress is relatively large. . Therefore, when the large mounting terminal metal pattern 16 to which the LED element 2 is coupled is fixed to the printed wiring board by soldering, the portion of the resin substrate 1 on the wire bonding metal pattern 14 side expands and contracts due to thermal stress. Is slightly suppressed by the portion of the resin substrate 1 on the side of the small ZD element 3, but is greatly curved as indicated by an arrow Z0 in FIG. As a result, the load on the wires 41, 42, and 43 is increased, and in particular, the wire 41, 42, 43 on the wire bonding metal pattern 14 can be thinned or disconnected at the recrystallization portion at the base on the primary bonding side. There is sex.

本願発明者は、図３、図４の半導体装置をアルミニウム等よりなるプリント配線基板上に半田付けしてマイナス４０℃〜１２５℃の熱衝撃サイクル試験を行った。この結果、図３、図４の半導体装置では、所定サイクルにてワイヤの断線が生じた。つまり、図３、図４の半導体装置では、熱衝撃サイクルによる樹脂基板の湾曲により再結晶化部の細線化が起こったものと考えられる。これに対し、図１、図２の半導体装置においては、熱衝撃サイクルによる樹脂基板１の湾曲が抑制されるため、図３、図４の半導体装置に断線の生じたサイクル数においてはワイヤ断線は生じない。   The inventor of the present application soldered the semiconductor device of FIGS. 3 and 4 onto a printed wiring board made of aluminum or the like, and performed a thermal shock cycle test at minus 40 ° C. to 125 ° C. As a result, in the semiconductor device of FIGS. 3 and 4, the wire breakage occurred in a predetermined cycle. That is, in the semiconductor devices of FIGS. 3 and 4, it is considered that the recrystallization portion has been thinned due to the curvature of the resin substrate due to the thermal shock cycle. On the other hand, in the semiconductor device of FIGS. 1 and 2, since the bending of the resin substrate 1 due to the thermal shock cycle is suppressed, the wire breakage is not generated in the number of cycles in which the breakage of the semiconductor device of FIGS. Does not occur.

図５は本発明に係る半導体装置の第２の実施の形態を示し、（Ａ）は上面図、（Ｂ）は（Ａ）の樹脂基板の表面側金属パターン図、（Ｃ）は（Ａ）の樹脂基板の裏面側金属パターン図であり、図６は図５の半導体装置の断面図であり、（Ａ）は図５の（Ａ）のＡ−Ａ線断面図、（Ｂ）は図５の（Ａ）のＢ−Ｂ線断面図、（Ｃ）は図５の（Ａ）のＣ−Ｃ線断面図、（Ｄ）は図５の（Ａ）のＤ−Ｄ線断面図である。   5A and 5B show a second embodiment of a semiconductor device according to the present invention, in which FIG. 5A is a top view, FIG. 5B is a metal pattern diagram on the surface side of the resin substrate of FIG. FIG. 6 is a sectional view of the semiconductor device of FIG. 5, FIG. 6A is a sectional view of the semiconductor device of FIG. 5, FIG. 5A is a sectional view taken along line AA of FIG. 5A, and FIG. 5A is a cross-sectional view taken along line BB in FIG. 5A, FIG. 5C is a cross-sectional view taken along line CC in FIG. 5A, and FIG. 6D is a cross-sectional view taken along line DD in FIG.

図５、図６においては、図１、図２の半導体装置の樹脂基板１の表面側にさらに第２のダミー金属パターン２０を設ける。この場合、第２のダミー金属パターン２０は、ＺＤ素子搭載用金属パターン１２及び第１のダミー金属パターン１５に接続される。また、ワイヤボンディング用金属パターン１４が、金属構造体１８に搭載されたＬＥＤ素子搭載用金属パターン１１、接続用金属パターン１３、ＺＤ素子搭載用金属パターン１２、第２のダミー金属パターン２０及び第１のダミー金属パターン１５によって囲まれるように、第２のダミー金属パターン２０を配置する。尚、第２のダミー金属パターン２０は樹脂基板１のエッジまで延在させてもよい。従って、樹脂基板１のワイヤボンディング用金属パターン１４の周囲部分は熱応力による膨張収縮がしにくく、この結果、ＬＥＤ素子２とワイヤボンディング用金属パターン１４との間の樹脂基板１の部分の熱応力による膨張収縮は抑制される。従って、図６の（Ｂ）、（Ｃ）の矢印Ｚ２に示すごとく、湾曲はさらに小さくなる。この結果、ワイヤ４１、４２、４３が受ける負荷はさらに小さくなり、ワイヤ４１、４２、４３の断線をさらに防止できる。   5 and 6, a second dummy metal pattern 20 is further provided on the surface side of the resin substrate 1 of the semiconductor device of FIGS. In this case, the second dummy metal pattern 20 is connected to the ZD element mounting metal pattern 12 and the first dummy metal pattern 15. In addition, the metal pattern for wire bonding 14 includes the LED element mounting metal pattern 11, the connection metal pattern 13, the ZD element mounting metal pattern 12, the second dummy metal pattern 20, and the first mounted on the metal structure 18. The second dummy metal pattern 20 is disposed so as to be surrounded by the dummy metal pattern 15. Note that the second dummy metal pattern 20 may extend to the edge of the resin substrate 1. Therefore, the peripheral portion of the wire bonding metal pattern 14 of the resin substrate 1 is not easily expanded and contracted by thermal stress. As a result, the thermal stress of the portion of the resin substrate 1 between the LED element 2 and the wire bonding metal pattern 14 is reduced. Expansion and contraction due to is suppressed. Therefore, as shown by the arrow Z2 in FIGS. 6B and 6C, the curvature is further reduced. As a result, the load received by the wires 41, 42, 43 is further reduced, and disconnection of the wires 41, 42, 43 can be further prevented.

図１、図２、図５、図６の半導体装置は、図２の（Ｃ）に対応する図５に示すごとく、ＬＥＤ素子２たとえば青色ＬＥＤ素子上にたとえば青色光の一部を黄色光に変換するＹＡＧ粒子を含む蛍光体層５を塗布し、さらに、ＬＥＤ素子２及び蛍光体層５の回りにＬＥＤ素子２及び蛍光体層５からの光を反射させる白色樹脂層６を形成することができる。   As shown in FIG. 5 corresponding to FIG. 2C, the semiconductor device of FIG. 1, FIG. 2, FIG. 5 and FIG. Applying a phosphor layer 5 containing YAG particles to be converted, and further forming a white resin layer 6 that reflects light from the LED element 2 and the phosphor layer 5 around the LED element 2 and the phosphor layer 5. it can.

図１、図２、図５、図６において、樹脂基板１はたとえば厚さ0.1mmのＢＴレジン（登録商標）によって構成される。また、金属パターン１１〜２０はＣｕ/Ｎｉ/Ｐｄ/Ａｕ又はＮｉ/Ａｕの積層によって構成される。さらに、金属構造体１８及び金属ビア１９はＣｕめっき層によって構成される。さらにまた、金属構造体１８の断面積は、樹脂基板１の膨張収縮によるワイヤ４１、４２、４３の負荷を抑制するために、ＬＥＤ素子２の底面積の少なくとも１５％以上、好ましくは５０％以上であり、上述の実施の形態では、５０％〜８５％程度である。尚、金属構造体１８は複数の矩形又は円形構造体で構成してもよい。   In FIGS. 1, 2, 5, and 6, the resin substrate 1 is made of, for example, BT resin (registered trademark) having a thickness of 0.1 mm. Further, the metal patterns 11 to 20 are configured by a Cu / Ni / Pd / Au or Ni / Au laminate. Furthermore, the metal structure 18 and the metal via 19 are constituted by a Cu plating layer. Furthermore, the cross-sectional area of the metal structure 18 is at least 15% or more, preferably 50% or more of the bottom area of the LED element 2 in order to suppress the load on the wires 41, 42 and 43 due to the expansion and contraction of the resin substrate 1. In the above-described embodiment, it is about 50% to 85%. The metal structure 18 may be composed of a plurality of rectangular or circular structures.

また、上述の実施の形態は、ＬＥＤ素子２及びＺＤ素子３の組合せの半導体装置を示しているが、本発明は、ＺＤ素子３の代わりに他のＬＥＤ素子を用いた複数のＬＥＤ素子の組合せの半導体装置にも適用できる。さらに、ＬＥＤ素子は他の半導体発光素子たとえばレーザダイオード（ＬＤ）又は他の半導体受光素子たとえばフォトダイオード（ＰＤ）素子でもよい。すなわち、本発明は、複数の半導体素子の組合せを用いた半導体装置に適用できる。   Moreover, although the above-mentioned embodiment has shown the semiconductor device of the combination of the LED element 2 and the ZD element 3, this invention is a combination of the several LED element using another LED element instead of the ZD element 3. The present invention can also be applied to other semiconductor devices. Further, the LED element may be another semiconductor light emitting element such as a laser diode (LD) or another semiconductor light receiving element such as a photodiode (PD) element. That is, the present invention can be applied to a semiconductor device using a combination of a plurality of semiconductor elements.

さらに、本発明は上述の実施の形態の自明の範囲のいかなる変更にも適用し得る。   Furthermore, the present invention can be applied to any change in the obvious range of the above-described embodiment.

１：樹脂基板
１１：ＬＥＤ素子搭載用金属パターン
１２：ＺＤ素子搭載用金属パターン
１３：接続用金属パターン
１４：ワイヤボンディング用金属パターン
１５：第１のダミー金属パターン
１６、１７：実装端子用金属パターン
１８：金属構造体
１９：金属ビア
２０：第２のダミー金属パターン
２：発光ダイオード（ＬＥＤ）素子
３：ツエナダイオード（ＺＤ）素子
４１、４２、４３：ワイヤ
５：蛍光体層
６：白色樹脂層 1: Resin substrate 11: LED element mounting metal pattern 12: ZD element mounting metal pattern 13: Connection metal pattern 14: Wire bonding metal pattern 15: First dummy metal pattern 16, 17: Mounting terminal metal pattern 18: Metal structure 19: Metal via 20: Second dummy metal pattern 2: Light emitting diode (LED) element 3: Zener diode (ZD) elements 41, 42, 43: Wire 5: Phosphor layer 6: White resin layer

本発明は複数の半導体素子を搭載した半導体装置に関する。たとえば、半導体素子としては、発光ダイオード（ＬＥＤ）素子、レーザダイオード（ＬＤ）素子等の半導体発光素子、フォトダイオード（ＰＤ）素子等の半導体受光素子、及び逆電圧保護素子がある。 The present invention relates to a semiconductor device equipped with a plurality of semiconductor elements. For example, as the semiconductor devices, light emitting diode (LED) elements, semiconductor light emitting element such as a laser diode (LD) device, a semiconductor light receiving element such as a photodiode (PD) element, and a reverse voltage protection device.

矩形状のＬＥＤ素子２はその一電極を下にしてＬＥＤ素子搭載用金属パターン１１上に搭載され、また、矩形状のＺＤ素子３はＬＥＤ素子２より小さく、その一電極を下にしてＺＤ素子搭載用金属パターン１２上に搭載される。この場合、ＬＥＤ素子２及びＺＤ素子３は、ＬＥＤ素子２の一辺とＺＤ素子３の一辺とが略直線上に位置すると共に樹脂基板１の一辺と平行となるように、樹脂基板１上に配置される。 The rectangular LED element 2 is mounted on the LED element mounting metal pattern 11 with its one electrode facing down, and the rectangular ZD element 3 is smaller than the LED element 2, and the ZD element with its one electrode facing down. It is mounted on the mounting metal pattern 12. In this case, the LED element 2 and the ZD element 3 are arranged on the resin substrate 1 so that one side of the LED element 2 and one side of the ZD element 3 are positioned on a substantially straight line and parallel to one side of the resin substrate 1. Is done.

図１、図２、図５、図６の半導体装置においては、図２の（Ｃ）に対応する図７に示すごとく、ＬＥＤ素子２たとえば青色ＬＥＤ素子上にたとえば青色光の一部を黄色光に変換するＹＡＧ粒子を含む蛍光体層５を塗布し、さらに、ＬＥＤ素子２及び蛍光体層５の回りにＬＥＤ素子２及び蛍光体層５からの光を反射させる白色樹脂層６を形成することができる。 1, 2, 5, in the semiconductor device in FIG. 6, as shown in FIG. 7 corresponding to FIG. 2 (C), yellow light to the LED element 2, for example on a blue LED element, for example a part of the blue light And applying a phosphor layer 5 containing YAG particles to be converted into a white resin layer 6 that reflects light from the LED element 2 and the phosphor layer 5 around the LED element 2 and the phosphor layer 5. Can do.

図１、図２、図５、図６において、樹脂基板１はたとえば厚さ0.1mmのＢＴレジン（登録商標）によって構成される。また、金属パターン１１〜１７、２０はＣｕ/Ｎｉ/Ｐｄ/Ａｕ又はＮｉ/Ａｕの積層によって構成される。さらに、金属構造体１８及び金属ビア１９はＣｕめっき層によって構成される。さらにまた、金属構造体１８の断面積は、樹脂基板１の膨張収縮によるワイヤ４１、４２、４３の負荷を抑制するために、ＬＥＤ素子２の底面積の少なくとも１５％以上、好ましくは５０％以上であり、上述の実施の形態では、５０％〜８５％程度である。尚、金属構造体１８は複数の矩形又は円形構造体で構成してもよい。 In FIGS. 1, 2, 5, and 6, the resin substrate 1 is made of, for example, BT resin (registered trademark) having a thickness of 0.1 mm. Further, the metal patterns 11 to 17 and 20 are constituted by a stacked layer of Cu / Ni / Pd / Au or Ni / Au. Furthermore, the metal structure 18 and the metal via 19 are constituted by a Cu plating layer. Furthermore, the cross-sectional area of the metal structure 18 is at least 15% or more, preferably 50% or more of the bottom area of the LED element 2 in order to suppress the load on the wires 41, 42 and 43 due to the expansion and contraction of the resin substrate 1. In the above-described embodiment, it is about 50% to 85%. The metal structure 18 may be composed of a plurality of rectangular or circular structures.

Claims (5)

樹脂基板と、
第１、第２の半導体素子と、
前記樹脂基板の表面側に設けられた、前記第１の半導体素子を搭載する第１の素子搭載用金属パターン、前記第２の半導体素子を搭載する第２の素子搭載用金属パターン、第１の素子搭載用金属パターンと前記第２の素子搭載用金属パターンとを接続する接続用金属パターン、前記第１、第２の半導体素子にワイヤによって接続されたワイヤボンディング用金属パターン、及び前記第１の素子搭載用金属パターンに接続され、前記ワイヤボンディング用金属パターンに近接した第１のダミー金属パターンと、
前記樹脂基板の裏面側に設けられた、前記第１の素子搭載用金属パターンに対向した第１の実装端子用金属パターン並びに前記第２の素子搭載用金属パターン及び前記ワイヤボンディング用金属パターンに対向した第２の実装端子用金属パターンと、
前記樹脂基板を貫通し、前記第１の素子搭載用金属パターンと前記第１の実装端子用金属パターンとを電気的に接続する金属構造体と
を具備し、
前記ワイヤボンディング用金属パターンは、前記接続用金属パターンと前記第１のダミー金属パターンとによって挟まれている半導体装置。 A resin substrate;
First and second semiconductor elements;
A first element mounting metal pattern for mounting the first semiconductor element, a second element mounting metal pattern for mounting the second semiconductor element, provided on the surface side of the resin substrate, A metal pattern for connection for connecting an element mounting metal pattern and the second element mounting metal pattern, a wire bonding metal pattern connected to the first and second semiconductor elements by wires, and the first A first dummy metal pattern connected to the element mounting metal pattern and proximate to the wire bonding metal pattern;
Opposed to the first mounting terminal metal pattern, the second element mounting metal pattern, and the wire bonding metal pattern, which are provided on the back side of the resin substrate, facing the first element mounting metal pattern. A second metal pattern for mounting terminals,
A metal structure that penetrates through the resin substrate and electrically connects the first element mounting metal pattern and the first mounting terminal metal pattern;
The wire bonding metal pattern is a semiconductor device sandwiched between the connection metal pattern and the first dummy metal pattern. 前記第１のダミー金属パターンは前記接続用金属パターンに平行である請求項１に記載の半導体装置。   The semiconductor device according to claim 1, wherein the first dummy metal pattern is parallel to the connection metal pattern. さらに、前記樹脂基板の表面側に設けられた、前記第２の素子用金属パターンと前記第１のダミー金属パターンとを接続する第２のダミー金属パターンを具備し、
前記ワイヤボンディング用金属パターンは、前記第１の素子搭載用金属パターン、前記第１のダミー金属パターン、前記第２のダミー金属パターン、前記第２の素子搭載用金属パターン及び前記接続用金属パターンによって囲まれた請求項１または請求項２に記載の半導体装置。 Further, provided with a second dummy metal pattern provided on the surface side of the resin substrate for connecting the second element metal pattern and the first dummy metal pattern,
The metal pattern for wire bonding includes the first element mounting metal pattern, the first dummy metal pattern, the second dummy metal pattern, the second element mounting metal pattern, and the connection metal pattern. The semiconductor device according to claim 1, wherein the semiconductor device is enclosed. 前記第１の半導体素子は半導体発光素子又は半導体受光素子であり、
前記第２の半導体素子は逆電圧保護素子である請求項１ないし請求項３のいずれかに記載の半導体装置。 The first semiconductor element is a semiconductor light emitting element or a semiconductor light receiving element;
The semiconductor device according to claim 1, wherein the second semiconductor element is a reverse voltage protection element. 前記ワイヤボンディング用金属パターンと前記ワイヤとの接続部には、ボール部が形成されている請求項１ないし請求項４のいずれかに記載の半導体装置。
The semiconductor device according to claim 1, wherein a ball portion is formed at a connection portion between the wire bonding metal pattern and the wire.
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