JP2017027351A - 演算処理装置および演算処理装置の制御方法 - Google Patents
演算処理装置および演算処理装置の制御方法 Download PDFInfo
- Publication number
- JP2017027351A JP2017027351A JP2015144938A JP2015144938A JP2017027351A JP 2017027351 A JP2017027351 A JP 2017027351A JP 2015144938 A JP2015144938 A JP 2015144938A JP 2015144938 A JP2015144938 A JP 2015144938A JP 2017027351 A JP2017027351 A JP 2017027351A
- Authority
- JP
- Japan
- Prior art keywords
- unit
- error
- data
- register
- instruction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000012545 processing Methods 0.000 title claims abstract description 129
- 238000000034 method Methods 0.000 title claims description 52
- 238000001514 detection method Methods 0.000 claims abstract description 98
- 238000012937 correction Methods 0.000 claims abstract description 54
- 238000012546 transfer Methods 0.000 claims description 37
- 239000000872 buffer Substances 0.000 description 38
- 230000008569 process Effects 0.000 description 34
- 230000001629 suppression Effects 0.000 description 9
- 230000000052 comparative effect Effects 0.000 description 8
- 230000007423 decrease Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 230000010365 information processing Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000001902 propagating effect Effects 0.000 description 2
- JJWKPURADFRFRB-UHFFFAOYSA-N carbonyl sulfide Chemical compound O=C=S JJWKPURADFRFRB-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000012447 hatching Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 230000000644 propagated effect Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0763—Error or fault detection not based on redundancy by bit configuration check, e.g. of formats or tags
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0793—Remedial or corrective actions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
- G06F9/30043—LOAD or STORE instructions; Clear instruction
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30105—Register structure
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/30123—Organisation of register space, e.g. banked or distributed register file according to context, e.g. thread buffers
- G06F9/30127—Register windows
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/3017—Runtime instruction translation, e.g. macros
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3858—Result writeback, i.e. updating the architectural state or memory
- G06F9/38585—Result writeback, i.e. updating the architectural state or memory with result invalidation, e.g. nullification
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
- G06F9/3863—Recovery, e.g. branch miss-prediction, exception handling using multiple copies of the architectural state, e.g. shadow registers
Abstract
【解決手段】 演算処理装置は、命令の実行に用いるデータを保持する第1レジスタ部と、第1レジスタ部が保持するデータの一部を保持する第2レジスタ部と、第2レジスタ部が保持したデータを用いて演算を実行する演算部と、第1レジスタ部が第2レジスタ部に転送するデータのエラーを検出する第1エラー検出部と、第1エラー検出部がデータのエラーを検出した場合、命令の実行を中断する制御部と、第1エラー検出部がデータのエラーを検出した場合、第1レジスタ部が保持したデータのエラーを訂正するエラー訂正部とを有する。
【選択図】 図1
Description
Claims (8)
- 命令の実行に用いるデータを保持する第1レジスタ部と、
前記第1レジスタ部が保持するデータの一部を保持する第2レジスタ部と、
前記第2レジスタ部が保持したデータを用いて演算を実行する演算部と、
前記第1レジスタ部が前記第2レジスタ部に転送するデータのエラーを検出する第1エラー検出部と、
前記第1エラー検出部がデータのエラーを検出した場合、命令の実行を中断する制御部と、
前記第1エラー検出部がデータのエラーを検出した場合、前記第1レジスタ部が保持したデータのエラーを訂正するエラー訂正部と
を有することを特徴とする演算処理装置。 - 請求項1に記載の演算処理装置において、
前記第2レジスタ部が前記演算部に転送するデータのエラーを検出する第2エラー検出部と、
前記第1エラー検出部がデータのエラーを検出した場合、前記第1エラー検出部で検出されたエラーデータが前記演算部に伝達される前に、前記第2エラー検出部でエラーと判定されないダミーデータに前記エラーデータを置き換える置換部と
をさらに有することを特徴とする演算処理装置。 - 請求項2に記載の演算処理装置において、
前記置換部は、前記第1レジスタ部から出力された前記エラーデータを前記ダミーデータに置き換えて前記第2レジスタ部に転送することを特徴とする演算処理装置。 - 請求項2に記載の演算処理装置において、
前記置換部は、前記第2レジスタ部から出力された前記エラーデータを前記ダミーデータに置き換えて前記演算部に転送することを特徴とする演算処理装置。 - 請求項1ないし請求項4のいずれか1項に記載の演算処理装置において、
前記制御部は、前記エラー訂正部が前記第1レジスタ部に保持されたデータのエラーを訂正した後に、中断した命令を再実行させることを特徴とする演算処理装置。 - 請求項1ないし請求項5のいずれか1項に記載の演算処理装置において、
前記制御部は、前記第1エラー検出部がデータのエラーを検出した場合、前記演算部による演算を停止させることで命令の実行を中断することを特徴とする演算処理装置。 - 請求項1ないし請求項6のいずれか1項に記載の演算処理装置において、
前記制御部は、前記第1エラー検出部がデータのエラーを検出した場合、前記演算部による演算の結果を前記第2レジスタ部に書き込むコミットを停止して命令の実行を中断することを特徴とする演算処理装置。 - 命令の実行に用いるデータを保持する第1レジスタ部と、前記第1レジスタ部が保持するデータの一部を保持する第2レジスタ部と、前記第2レジスタ部が保持したデータを用いて演算を実行する演算部とを有する演算処理装置の制御方法において、
前記演算処理装置が有する第1エラー検出部が、前記第1レジスタ部が前記第2レジスタ部に転送するデータのエラーを検出し、
前記演算処理装置が有する制御部が、前記第1エラー検出部がデータのエラーを検出した場合、命令の実行を中断し、
前記演算処理装置が有するエラー訂正部が、前記第1エラー検出部がデータのエラーを検出した場合、前記第1レジスタ部が保持したデータのエラーを訂正する
ことを特徴とする演算処理装置の制御方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015144938A JP6582666B2 (ja) | 2015-07-22 | 2015-07-22 | 演算処理装置および演算処理装置の制御方法 |
US15/205,507 US10176031B2 (en) | 2015-07-22 | 2016-07-08 | Arithmetic processing device and method of controlling arithmetic processing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015144938A JP6582666B2 (ja) | 2015-07-22 | 2015-07-22 | 演算処理装置および演算処理装置の制御方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2017027351A true JP2017027351A (ja) | 2017-02-02 |
JP6582666B2 JP6582666B2 (ja) | 2019-10-02 |
Family
ID=57836198
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2015144938A Active JP6582666B2 (ja) | 2015-07-22 | 2015-07-22 | 演算処理装置および演算処理装置の制御方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US10176031B2 (ja) |
JP (1) | JP6582666B2 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11379308B2 (en) * | 2018-12-10 | 2022-07-05 | Zoox, Inc. | Data processing pipeline failure recovery |
US11507453B2 (en) * | 2020-10-20 | 2022-11-22 | Micron Technology, Inc. | Low-latency register error correction |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000305782A (ja) * | 1999-04-22 | 2000-11-02 | Matsushita Electric Ind Co Ltd | 演算装置 |
WO2008152728A1 (ja) * | 2007-06-15 | 2008-12-18 | Fujitsu Limited | エラー訂正方法および演算器 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5604753A (en) * | 1994-01-04 | 1997-02-18 | Intel Corporation | Method and apparatus for performing error correction on data from an external memory |
US7370230B1 (en) * | 2004-01-08 | 2008-05-06 | Maxtor Corporation | Methods and structure for error correction in a processor pipeline |
US7673190B1 (en) * | 2005-09-14 | 2010-03-02 | Unisys Corporation | System and method for detecting and recovering from errors in an instruction stream of an electronic data processing system |
-
2015
- 2015-07-22 JP JP2015144938A patent/JP6582666B2/ja active Active
-
2016
- 2016-07-08 US US15/205,507 patent/US10176031B2/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000305782A (ja) * | 1999-04-22 | 2000-11-02 | Matsushita Electric Ind Co Ltd | 演算装置 |
WO2008152728A1 (ja) * | 2007-06-15 | 2008-12-18 | Fujitsu Limited | エラー訂正方法および演算器 |
Also Published As
Publication number | Publication date |
---|---|
US10176031B2 (en) | 2019-01-08 |
US20170024268A1 (en) | 2017-01-26 |
JP6582666B2 (ja) | 2019-10-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5129450B2 (ja) | 情報処理装置 | |
US8732550B2 (en) | Processor and error correcting method | |
JP5147564B2 (ja) | レジスタ状態エラー回復および再開機構 | |
US20060190702A1 (en) | Device and method for correcting errors in a processor having two execution units | |
US8935678B2 (en) | Methods and apparatus to form a resilient objective instruction construct | |
JPH02257219A (ja) | パイプラインプロセッサ装置および方法 | |
JPH07248897A (ja) | コンピュータ・システムにおける例外からの回復方法、及びそのための装置 | |
WO2006039595A2 (en) | Executing checker instructions in redundant multithreading environments | |
US9348681B2 (en) | Apparatus and method for detecting fault of processor | |
US20190121689A1 (en) | Apparatus and method for increasing resilience to faults | |
JP6582666B2 (ja) | 演算処理装置および演算処理装置の制御方法 | |
JP2011048681A (ja) | プロセッサ | |
JPS6218057B2 (ja) | ||
US8516303B2 (en) | Arithmetic device for concurrently processing a plurality of threads | |
US7447941B2 (en) | Error recovery systems and methods for execution data paths | |
US10289332B2 (en) | Apparatus and method for increasing resilience to faults | |
JP5843804B2 (ja) | 演算装置およびエラー処理方法 | |
US20110167296A1 (en) | Register file soft error recovery | |
JP5540697B2 (ja) | 演算処理装置、情報処理装置および演算処理装置の制御方法 | |
JP3240660B2 (ja) | データ処理装置 | |
WO2023022035A1 (ja) | プロセッサ | |
JP2009238168A (ja) | マイクロプロセッサ | |
JP3667703B2 (ja) | エラー訂正制御回路 | |
CN108572881A (zh) | 一种在运算器中校验数据的方法 | |
JPH07219771A (ja) | 命令プロセッサ |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
RD01 | Notification of change of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7426 Effective date: 20170803 |
|
RD03 | Notification of appointment of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7423 Effective date: 20170803 |
|
RD04 | Notification of resignation of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7424 Effective date: 20170804 |
|
RD03 | Notification of appointment of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7423 Effective date: 20180214 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A821 Effective date: 20180219 |
|
RD04 | Notification of resignation of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7424 Effective date: 20180219 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20180413 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20190208 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20190226 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20190423 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20190806 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20190819 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6582666 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |