JP2016541046A5 - - Google Patents

Download PDF

Info

Publication number
JP2016541046A5
JP2016541046A5 JP2016525567A JP2016525567A JP2016541046A5 JP 2016541046 A5 JP2016541046 A5 JP 2016541046A5 JP 2016525567 A JP2016525567 A JP 2016525567A JP 2016525567 A JP2016525567 A JP 2016525567A JP 2016541046 A5 JP2016541046 A5 JP 2016541046A5
Authority
JP
Japan
Prior art keywords
random access
access memory
dynamic random
data
storage drive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2016525567A
Other languages
English (en)
Japanese (ja)
Other versions
JP6431536B2 (ja
JP2016541046A (ja
Filing date
Publication date
Application filed filed Critical
Priority claimed from PCT/US2014/061603 external-priority patent/WO2015061337A1/en
Publication of JP2016541046A publication Critical patent/JP2016541046A/ja
Publication of JP2016541046A5 publication Critical patent/JP2016541046A5/ja
Application granted granted Critical
Publication of JP6431536B2 publication Critical patent/JP6431536B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2016525567A 2013-10-21 2014-10-21 最終レベルキャッシュシステム及び対応する方法 Active JP6431536B2 (ja)

Applications Claiming Priority (11)

Application Number Priority Date Filing Date Title
US201361893675P 2013-10-21 2013-10-21
US201361893662P 2013-10-21 2013-10-21
US201361893683P 2013-10-21 2013-10-21
US61/893,683 2013-10-21
US61/893,675 2013-10-21
US61/893,662 2013-10-21
US201361895049P 2013-10-24 2013-10-24
US61/895,049 2013-10-24
US14/519,826 2014-10-21
PCT/US2014/061603 WO2015061337A1 (en) 2013-10-21 2014-10-21 Final level cache system and corresponding method
US14/519,826 US9477611B2 (en) 2013-10-21 2014-10-21 Final level cache system and corresponding methods

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2018207296A Division JP6796304B2 (ja) 2013-10-21 2018-11-02 最終レベルキャッシュシステム及び対応する方法

Publications (3)

Publication Number Publication Date
JP2016541046A JP2016541046A (ja) 2016-12-28
JP2016541046A5 true JP2016541046A5 (https=) 2017-11-30
JP6431536B2 JP6431536B2 (ja) 2018-11-28

Family

ID=52827224

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2016525567A Active JP6431536B2 (ja) 2013-10-21 2014-10-21 最終レベルキャッシュシステム及び対応する方法
JP2018207296A Active JP6796304B2 (ja) 2013-10-21 2018-11-02 最終レベルキャッシュシステム及び対応する方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2018207296A Active JP6796304B2 (ja) 2013-10-21 2018-11-02 最終レベルキャッシュシステム及び対応する方法

Country Status (6)

Country Link
US (7) US9477611B2 (https=)
EP (1) EP3060993B1 (https=)
JP (2) JP6431536B2 (https=)
KR (3) KR102432754B1 (https=)
CN (2) CN106462504B (https=)
WO (1) WO2015061337A1 (https=)

Families Citing this family (65)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11822474B2 (en) 2013-10-21 2023-11-21 Flc Global, Ltd Storage system and method for accessing same
US10097204B1 (en) 2014-04-21 2018-10-09 Marvell International Ltd. Low-density parity-check codes for WiFi networks
KR102432754B1 (ko) 2013-10-21 2022-08-16 에프엘씨 글로벌 리미티드 최종 레벨 캐시 시스템 및 이에 대응하는 방법
US9559722B1 (en) 2013-10-21 2017-01-31 Marvell International Ltd. Network devices and methods of generating low-density parity-check codes and performing corresponding encoding of data
US9454991B2 (en) 2013-10-21 2016-09-27 Marvell World Trade Ltd. Caching systems and methods for hard disk drives and hybrid drives
CN104765587B (zh) * 2014-01-08 2018-12-14 雅特生嵌入式计算有限公司 用于使处理器同步到相同的计算点的系统和方法
US9888077B2 (en) * 2014-04-22 2018-02-06 Western Digital Technologies, Inc. Metadata based data alignment in data storage systems
TWI540871B (zh) * 2014-04-29 2016-07-01 緯創資通股份有限公司 混合式資料傳輸之方法及其相關混合式系統
EP3138099A1 (en) 2014-05-02 2017-03-08 Marvell World Trade Ltd. Caching systems and methods for hard disk drives and hybrid drives
US10013352B2 (en) * 2014-09-26 2018-07-03 Intel Corporation Partner-aware virtual microsectoring for sectored cache architectures
KR102314138B1 (ko) * 2015-03-05 2021-10-18 삼성전자 주식회사 모바일 장치 및 모바일 장치의 데이터 관리 방법
JP5992592B1 (ja) 2015-09-16 2016-09-14 株式会社東芝 キャッシュメモリシステム
US9910482B2 (en) 2015-09-24 2018-03-06 Qualcomm Incorporated Memory interface with adjustable voltage and termination and methods of use
US11120884B2 (en) 2015-09-30 2021-09-14 Sunrise Memory Corporation Implementing logic function and generating analog signals using NOR memory strings
US12537057B2 (en) 2015-09-30 2026-01-27 Sunrise Memory Corporation Three-dimensional vertical nor flash thin film transistor strings
US9842651B2 (en) 2015-11-25 2017-12-12 Sunrise Memory Corporation Three-dimensional vertical NOR flash thin film transistor strings
US10121553B2 (en) 2015-09-30 2018-11-06 Sunrise Memory Corporation Capacitive-coupled non-volatile thin-film transistor NOR strings in three-dimensional arrays
US9892800B2 (en) 2015-09-30 2018-02-13 Sunrise Memory Corporation Multi-gate NOR flash thin-film transistor strings arranged in stacked horizontal active strips with vertical control gates
US10416887B1 (en) 2016-05-18 2019-09-17 Marvell International Ltd. Hybrid storage device and system
US10056147B1 (en) * 2016-06-02 2018-08-21 Marvell International Ltd. Two-level storage device with faster front end
US10268395B1 (en) * 2016-06-09 2019-04-23 Marvell International Ltd. Systems and methods for communicating addressable requests to a programmable input/output memory over a hardware bridge
US9927975B2 (en) 2016-08-03 2018-03-27 Micron Technology, Inc. Hybrid memory drives, computer system, and related method for operating a multi-mode hybrid drive
KR102513489B1 (ko) * 2016-08-26 2023-03-23 선라이즈 메모리 코포레이션 3차원 어레이에서 용량 결합된 비휘발성 박막 트랜지스터 스트링
KR101777660B1 (ko) * 2016-10-25 2017-09-12 주식회사 티에스피글로벌 플래시 스토리지 디바이스 및 그 동작 제어 방법
EP3532933B1 (en) * 2016-10-31 2022-03-02 Rambus Inc. Hybrid memory module
CN109219804B (zh) * 2016-12-28 2023-12-29 华为技术有限公司 非易失内存访问方法、装置和系统
US10649943B2 (en) * 2017-05-26 2020-05-12 Dell Products, L.P. System and method for I/O aware processor configuration
US10608011B2 (en) 2017-06-20 2020-03-31 Sunrise Memory Corporation 3-dimensional NOR memory array architecture and methods for fabrication thereof
US10608008B2 (en) 2017-06-20 2020-03-31 Sunrise Memory Corporation 3-dimensional nor strings with segmented shared source regions
US10692874B2 (en) 2017-06-20 2020-06-23 Sunrise Memory Corporation 3-dimensional NOR string arrays in segmented stacks
KR102319189B1 (ko) 2017-06-21 2021-10-28 삼성전자주식회사 스토리지 장치, 이를 포함하는 스토리지 시스템 및 스토리지 장치의 동작 방법
US20190155735A1 (en) * 2017-06-29 2019-05-23 NVXL Technology, Inc. Data Software System Assist
US20190057045A1 (en) * 2017-08-16 2019-02-21 Alibaba Group Holding Limited Methods and systems for caching based on service level agreement
US10372371B2 (en) 2017-09-14 2019-08-06 International Business Machines Corporation Dynamic data relocation using cloud based ranks
US10866899B2 (en) * 2017-10-02 2020-12-15 Arm Ltd Method and apparatus for control of a tiered memory system
US10671460B2 (en) 2018-02-05 2020-06-02 Micron Technology, Inc. Memory access communications through message passing interface implemented in memory systems
US10853168B2 (en) * 2018-03-28 2020-12-01 Samsung Electronics Co., Ltd. Apparatus to insert error-correcting coding (ECC) information as data within dynamic random access memory (DRAM)
US10440341B1 (en) * 2018-06-07 2019-10-08 Micron Technology, Inc. Image processor formed in an array of memory cells
JP7407134B2 (ja) 2018-06-18 2023-12-28 エフ・エル・シィ・テクノロジー・グループ・インコーポレイテッド 記憶システムをメインメモリとして使用するための方法および装置
US20250028643A1 (en) * 2018-06-18 2025-01-23 FLC Technology Group, Inc. Memory pooling bandwidth multiplier using final level cache system
US11748418B2 (en) 2018-07-31 2023-09-05 Marvell Asia Pte, Ltd. Storage aggregator controller with metadata computation control
KR102518095B1 (ko) * 2018-09-12 2023-04-04 삼성전자주식회사 스토리지 장치 및 시스템
CN111240581B (zh) * 2018-11-29 2023-08-08 北京地平线机器人技术研发有限公司 存储器访问控制方法、装置和电子设备
JP7425069B2 (ja) 2019-01-30 2024-01-30 サンライズ メモリー コーポレイション 基板接合を用いた高帯域幅・大容量メモリ組み込み型電子デバイス
JP7655853B2 (ja) 2019-02-11 2025-04-02 サンライズ メモリー コーポレイション 垂直型薄膜トランジスタ、及び、垂直型薄膜トランジスタの、３次元メモリアレイのためのビット線コネクタとしての応用メモリ回路方法
US12536126B2 (en) * 2019-11-13 2026-01-27 Micron Technology, Inc. Intelligent image sensor stack
WO2021127218A1 (en) 2019-12-19 2021-06-24 Sunrise Memory Corporation Process for preparing a channel region of a thin-film transistor
US20200136943A1 (en) * 2019-12-27 2020-04-30 Intel Corporation Storage management in a data management platform for cloud-native workloads
US12550382B2 (en) 2020-01-22 2026-02-10 Sunrise Memory Corporation Thin-film storage transistor with ferroelectric storage layer
TWI767512B (zh) 2020-01-22 2022-06-11 美商森恩萊斯記憶體公司 薄膜儲存電晶體中冷電子抹除
CN115362436A (zh) 2020-02-07 2022-11-18 日升存储公司 准易失性系统级存储器
TWI836184B (zh) 2020-02-07 2024-03-21 美商森恩萊斯記憶體公司 具有低延遲的高容量記憶體電路
US11507301B2 (en) 2020-02-24 2022-11-22 Sunrise Memory Corporation Memory module implementing memory centric architecture
WO2021173209A1 (en) 2020-02-24 2021-09-02 Sunrise Memory Corporation High capacity memory module including wafer-section memory circuit
WO2021207050A1 (en) 2020-04-08 2021-10-14 Sunrise Memory Corporation Charge-trapping layer with optimized number of charge-trapping sites for fast program and erase of a memory cell in a 3-dimensional nor memory string array
US11842777B2 (en) 2020-11-17 2023-12-12 Sunrise Memory Corporation Methods for reducing disturb errors by refreshing data alongside programming or erase operations
US11848056B2 (en) 2020-12-08 2023-12-19 Sunrise Memory Corporation Quasi-volatile memory with enhanced sense amplifier operation
CN116547796A (zh) 2021-01-20 2023-08-04 日升存储公司 垂直nor闪存薄膜晶体管串及其制造
KR102780159B1 (ko) * 2021-06-25 2025-03-14 한국전자통신연구원 저전력 시스템 온 칩
WO2023287908A1 (en) 2021-07-16 2023-01-19 Sunrise Memory Corporation 3-dimensional memory string array of thin-film ferroelectric transistors
US12615769B2 (en) 2021-09-03 2026-04-28 Sunrise Memory Corporation Three-dimensional nor memory string arrays of thin-film ferroelectric transistors
US11979176B2 (en) 2021-09-09 2024-05-07 Hughes Network Systems, Llc Configurable modem architecture for satellite communications
US12402319B2 (en) 2021-09-14 2025-08-26 Sunrise Memory Corporation Three-dimensional memory string array of thin-film ferroelectric transistors formed with an oxide semiconductor channel
US12461666B2 (en) * 2021-09-21 2025-11-04 Red Hat, Inc. Reducing power consumption by using a different memory chip for background processing
US20240394201A1 (en) * 2023-05-23 2024-11-28 FLC Technology Group, Inc. Cable bandwidth extender

Family Cites Families (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1325288C (en) * 1989-02-03 1993-12-14 Ricky C. Hetherington Method and apparatus for controlling the conversion of virtual to physical memory addresses in a digital computer system
EP0772829A1 (en) 1995-05-26 1997-05-14 National Semiconductor Corporation A pipelined microprocessor that makes memory requests to a cache memory and an external memory controller during the same clock cycle
US6490658B1 (en) * 1997-06-23 2002-12-03 Sun Microsystems, Inc. Data prefetch technique using prefetch cache, micro-TLB, and history file
US6795894B1 (en) 2000-08-08 2004-09-21 Hewlett-Packard Development Company, L.P. Fast disk cache writing system
US6658538B2 (en) * 2001-06-21 2003-12-02 International Business Machines Corporation Non-uniform memory access (NUMA) data processing system having a page table including node-specific data storage and coherency control
US6978355B2 (en) 2001-11-13 2005-12-20 Seagate Technology Llc Cache memory transfer during a requested data retrieval operation
US20040117587A1 (en) * 2002-12-12 2004-06-17 International Business Machines Corp. Hardware managed virtual-to-physical address translation mechanism
US7809252B2 (en) 2003-04-09 2010-10-05 Corel Inc. Systems and methods for caching multimedia data
US7111153B2 (en) 2003-09-30 2006-09-19 Intel Corporation Early data return indication mechanism
US7395495B2 (en) 2004-01-12 2008-07-01 Intel Corporation Method and apparatus for decoding forward error correction codes
US7165205B2 (en) 2004-05-14 2007-01-16 Motorola, Inc. Method and apparatus for encoding and decoding data
JP4673584B2 (ja) * 2004-07-29 2011-04-20 富士通株式会社 キャッシュメモリ装置、演算処理装置及びキャッシュメモリ装置の制御方法
WO2006039801A1 (en) 2004-10-12 2006-04-20 Nortel Networks Limited System and method for low density parity check encoding of data
US7752521B2 (en) 2004-10-12 2010-07-06 Nortel Networks Limited Low density parity check (LDPC) code
US7783961B2 (en) 2005-07-01 2010-08-24 Nec Laboratories America, Inc. Rate-compatible low density parity check coding for hybrid ARQ
JP4160589B2 (ja) * 2005-10-31 2008-10-01 富士通株式会社 演算処理装置，情報処理装置，及び演算処理装置のメモリアクセス方法
US8132072B2 (en) 2006-01-06 2012-03-06 Qualcomm Incorporated System and method for providing H-ARQ rate compatible codes for high throughput applications
US7774556B2 (en) 2006-11-04 2010-08-10 Virident Systems Inc. Asymmetric memory migration in hybrid main memory
US8015361B2 (en) * 2007-12-14 2011-09-06 International Business Machines Corporation Memory-centric page table walker
KR101449524B1 (ko) * 2008-03-12 2014-10-14 삼성전자주식회사 스토리지 장치 및 컴퓨팅 시스템
US7800856B1 (en) 2009-03-24 2010-09-21 Western Digital Technologies, Inc. Disk drive flushing write cache to a nearest set of reserved tracks during a power failure
US8615637B2 (en) * 2009-09-10 2013-12-24 Advanced Micro Devices, Inc. Systems and methods for processing memory requests in a multi-processor system using a probe engine
US8255742B2 (en) * 2009-11-18 2012-08-28 Microsoft Corporation Dynamically replicated memory
US8688897B2 (en) 2010-05-28 2014-04-01 International Business Machines Corporation Cache memory management in a flash cache architecture
WO2012015766A2 (en) * 2010-07-28 2012-02-02 Rambus Inc. Cache memory that supports tagless addressing
US8599510B1 (en) 2011-05-04 2013-12-03 Western Digital Technologies, Inc. Disk drive adjusting data track density based on write condition when writing to contiguous data tracks
US20130086328A1 (en) * 2011-06-13 2013-04-04 Paneve, Llc General Purpose Digital Data Processor, Systems and Methods
US9229879B2 (en) 2011-07-11 2016-01-05 Intel Corporation Power reduction using unmodified information in evicted cache lines
GB2513748B (en) * 2011-12-22 2020-08-19 Intel Corp Power conservation by way of memory channel shutdown
CN103999057B (zh) * 2011-12-30 2016-10-26 英特尔公司 具有开关的相变存储器(pcms)的元数据管理和支持
US9081706B2 (en) * 2012-05-10 2015-07-14 Oracle International Corporation Using a shared last-level TLB to reduce address-translation latency
US8593748B1 (en) 2012-06-04 2013-11-26 HGST Netherlands B.V. Shingled magnetic recording disk drive with compensation for the effect of far track erasure (FTE) on adjacent data bands
US8797672B2 (en) 2012-06-14 2014-08-05 HGST Netherlands B.V. Dynamic track pitch control for shingled magnetic recording (SMR)
US20140181402A1 (en) * 2012-12-21 2014-06-26 Advanced Micro Devices, Inc. Selective cache memory write-back and replacement policies
US9286223B2 (en) * 2013-04-17 2016-03-15 Advanced Micro Devices, Inc. Merging demand load requests with prefetch load requests
US20150013025A1 (en) * 2013-05-19 2015-01-08 Mice With Horns, Llc Transgenic animals with customizable traits
US9785564B2 (en) * 2013-08-20 2017-10-10 Seagate Technology Llc Hybrid memory with associative cache
KR102432754B1 (ko) 2013-10-21 2022-08-16 에프엘씨 글로벌 리미티드 최종 레벨 캐시 시스템 및 이에 대응하는 방법
US9559722B1 (en) 2013-10-21 2017-01-31 Marvell International Ltd. Network devices and methods of generating low-density parity-check codes and performing corresponding encoding of data
US9454991B2 (en) 2013-10-21 2016-09-27 Marvell World Trade Ltd. Caching systems and methods for hard disk drives and hybrid drives
EP3138099A1 (en) 2014-05-02 2017-03-08 Marvell World Trade Ltd. Caching systems and methods for hard disk drives and hybrid drives
US9129628B1 (en) 2014-10-23 2015-09-08 Western Digital Technologies, Inc. Data management for data storage device with different track density regions
US9703493B2 (en) 2015-12-14 2017-07-11 Qualcomm Incorporated Single-stage arbiter/scheduler for a memory system comprising a volatile memory and a shared cache

Similar Documents

Publication Publication Date Title
JP2016541046A5 (https=)
EP3748510B1 (en) Network interface for data transport in heterogeneous computing environments
US11422944B2 (en) Address translation technologies
US9665486B2 (en) Hierarchical cache structure and handling thereof
JP7160682B2 (ja) メモリにおける処理のためのキャッシュコヒーレンス
JP6431536B2 (ja) 最終レベルキャッシュシステム及び対応する方法
CN104346294B (zh) 基于多级缓存的数据读/写方法、装置和计算机系统
US9235513B2 (en) Cache management based on physical memory device characteristics
RU2491616C2 (ru) Устройство, способ и система управления матрицами
US20130254490A1 (en) Delayed replacement of tlb entries
US8966195B2 (en) Direct memory access and super page swapping optimizations for a memory blade
RU2017138467A (ru) Программируемые устройства для обработки запросов передачи данных памяти
WO2012040731A2 (en) Allocation and write policy for a glueless area-efficient directory cache for hotly contested cache lines
CN103907099B (zh) 高速缓存一致性计算机系统中未缓存的短地址转换表
US20190188155A1 (en) Home agent based cache transfer acceleration scheme
US10324760B2 (en) Leases for blocks of memory in a multi-level memory
CN107430554A (zh) 通过使用数据的可压缩性作为高速缓存插入的标准来提高存储高速缓存性能
US10467138B2 (en) Caching policies for processing units on multiple sockets
EP3224729A1 (en) Memory management device
US8924652B2 (en) Simultaneous eviction and cleaning operations in a cache
JP2016522915A (ja) 共有メモリシステム
US8495091B2 (en) Dynamically routing data responses directly to requesting processor core
US8848576B2 (en) Dynamic node configuration in directory-based symmetric multiprocessing systems
CN102135941B (zh) 从缓存写数据到内存的方法和装置
US20070204129A1 (en) Address converting apparatus