JP2016513836A5 - - Google Patents

Download PDF

Info

Publication number
JP2016513836A5
JP2016513836A5 JP2015561522A JP2015561522A JP2016513836A5 JP 2016513836 A5 JP2016513836 A5 JP 2016513836A5 JP 2015561522 A JP2015561522 A JP 2015561522A JP 2015561522 A JP2015561522 A JP 2015561522A JP 2016513836 A5 JP2016513836 A5 JP 2016513836A5
Authority
JP
Japan
Prior art keywords
logic means
determination
decision
contents
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2015561522A
Other languages
English (en)
Japanese (ja)
Other versions
JP2016513836A (ja
JP6301378B2 (ja
Filing date
Publication date
Priority claimed from US13/785,979 external-priority patent/US9330026B2/en
Application filed filed Critical
Publication of JP2016513836A publication Critical patent/JP2016513836A/ja
Publication of JP2016513836A5 publication Critical patent/JP2016513836A5/ja
Application granted granted Critical
Publication of JP6301378B2 publication Critical patent/JP6301378B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2015561522A 2013-03-05 2014-03-04 ハードウェアテーブルウォーク（ｈｗｔｗ）を実行する際にいくつかの条件下でレジスタの内容に対する許可のないアクセスを防止するための方法および装置 Expired - Fee Related JP6301378B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/785,979 2013-03-05
US13/785,979 US9330026B2 (en) 2013-03-05 2013-03-05 Method and apparatus for preventing unauthorized access to contents of a register under certain conditions when performing a hardware table walk (HWTW)
PCT/US2014/020185 WO2014138005A1 (en) 2013-03-05 2014-03-04 Method and apparatus for preventing unauthorized access to contents of a register under certain conditions when performing a hardware table walk (hwtw)

Publications (3)

Publication Number Publication Date
JP2016513836A JP2016513836A (ja) 2016-05-16
JP2016513836A5 true JP2016513836A5 (enExample) 2017-03-16
JP6301378B2 JP6301378B2 (ja) 2018-03-28

Family

ID=50977041

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015561522A Expired - Fee Related JP6301378B2 (ja) 2013-03-05 2014-03-04 ハードウェアテーブルウォーク（ｈｗｔｗ）を実行する際にいくつかの条件下でレジスタの内容に対する許可のないアクセスを防止するための方法および装置

Country Status (7)

Country Link
US (2) US9330026B2 (enExample)
EP (1) EP2965211A1 (enExample)
JP (1) JP6301378B2 (enExample)
KR (1) KR20150129764A (enExample)
CN (1) CN105027097B (enExample)
TW (1) TW201447584A (enExample)
WO (1) WO2014138005A1 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9015400B2 (en) 2013-03-05 2015-04-21 Qualcomm Incorporated Methods and systems for reducing the amount of time and computing resources that are required to perform a hardware table walk (HWTW)
GB2528115B (en) * 2014-07-11 2021-05-19 Advanced Risc Mach Ltd Dynamic saving of registers in transactions
US9672159B2 (en) * 2015-07-02 2017-06-06 Arm Limited Translation buffer unit management
WO2017028309A1 (zh) 2015-08-20 2017-02-23 华为技术有限公司 文件数据访问方法和计算机系统
US12248560B2 (en) * 2016-03-07 2025-03-11 Crowdstrike, Inc. Hypervisor-based redirection of system calls and interrupt-based task offloading
US12339979B2 (en) 2016-03-07 2025-06-24 Crowdstrike, Inc. Hypervisor-based interception of memory and register accesses
US10386904B2 (en) * 2016-03-31 2019-08-20 Qualcomm Incorporated Hardware managed power collapse and clock wake-up for memory management units and distributed virtual memory networks
US10339324B2 (en) * 2016-12-22 2019-07-02 Apple Inc. Tamper-proof storage using signatures based on threshold voltage distributions
CN110795363B (zh) * 2019-08-26 2023-05-23 北京大学深圳研究生院 一种存储介质的热页预测方法和页面调度方法

Family Cites Families (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2933628B2 (ja) * 1988-07-25 1999-08-16 株式会社日立製作所 主記憶装置管理方法および計算機システム
GB2260004B (en) 1991-09-30 1995-02-08 Apple Computer Memory management unit for a computer system
JP3454854B2 (ja) * 1992-01-16 2003-10-06 株式会社東芝 メモリ管理装置及び方法
ID24931A (id) * 1997-11-05 2000-08-31 Novartis Ag Dipeptida nitril
US6745306B1 (en) * 1999-07-29 2004-06-01 Microsoft Corporation Method and system for restricting the load of physical address translations of virtual addresses
US7124170B1 (en) 1999-08-20 2006-10-17 Intertrust Technologies Corp. Secure processing unit systems and methods
US6633963B1 (en) * 2000-03-31 2003-10-14 Intel Corporation Controlling access to multiple memory zones in an isolated execution environment
US20030079103A1 (en) 2001-10-24 2003-04-24 Morrow Michael W. Apparatus and method to perform address translation
US8051301B2 (en) * 2001-11-13 2011-11-01 Advanced Micro Devices, Inc. Memory management system and method providing linear address based memory access security
US7089377B1 (en) * 2002-09-06 2006-08-08 Vmware, Inc. Virtualization system for computers with a region-based memory architecture
JP4220476B2 (ja) * 2002-11-18 2009-02-04 エイアールエム リミテッド 安全ドメインおよび非安全ドメインを有するシステム内での仮想−物理メモリアドレスマッピング
US7089397B1 (en) 2003-07-03 2006-08-08 Transmeta Corporation Method and system for caching attribute data for matching attributes with physical addresses
US7117290B2 (en) 2003-09-03 2006-10-03 Advanced Micro Devices, Inc. MicroTLB and micro tag for reducing power in a processor
US7162609B2 (en) 2003-12-03 2007-01-09 Marvell International Ltd. Translation lookaside buffer prediction mechanism
EP1870814B1 (en) 2006-06-19 2014-08-13 Texas Instruments France Method and apparatus for secure demand paging for processor devices
US7340582B2 (en) 2004-09-30 2008-03-04 Intel Corporation Fault processing for direct memory access address translation
KR100630702B1 (ko) 2004-10-05 2006-10-02 삼성전자주식회사 명령어 캐쉬와 명령어 변환 참조 버퍼의 제어기, 및 그제어방법
US7886126B2 (en) * 2005-01-14 2011-02-08 Intel Corporation Extended paging tables to map guest physical memory addresses from virtual memory page tables to host physical memory addresses in a virtual machine system
US7428626B2 (en) 2005-03-08 2008-09-23 Microsoft Corporation Method and system for a second level address translation in a virtual machine environment
US7366869B2 (en) 2005-03-17 2008-04-29 Qualcomm Incorporated Method and system for optimizing translation lookaside buffer entries
US20060224815A1 (en) 2005-03-30 2006-10-05 Koichi Yamada Virtualizing memory management unit resources
US7386669B2 (en) 2005-03-31 2008-06-10 International Business Machines Corporation System and method of improving task switching and page translation performance utilizing a multilevel translation lookaside buffer
US20070226795A1 (en) 2006-02-09 2007-09-27 Texas Instruments Incorporated Virtual cores and hardware-supported hypervisor integrated circuits, systems, methods and processes of manufacture
US7822941B2 (en) * 2006-06-05 2010-10-26 Oracle America, Inc. Function-based virtual-to-physical address translation
US8615643B2 (en) 2006-12-05 2013-12-24 Microsoft Corporation Operational efficiency of virtual TLBs
EP2075696A3 (en) 2007-05-10 2010-01-27 Texas Instruments Incorporated Interrupt- related circuits, systems and processes
US8275971B2 (en) * 2008-08-27 2012-09-25 International Business Machines Corporation Method and apparatus for managing software controlled cache of translating the physical memory access of a virtual machine between different levels of translation entities
US8595465B1 (en) 2009-09-09 2013-11-26 Marvell Israel (M.I.S.L) Ltd. Virtual address to physical address translation using prediction logic
WO2011156021A2 (en) 2010-03-01 2011-12-15 The Trustees Of Columbia University In The City Of New York Systems and methods for detecting design-level attacks against a digital circuit
US8359453B2 (en) * 2010-09-13 2013-01-22 International Business Machines Corporation Real address accessing in a coprocessor executing on behalf of an unprivileged process
US9405700B2 (en) 2010-11-04 2016-08-02 Sonics, Inc. Methods and apparatus for virtualization in an integrated circuit
US9092358B2 (en) 2011-03-03 2015-07-28 Qualcomm Incorporated Memory management unit with pre-filling capability
US9009445B2 (en) 2011-10-20 2015-04-14 Apple Inc. Memory management unit speculative hardware table walk scheme
US9183399B2 (en) * 2013-02-14 2015-11-10 International Business Machines Corporation Instruction set architecture with secure clear instructions for protecting processing unit architected state information
US9015400B2 (en) 2013-03-05 2015-04-21 Qualcomm Incorporated Methods and systems for reducing the amount of time and computing resources that are required to perform a hardware table walk (HWTW)

Similar Documents

Publication Publication Date Title
JP2016513836A5 (enExample)
TWI794405B (zh) 用於政策執行處理的系統及方法
US9569613B2 (en) Techniques for enforcing control flow integrity using binary translation
JP2016535373A5 (enExample)
JP6804665B2 (ja) ハイパーバイザと仮想マシンとの間のメモリページ遷移の監視
CN107949832B (zh) 用于仅执行事务存储器的技术
US20160283411A1 (en) Methods and Apparatus to Utilize A Trusted Loader In A Trusted Computing Environment
RU2016109436A (ru) Селективное обеспечение соблюдения целостности кода, обеспечиваемое менеджером виртуальной машины
JP2013235612A5 (enExample)
US20080077767A1 (en) Method and apparatus for secure page swapping in virtual memory systems
US9940484B2 (en) Techniques for detecting false positive return-oriented programming attacks
US9639671B2 (en) Secure execution of encrypted program instructions
TWI896760B (zh) 用以增強共享記憶體資源之安全性的設備及方法、以及非暫時性電腦可讀媒體
EP4564160A3 (en) Hardware apparatuses and methods for memory corruption detection
JP2018538630A5 (enExample)
JP2017526071A5 (enExample)
JP2016515265A5 (enExample)
US10360374B2 (en) Techniques for control flow protection
CN114201265A (zh) 支持物理地址大于虚拟地址的虚拟内存管理方法及装置
JP2018524722A (ja) 制御された暗号化鍵管理によってソフトウェアモジュールを隔離する方法のためのメモリキャッシュおよびキャッシュされたソフトウェアモジュール識別情報のセキュア処理
JP2015523668A5 (enExample)
US11030030B2 (en) Enhanced address space layout randomization
CN104903906A (zh) 二进制转换器驱动的程序状态重新定位
US20220014356A1 (en) Seamless access to trusted domain protected memory by virtual machine manager using transformer key identifier
JP2016513835A5 (enExample)