TW201447584A - 用於在執行硬體表搜尋〈hwtw〉時在某些條件下防止對暫存器的內容的未經授權式存取的方法和裝置 - Google Patents
用於在執行硬體表搜尋〈hwtw〉時在某些條件下防止對暫存器的內容的未經授權式存取的方法和裝置 Download PDFInfo
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- TW201447584A TW201447584A TW103107462A TW103107462A TW201447584A TW 201447584 A TW201447584 A TW 201447584A TW 103107462 A TW103107462 A TW 103107462A TW 103107462 A TW103107462 A TW 103107462A TW 201447584 A TW201447584 A TW 201447584A
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
- G06F12/145—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
- G06F12/1491—Protection against unauthorised use of memory or access to memory by checking the subject access rights in a hierarchical protection system, e.g. privilege levels, memory rings
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
- G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/15—Use in a specific computing environment
- G06F2212/151—Emulated environment, e.g. virtual machine
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/15—Use in a specific computing environment
- G06F2212/152—Virtualized environment, e.g. logically partitioned system
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/65—Details of virtual memory and virtual address translation
- G06F2212/654—Look-ahead translation
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/68—Details of translation look-aside buffer [TLB]
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Software Systems (AREA)
- Computer Hardware Design (AREA)
- Storage Device Security (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/785,979 US9330026B2 (en) | 2013-03-05 | 2013-03-05 | Method and apparatus for preventing unauthorized access to contents of a register under certain conditions when performing a hardware table walk (HWTW) |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW201447584A true TW201447584A (zh) | 2014-12-16 |
Family
ID=50977041
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW103107462A TW201447584A (zh) | 2013-03-05 | 2014-03-05 | 用於在執行硬體表搜尋〈hwtw〉時在某些條件下防止對暫存器的內容的未經授權式存取的方法和裝置 |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US9330026B2 (enExample) |
| EP (1) | EP2965211A1 (enExample) |
| JP (1) | JP6301378B2 (enExample) |
| KR (1) | KR20150129764A (enExample) |
| CN (1) | CN105027097B (enExample) |
| TW (1) | TW201447584A (enExample) |
| WO (1) | WO2014138005A1 (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9015400B2 (en) | 2013-03-05 | 2015-04-21 | Qualcomm Incorporated | Methods and systems for reducing the amount of time and computing resources that are required to perform a hardware table walk (HWTW) |
| GB2528115B (en) * | 2014-07-11 | 2021-05-19 | Advanced Risc Mach Ltd | Dynamic saving of registers in transactions |
| US9672159B2 (en) * | 2015-07-02 | 2017-06-06 | Arm Limited | Translation buffer unit management |
| WO2017028309A1 (zh) | 2015-08-20 | 2017-02-23 | 华为技术有限公司 | 文件数据访问方法和计算机系统 |
| US12248560B2 (en) * | 2016-03-07 | 2025-03-11 | Crowdstrike, Inc. | Hypervisor-based redirection of system calls and interrupt-based task offloading |
| US12339979B2 (en) | 2016-03-07 | 2025-06-24 | Crowdstrike, Inc. | Hypervisor-based interception of memory and register accesses |
| US10386904B2 (en) * | 2016-03-31 | 2019-08-20 | Qualcomm Incorporated | Hardware managed power collapse and clock wake-up for memory management units and distributed virtual memory networks |
| US10339324B2 (en) * | 2016-12-22 | 2019-07-02 | Apple Inc. | Tamper-proof storage using signatures based on threshold voltage distributions |
| CN110795363B (zh) * | 2019-08-26 | 2023-05-23 | 北京大学深圳研究生院 | 一种存储介质的热页预测方法和页面调度方法 |
Family Cites Families (35)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2933628B2 (ja) * | 1988-07-25 | 1999-08-16 | 株式会社日立製作所 | 主記憶装置管理方法および計算機システム |
| GB2260004B (en) | 1991-09-30 | 1995-02-08 | Apple Computer | Memory management unit for a computer system |
| JP3454854B2 (ja) * | 1992-01-16 | 2003-10-06 | 株式会社東芝 | メモリ管理装置及び方法 |
| ID24931A (id) * | 1997-11-05 | 2000-08-31 | Novartis Ag | Dipeptida nitril |
| US6745306B1 (en) * | 1999-07-29 | 2004-06-01 | Microsoft Corporation | Method and system for restricting the load of physical address translations of virtual addresses |
| US7124170B1 (en) | 1999-08-20 | 2006-10-17 | Intertrust Technologies Corp. | Secure processing unit systems and methods |
| US6633963B1 (en) * | 2000-03-31 | 2003-10-14 | Intel Corporation | Controlling access to multiple memory zones in an isolated execution environment |
| US20030079103A1 (en) | 2001-10-24 | 2003-04-24 | Morrow Michael W. | Apparatus and method to perform address translation |
| US8051301B2 (en) * | 2001-11-13 | 2011-11-01 | Advanced Micro Devices, Inc. | Memory management system and method providing linear address based memory access security |
| US7089377B1 (en) * | 2002-09-06 | 2006-08-08 | Vmware, Inc. | Virtualization system for computers with a region-based memory architecture |
| JP4220476B2 (ja) * | 2002-11-18 | 2009-02-04 | エイアールエム リミテッド | 安全ドメインおよび非安全ドメインを有するシステム内での仮想−物理メモリアドレスマッピング |
| US7089397B1 (en) | 2003-07-03 | 2006-08-08 | Transmeta Corporation | Method and system for caching attribute data for matching attributes with physical addresses |
| US7117290B2 (en) | 2003-09-03 | 2006-10-03 | Advanced Micro Devices, Inc. | MicroTLB and micro tag for reducing power in a processor |
| US7162609B2 (en) | 2003-12-03 | 2007-01-09 | Marvell International Ltd. | Translation lookaside buffer prediction mechanism |
| EP1870814B1 (en) | 2006-06-19 | 2014-08-13 | Texas Instruments France | Method and apparatus for secure demand paging for processor devices |
| US7340582B2 (en) | 2004-09-30 | 2008-03-04 | Intel Corporation | Fault processing for direct memory access address translation |
| KR100630702B1 (ko) | 2004-10-05 | 2006-10-02 | 삼성전자주식회사 | 명령어 캐쉬와 명령어 변환 참조 버퍼의 제어기, 및 그제어방법 |
| US7886126B2 (en) * | 2005-01-14 | 2011-02-08 | Intel Corporation | Extended paging tables to map guest physical memory addresses from virtual memory page tables to host physical memory addresses in a virtual machine system |
| US7428626B2 (en) | 2005-03-08 | 2008-09-23 | Microsoft Corporation | Method and system for a second level address translation in a virtual machine environment |
| US7366869B2 (en) | 2005-03-17 | 2008-04-29 | Qualcomm Incorporated | Method and system for optimizing translation lookaside buffer entries |
| US20060224815A1 (en) | 2005-03-30 | 2006-10-05 | Koichi Yamada | Virtualizing memory management unit resources |
| US7386669B2 (en) | 2005-03-31 | 2008-06-10 | International Business Machines Corporation | System and method of improving task switching and page translation performance utilizing a multilevel translation lookaside buffer |
| US20070226795A1 (en) | 2006-02-09 | 2007-09-27 | Texas Instruments Incorporated | Virtual cores and hardware-supported hypervisor integrated circuits, systems, methods and processes of manufacture |
| US7822941B2 (en) * | 2006-06-05 | 2010-10-26 | Oracle America, Inc. | Function-based virtual-to-physical address translation |
| US8615643B2 (en) | 2006-12-05 | 2013-12-24 | Microsoft Corporation | Operational efficiency of virtual TLBs |
| EP2075696A3 (en) | 2007-05-10 | 2010-01-27 | Texas Instruments Incorporated | Interrupt- related circuits, systems and processes |
| US8275971B2 (en) * | 2008-08-27 | 2012-09-25 | International Business Machines Corporation | Method and apparatus for managing software controlled cache of translating the physical memory access of a virtual machine between different levels of translation entities |
| US8595465B1 (en) | 2009-09-09 | 2013-11-26 | Marvell Israel (M.I.S.L) Ltd. | Virtual address to physical address translation using prediction logic |
| WO2011156021A2 (en) | 2010-03-01 | 2011-12-15 | The Trustees Of Columbia University In The City Of New York | Systems and methods for detecting design-level attacks against a digital circuit |
| US8359453B2 (en) * | 2010-09-13 | 2013-01-22 | International Business Machines Corporation | Real address accessing in a coprocessor executing on behalf of an unprivileged process |
| US9405700B2 (en) | 2010-11-04 | 2016-08-02 | Sonics, Inc. | Methods and apparatus for virtualization in an integrated circuit |
| US9092358B2 (en) | 2011-03-03 | 2015-07-28 | Qualcomm Incorporated | Memory management unit with pre-filling capability |
| US9009445B2 (en) | 2011-10-20 | 2015-04-14 | Apple Inc. | Memory management unit speculative hardware table walk scheme |
| US9183399B2 (en) * | 2013-02-14 | 2015-11-10 | International Business Machines Corporation | Instruction set architecture with secure clear instructions for protecting processing unit architected state information |
| US9015400B2 (en) | 2013-03-05 | 2015-04-21 | Qualcomm Incorporated | Methods and systems for reducing the amount of time and computing resources that are required to perform a hardware table walk (HWTW) |
-
2013
- 2013-03-05 US US13/785,979 patent/US9330026B2/en active Active
-
2014
- 2014-03-04 JP JP2015561522A patent/JP6301378B2/ja not_active Expired - Fee Related
- 2014-03-04 CN CN201480011829.XA patent/CN105027097B/zh not_active Expired - Fee Related
- 2014-03-04 KR KR1020157027418A patent/KR20150129764A/ko not_active Withdrawn
- 2014-03-04 WO PCT/US2014/020185 patent/WO2014138005A1/en not_active Ceased
- 2014-03-04 EP EP14731407.4A patent/EP2965211A1/en not_active Withdrawn
- 2014-03-05 TW TW103107462A patent/TW201447584A/zh unknown
-
2016
- 2016-03-31 US US15/086,128 patent/US20170083456A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| US20170083456A1 (en) | 2017-03-23 |
| JP2016513836A (ja) | 2016-05-16 |
| KR20150129764A (ko) | 2015-11-20 |
| CN105027097B (zh) | 2018-01-16 |
| EP2965211A1 (en) | 2016-01-13 |
| CN105027097A (zh) | 2015-11-04 |
| US20140258663A1 (en) | 2014-09-11 |
| JP6301378B2 (ja) | 2018-03-28 |
| WO2014138005A1 (en) | 2014-09-12 |
| US9330026B2 (en) | 2016-05-03 |
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