KR20150129764A - 하드웨어 테이블 워크 (hwtw) 를 수행할 경우에 특정 조건들 하에서 레지스터의 콘텐츠로의 미허가 액세스를 방지하는 방법 및 장치 - Google Patents

하드웨어 테이블 워크 (hwtw) 를 수행할 경우에 특정 조건들 하에서 레지스터의 콘텐츠로의 미허가 액세스를 방지하는 방법 및 장치 Download PDF

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KR20150129764A
KR20150129764A KR1020157027418A KR20157027418A KR20150129764A KR 20150129764 A KR20150129764 A KR 20150129764A KR 1020157027418 A KR1020157027418 A KR 1020157027418A KR 20157027418 A KR20157027418 A KR 20157027418A KR 20150129764 A KR20150129764 A KR 20150129764A
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South Korea
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decision
logic
contents
computer system
register
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Korean (ko)
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토마스 정
아제딘 투즈니
충 렌 쳉
필 제이 보스틀리
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퀄컴 인코포레이티드
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1416Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/1425Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
    • G06F12/1441Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a range
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1416Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/145Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1027Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1458Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1466Key-lock mechanism
    • G06F12/1475Key-lock mechanism in a virtual system, e.g. with translation means
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1458Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1491Protection against unauthorised use of memory or access to memory by checking the subject access rights in a hierarchical protection system, e.g. privilege levels, memory rings
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G06F21/79Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45504Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1032Reliability improvement, data loss prevention, degraded operation etc
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/15Use in a specific computing environment
    • G06F2212/151Emulated environment, e.g. virtual machine
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/15Use in a specific computing environment
    • G06F2212/152Virtualized environment, e.g. logically partitioned system
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65Details of virtual memory and virtual address translation
    • G06F2212/654Look-ahead translation
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/68Details of translation look-aside buffer [TLB]

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Storage Device Security (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
KR1020157027418A 2013-03-05 2014-03-04 하드웨어 테이블 워크 (hwtw) 를 수행할 경우에 특정 조건들 하에서 레지스터의 콘텐츠로의 미허가 액세스를 방지하는 방법 및 장치 Withdrawn KR20150129764A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/785,979 2013-03-05
US13/785,979 US9330026B2 (en) 2013-03-05 2013-03-05 Method and apparatus for preventing unauthorized access to contents of a register under certain conditions when performing a hardware table walk (HWTW)
PCT/US2014/020185 WO2014138005A1 (en) 2013-03-05 2014-03-04 Method and apparatus for preventing unauthorized access to contents of a register under certain conditions when performing a hardware table walk (hwtw)

Publications (1)

Publication Number Publication Date
KR20150129764A true KR20150129764A (ko) 2015-11-20

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KR1020157027418A Withdrawn KR20150129764A (ko) 2013-03-05 2014-03-04 하드웨어 테이블 워크 (hwtw) 를 수행할 경우에 특정 조건들 하에서 레지스터의 콘텐츠로의 미허가 액세스를 방지하는 방법 및 장치

Country Status (7)

Country Link
US (2) US9330026B2 (enExample)
EP (1) EP2965211A1 (enExample)
JP (1) JP6301378B2 (enExample)
KR (1) KR20150129764A (enExample)
CN (1) CN105027097B (enExample)
TW (1) TW201447584A (enExample)
WO (1) WO2014138005A1 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9015400B2 (en) 2013-03-05 2015-04-21 Qualcomm Incorporated Methods and systems for reducing the amount of time and computing resources that are required to perform a hardware table walk (HWTW)
GB2528115B (en) * 2014-07-11 2021-05-19 Advanced Risc Mach Ltd Dynamic saving of registers in transactions
US9672159B2 (en) * 2015-07-02 2017-06-06 Arm Limited Translation buffer unit management
WO2017028309A1 (zh) * 2015-08-20 2017-02-23 华为技术有限公司 文件数据访问方法和计算机系统
US12339979B2 (en) 2016-03-07 2025-06-24 Crowdstrike, Inc. Hypervisor-based interception of memory and register accesses
US12248560B2 (en) * 2016-03-07 2025-03-11 Crowdstrike, Inc. Hypervisor-based redirection of system calls and interrupt-based task offloading
US10386904B2 (en) * 2016-03-31 2019-08-20 Qualcomm Incorporated Hardware managed power collapse and clock wake-up for memory management units and distributed virtual memory networks
US10339324B2 (en) * 2016-12-22 2019-07-02 Apple Inc. Tamper-proof storage using signatures based on threshold voltage distributions
CN110795363B (zh) * 2019-08-26 2023-05-23 北京大学深圳研究生院 一种存储介质的热页预测方法和页面调度方法

Family Cites Families (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2933628B2 (ja) * 1988-07-25 1999-08-16 株式会社日立製作所 主記憶装置管理方法および計算機システム
GB2260004B (en) 1991-09-30 1995-02-08 Apple Computer Memory management unit for a computer system
JP3454854B2 (ja) * 1992-01-16 2003-10-06 株式会社東芝 メモリ管理装置及び方法
HUP0004400A3 (en) * 1997-11-05 2002-10-28 Novartis Ag Dipeptide nitriles, process for their preparation, pharmaceutical compositions comprising thereof and their use
US6745306B1 (en) * 1999-07-29 2004-06-01 Microsoft Corporation Method and system for restricting the load of physical address translations of virtual addresses
US7124170B1 (en) 1999-08-20 2006-10-17 Intertrust Technologies Corp. Secure processing unit systems and methods
US6633963B1 (en) * 2000-03-31 2003-10-14 Intel Corporation Controlling access to multiple memory zones in an isolated execution environment
US20030079103A1 (en) 2001-10-24 2003-04-24 Morrow Michael W. Apparatus and method to perform address translation
US8051301B2 (en) * 2001-11-13 2011-11-01 Advanced Micro Devices, Inc. Memory management system and method providing linear address based memory access security
US7089377B1 (en) * 2002-09-06 2006-08-08 Vmware, Inc. Virtualization system for computers with a region-based memory architecture
AU2003276399A1 (en) * 2002-11-18 2004-06-15 Arm Limited Virtual to physical memory address mapping within a system having a secure domain and a non-secure domain
US7089397B1 (en) 2003-07-03 2006-08-08 Transmeta Corporation Method and system for caching attribute data for matching attributes with physical addresses
US7117290B2 (en) 2003-09-03 2006-10-03 Advanced Micro Devices, Inc. MicroTLB and micro tag for reducing power in a processor
US7162609B2 (en) 2003-12-03 2007-01-09 Marvell International Ltd. Translation lookaside buffer prediction mechanism
EP1870814B1 (en) 2006-06-19 2014-08-13 Texas Instruments France Method and apparatus for secure demand paging for processor devices
US7340582B2 (en) 2004-09-30 2008-03-04 Intel Corporation Fault processing for direct memory access address translation
KR100630702B1 (ko) 2004-10-05 2006-10-02 삼성전자주식회사 명령어 캐쉬와 명령어 변환 참조 버퍼의 제어기, 및 그제어방법
US7886126B2 (en) * 2005-01-14 2011-02-08 Intel Corporation Extended paging tables to map guest physical memory addresses from virtual memory page tables to host physical memory addresses in a virtual machine system
US7428626B2 (en) 2005-03-08 2008-09-23 Microsoft Corporation Method and system for a second level address translation in a virtual machine environment
US7366869B2 (en) 2005-03-17 2008-04-29 Qualcomm Incorporated Method and system for optimizing translation lookaside buffer entries
US20060224815A1 (en) 2005-03-30 2006-10-05 Koichi Yamada Virtualizing memory management unit resources
US7386669B2 (en) 2005-03-31 2008-06-10 International Business Machines Corporation System and method of improving task switching and page translation performance utilizing a multilevel translation lookaside buffer
US20070226795A1 (en) 2006-02-09 2007-09-27 Texas Instruments Incorporated Virtual cores and hardware-supported hypervisor integrated circuits, systems, methods and processes of manufacture
US7822941B2 (en) * 2006-06-05 2010-10-26 Oracle America, Inc. Function-based virtual-to-physical address translation
US8615643B2 (en) 2006-12-05 2013-12-24 Microsoft Corporation Operational efficiency of virtual TLBs
EP2075696A3 (en) 2007-05-10 2010-01-27 Texas Instruments Incorporated Interrupt- related circuits, systems and processes
US8275971B2 (en) * 2008-08-27 2012-09-25 International Business Machines Corporation Method and apparatus for managing software controlled cache of translating the physical memory access of a virtual machine between different levels of translation entities
US8595465B1 (en) 2009-09-09 2013-11-26 Marvell Israel (M.I.S.L) Ltd. Virtual address to physical address translation using prediction logic
US9098700B2 (en) 2010-03-01 2015-08-04 The Trustees Of Columbia University In The City Of New York Systems and methods for detecting attacks against a digital circuit
US8359453B2 (en) * 2010-09-13 2013-01-22 International Business Machines Corporation Real address accessing in a coprocessor executing on behalf of an unprivileged process
US9405700B2 (en) 2010-11-04 2016-08-02 Sonics, Inc. Methods and apparatus for virtualization in an integrated circuit
US9092358B2 (en) 2011-03-03 2015-07-28 Qualcomm Incorporated Memory management unit with pre-filling capability
US9009445B2 (en) 2011-10-20 2015-04-14 Apple Inc. Memory management unit speculative hardware table walk scheme
US9183399B2 (en) * 2013-02-14 2015-11-10 International Business Machines Corporation Instruction set architecture with secure clear instructions for protecting processing unit architected state information
US9015400B2 (en) 2013-03-05 2015-04-21 Qualcomm Incorporated Methods and systems for reducing the amount of time and computing resources that are required to perform a hardware table walk (HWTW)

Also Published As

Publication number Publication date
WO2014138005A1 (en) 2014-09-12
EP2965211A1 (en) 2016-01-13
US20170083456A1 (en) 2017-03-23
US9330026B2 (en) 2016-05-03
JP6301378B2 (ja) 2018-03-28
CN105027097A (zh) 2015-11-04
JP2016513836A (ja) 2016-05-16
TW201447584A (zh) 2014-12-16
CN105027097B (zh) 2018-01-16
US20140258663A1 (en) 2014-09-11

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PA0105 International application

Patent event date: 20151002

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid