JP6301378B2 - ハードウェアテーブルウォーク（ｈｗｔｗ）を実行する際にいくつかの条件下でレジスタの内容に対する許可のないアクセスを防止するための方法および装置 - Google Patents

ハードウェアテーブルウォーク（ｈｗｔｗ）を実行する際にいくつかの条件下でレジスタの内容に対する許可のないアクセスを防止するための方法および装置 Download PDF

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JP6301378B2
JP6301378B2 JP2015561522A JP2015561522A JP6301378B2 JP 6301378 B2 JP6301378 B2 JP 6301378B2 JP 2015561522 A JP2015561522 A JP 2015561522A JP 2015561522 A JP2015561522 A JP 2015561522A JP 6301378 B2 JP6301378 B2 JP 6301378B2
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トーマス・ゼン
アゼディン・トウズニ
ズン・レン・ツェン
フィル・ジェイ・ボストリー
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クアルコム，インコーポレイテッド
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/145—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1491—Protection against unauthorised use of memory or access to memory by checking the subject access rights in a hierarchical protection system, e.g. privilege levels, memory rings
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/15—Use in a specific computing environment
    • G06F2212/151—Emulated environment, e.g. virtual machine
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/15—Use in a specific computing environment
    • G06F2212/152—Virtualized environment, e.g. logically partitioned system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/654—Look-ahead translation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/68—Details of translation look-aside buffer [TLB]

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Storage Device Security (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP2015561522A 2013-03-05 2014-03-04 ハードウェアテーブルウォーク（ｈｗｔｗ）を実行する際にいくつかの条件下でレジスタの内容に対する許可のないアクセスを防止するための方法および装置 Expired - Fee Related JP6301378B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/785,979 2013-03-05
US13/785,979 US9330026B2 (en) 2013-03-05 2013-03-05 Method and apparatus for preventing unauthorized access to contents of a register under certain conditions when performing a hardware table walk (HWTW)
PCT/US2014/020185 WO2014138005A1 (en) 2013-03-05 2014-03-04 Method and apparatus for preventing unauthorized access to contents of a register under certain conditions when performing a hardware table walk (hwtw)

Publications (3)

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JP2016513836A JP2016513836A (ja) 2016-05-16
JP2016513836A5 JP2016513836A5 (enExample) 2017-03-16
JP6301378B2 true JP6301378B2 (ja) 2018-03-28

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US (2) US9330026B2 (enExample)
EP (1) EP2965211A1 (enExample)
JP (1) JP6301378B2 (enExample)
KR (1) KR20150129764A (enExample)
CN (1) CN105027097B (enExample)
TW (1) TW201447584A (enExample)
WO (1) WO2014138005A1 (enExample)

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US10386904B2 (en) * 2016-03-31 2019-08-20 Qualcomm Incorporated Hardware managed power collapse and clock wake-up for memory management units and distributed virtual memory networks
US10339324B2 (en) * 2016-12-22 2019-07-02 Apple Inc. Tamper-proof storage using signatures based on threshold voltage distributions
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Also Published As

Publication number Publication date
US20170083456A1 (en) 2017-03-23
TW201447584A (zh) 2014-12-16
JP2016513836A (ja) 2016-05-16
KR20150129764A (ko) 2015-11-20
CN105027097B (zh) 2018-01-16
EP2965211A1 (en) 2016-01-13
CN105027097A (zh) 2015-11-04
US20140258663A1 (en) 2014-09-11
WO2014138005A1 (en) 2014-09-12
US9330026B2 (en) 2016-05-03

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