JP2016513835A5 - - Google Patents

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Publication number
JP2016513835A5
JP2016513835A5 JP2015561519A JP2015561519A JP2016513835A5 JP 2016513835 A5 JP2016513835 A5 JP 2016513835A5 JP 2015561519 A JP2015561519 A JP 2015561519A JP 2015561519 A JP2015561519 A JP 2015561519A JP 2016513835 A5 JP2016513835 A5 JP 2016513835A5
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JP
Japan
Prior art keywords
ipa
physical memory
function
page table
tlb
Prior art date
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Application number
JP2015561519A
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English (en)
Japanese (ja)
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JP2016513835A (ja
JP6298083B2 (ja
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Priority claimed from US13/785,877 external-priority patent/US9015400B2/en
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Publication of JP2016513835A publication Critical patent/JP2016513835A/ja
Publication of JP2016513835A5 publication Critical patent/JP2016513835A5/ja
Application granted granted Critical
Publication of JP6298083B2 publication Critical patent/JP6298083B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2015561519A 2013-03-05 2014-03-04 ハードウェアテーブルウォークを実行するのに要求される時間およびコンピューティングリソースの量を低減するための方法およびシステム Expired - Fee Related JP6298083B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/785,877 2013-03-05
US13/785,877 US9015400B2 (en) 2013-03-05 2013-03-05 Methods and systems for reducing the amount of time and computing resources that are required to perform a hardware table walk (HWTW)
PCT/US2014/020101 WO2014137970A1 (en) 2013-03-05 2014-03-04 Methods and systems for reducing the amount of time and computing resources that are required to perform a hardware table walk

Publications (3)

Publication Number Publication Date
JP2016513835A JP2016513835A (ja) 2016-05-16
JP2016513835A5 true JP2016513835A5 (enExample) 2017-03-23
JP6298083B2 JP6298083B2 (ja) 2018-03-20

Family

ID=50382619

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015561519A Expired - Fee Related JP6298083B2 (ja) 2013-03-05 2014-03-04 ハードウェアテーブルウォークを実行するのに要求される時間およびコンピューティングリソースの量を低減するための方法およびシステム

Country Status (7)

Country Link
US (1) US9015400B2 (enExample)
EP (1) EP2965210A1 (enExample)
JP (1) JP6298083B2 (enExample)
KR (1) KR20150128804A (enExample)
CN (1) CN105027095B (enExample)
TW (1) TWI526832B (enExample)
WO (1) WO2014137970A1 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9330026B2 (en) 2013-03-05 2016-05-03 Qualcomm Incorporated Method and apparatus for preventing unauthorized access to contents of a register under certain conditions when performing a hardware table walk (HWTW)
US9805194B2 (en) 2015-03-27 2017-10-31 Intel Corporation Memory scanning methods and apparatus
US10474589B1 (en) * 2016-03-02 2019-11-12 Janus Technologies, Inc. Method and apparatus for side-band management of security for a server computer
US10261916B2 (en) * 2016-03-25 2019-04-16 Advanced Micro Devices, Inc. Adaptive extension of leases for entries in a translation lookaside buffer
US10386904B2 (en) * 2016-03-31 2019-08-20 Qualcomm Incorporated Hardware managed power collapse and clock wake-up for memory management units and distributed virtual memory networks
US20180069767A1 (en) * 2016-09-06 2018-03-08 Advanced Micro Devices, Inc. Preserving quality of service constraints in heterogeneous processing systems
EP3355188B1 (en) 2017-01-31 2021-08-25 OpenSynergy GmbH Instrument display on a car dashboard by checking frames of a gui by a realtime os
US10754790B2 (en) * 2018-04-26 2020-08-25 Qualcomm Incorporated Translation of virtual addresses to physical addresses using translation lookaside buffer information
US12307902B2 (en) * 2020-04-21 2025-05-20 Qualcomm Incorporated Cluster-based approach to positioning of vehicles in vehicle platooning or autonomous trucking

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2933628B2 (ja) * 1988-07-25 1999-08-16 株式会社日立製作所 主記憶装置管理方法および計算機システム
GB2260004B (en) 1991-09-30 1995-02-08 Apple Computer Memory management unit for a computer system
US7124170B1 (en) 1999-08-20 2006-10-17 Intertrust Technologies Corp. Secure processing unit systems and methods
US20030079103A1 (en) 2001-10-24 2003-04-24 Morrow Michael W. Apparatus and method to perform address translation
US8051301B2 (en) 2001-11-13 2011-11-01 Advanced Micro Devices, Inc. Memory management system and method providing linear address based memory access security
AU2003276399A1 (en) 2002-11-18 2004-06-15 Arm Limited Virtual to physical memory address mapping within a system having a secure domain and a non-secure domain
US7089397B1 (en) * 2003-07-03 2006-08-08 Transmeta Corporation Method and system for caching attribute data for matching attributes with physical addresses
US7117290B2 (en) * 2003-09-03 2006-10-03 Advanced Micro Devices, Inc. MicroTLB and micro tag for reducing power in a processor
US8156343B2 (en) * 2003-11-26 2012-04-10 Intel Corporation Accessing private data about the state of a data processing machine from storage that is publicly accessible
US7162609B2 (en) * 2003-12-03 2007-01-09 Marvell International Ltd. Translation lookaside buffer prediction mechanism
EP1870814B1 (en) 2006-06-19 2014-08-13 Texas Instruments France Method and apparatus for secure demand paging for processor devices
US7340582B2 (en) 2004-09-30 2008-03-04 Intel Corporation Fault processing for direct memory access address translation
US7428626B2 (en) 2005-03-08 2008-09-23 Microsoft Corporation Method and system for a second level address translation in a virtual machine environment
US20060224815A1 (en) 2005-03-30 2006-10-05 Koichi Yamada Virtualizing memory management unit resources
US20070226795A1 (en) 2006-02-09 2007-09-27 Texas Instruments Incorporated Virtual cores and hardware-supported hypervisor integrated circuits, systems, methods and processes of manufacture
US7822941B2 (en) 2006-06-05 2010-10-26 Oracle America, Inc. Function-based virtual-to-physical address translation
US7594079B2 (en) * 2006-09-29 2009-09-22 Mips Technologies, Inc. Data cache virtual hint way prediction, and applications thereof
US8615643B2 (en) * 2006-12-05 2013-12-24 Microsoft Corporation Operational efficiency of virtual TLBs
EP2075696A3 (en) 2007-05-10 2010-01-27 Texas Instruments Incorporated Interrupt- related circuits, systems and processes
US8661181B2 (en) * 2007-06-28 2014-02-25 Memory Technologies Llc Memory protection unit in a virtual processing environment
US8595465B1 (en) * 2009-09-09 2013-11-26 Marvell Israel (M.I.S.L) Ltd. Virtual address to physical address translation using prediction logic
US9098700B2 (en) 2010-03-01 2015-08-04 The Trustees Of Columbia University In The City Of New York Systems and methods for detecting attacks against a digital circuit
US9405700B2 (en) 2010-11-04 2016-08-02 Sonics, Inc. Methods and apparatus for virtualization in an integrated circuit
US20120246381A1 (en) * 2010-12-14 2012-09-27 Andy Kegel Input Output Memory Management Unit (IOMMU) Two-Layer Addressing
US9092358B2 (en) * 2011-03-03 2015-07-28 Qualcomm Incorporated Memory management unit with pre-filling capability
US9009445B2 (en) * 2011-10-20 2015-04-14 Apple Inc. Memory management unit speculative hardware table walk scheme
CN102722451B (zh) * 2012-06-25 2015-04-15 杭州中天微系统有限公司 采用物理地址预测访问高速缓存的装置
US9330026B2 (en) 2013-03-05 2016-05-03 Qualcomm Incorporated Method and apparatus for preventing unauthorized access to contents of a register under certain conditions when performing a hardware table walk (HWTW)

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