JP2016511933A5 - - Google Patents

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Publication number
JP2016511933A5
JP2016511933A5 JP2015552832A JP2015552832A JP2016511933A5 JP 2016511933 A5 JP2016511933 A5 JP 2016511933A5 JP 2015552832 A JP2015552832 A JP 2015552832A JP 2015552832 A JP2015552832 A JP 2015552832A JP 2016511933 A5 JP2016511933 A5 JP 2016511933A5
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JP
Japan
Prior art keywords
well
pmos transistor
high voltage
mode
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2015552832A
Other languages
English (en)
Japanese (ja)
Other versions
JP6092427B2 (ja
JP2016511933A (ja
Filing date
Publication date
Priority claimed from US13/742,964 external-priority patent/US8787096B1/en
Application filed filed Critical
Publication of JP2016511933A publication Critical patent/JP2016511933A/ja
Publication of JP2016511933A5 publication Critical patent/JP2016511933A5/ja
Application granted granted Critical
Publication of JP6092427B2 publication Critical patent/JP6092427B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2015552832A 2013-01-16 2014-01-10 ｎウェル切替回路 Expired - Fee Related JP6092427B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/742,964 2013-01-16
US13/742,964 US8787096B1 (en) 2013-01-16 2013-01-16 N-well switching circuit
PCT/US2014/011138 WO2014113295A1 (en) 2013-01-16 2014-01-10 N-well switching circuit

Publications (3)

Publication Number Publication Date
JP2016511933A JP2016511933A (ja) 2016-04-21
JP2016511933A5 true JP2016511933A5 (cg-RX-API-DMAC7.html) 2017-01-19
JP6092427B2 JP6092427B2 (ja) 2017-03-08

Family

ID=50031588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015552832A Expired - Fee Related JP6092427B2 (ja) 2013-01-16 2014-01-10 ｎウェル切替回路

Country Status (6)

Country Link
US (2) US8787096B1 (cg-RX-API-DMAC7.html)
EP (1) EP2946474B1 (cg-RX-API-DMAC7.html)
JP (1) JP6092427B2 (cg-RX-API-DMAC7.html)
KR (1) KR101557812B1 (cg-RX-API-DMAC7.html)
CN (1) CN104937848B (cg-RX-API-DMAC7.html)
WO (1) WO2014113295A1 (cg-RX-API-DMAC7.html)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8787096B1 (en) 2013-01-16 2014-07-22 Qualcomm Incorporated N-well switching circuit
US9082498B2 (en) * 2013-08-08 2015-07-14 Qualcomm Incorporated N-well switching circuit
EP3262153A4 (en) 2015-02-23 2018-07-04 Lanzatech New Zealand Limited Recombinant acetogenic bacterium for the conversion of methane to products
CN105049029B (zh) * 2015-07-06 2018-05-04 上海巨微集成电路有限公司 一种pmos管衬底切换电路
US9738875B2 (en) 2015-10-13 2017-08-22 Lanzatech New Zealand Limited Genetically engineered bacterium comprising energy-generating fermentation pathway
EP3384005B1 (en) 2015-12-03 2022-02-02 LanzaTech NZ, Inc. Arginine as sole nitrogen source for c1-fixing microorganism
EP4234707A3 (en) 2016-02-01 2024-06-05 LanzaTech NZ, Inc. Integrated fermentation and electrolysis process
KR20180110144A (ko) 2016-02-26 2018-10-08 란자테크 뉴질랜드 리미티드 C1-고정 박테리아에 대한 crispr/cas 시스템
US9570192B1 (en) 2016-03-04 2017-02-14 Qualcomm Incorporated System and method for reducing programming voltage stress on memory cell devices
MY202145A (en) 2018-02-12 2024-04-05 Lanzatech Inc Process for improving carbon conversion efficiency
EP3781668B1 (en) 2018-04-20 2023-10-04 Lanzatech, Inc. Fermentation process for producing ethanol
CN113225056A (zh) * 2021-05-21 2021-08-06 上海韦尔半导体股份有限公司 一种控制电路、电路控制方法及电子产品
US12212315B1 (en) * 2023-01-04 2025-01-28 Cadence Design Systems, Inc. Interface device

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US4670668A (en) 1985-05-09 1987-06-02 Advanced Micro Devices, Inc. Substrate bias generator with power supply control means to sequence application of bias and power to prevent CMOS SCR latch-up
KR0169157B1 (ko) * 1993-11-29 1999-02-01 기다오까 다까시 반도체 회로 및 mos-dram
JP3264622B2 (ja) 1996-07-16 2002-03-11 株式会社東芝 半導体装置
US5844425A (en) 1996-07-19 1998-12-01 Quality Semiconductor, Inc. CMOS tristate output buffer with having overvoltage protection and increased stability against bus voltage variations
JP4105833B2 (ja) * 1998-09-09 2008-06-25 株式会社ルネサステクノロジ 半導体集積回路装置
TW453032B (en) * 1998-09-09 2001-09-01 Hitachi Ltd Semiconductor integrated circuit apparatus
US6452858B1 (en) * 1999-11-05 2002-09-17 Hitachi, Ltd. Semiconductor device
US6377112B1 (en) 2000-12-05 2002-04-23 Semiconductor Components Industries Llc Circuit and method for PMOS device N-well bias control
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US6882188B1 (en) * 2003-09-30 2005-04-19 Faraday Technology Corp. Input/output buffer
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KR100728950B1 (ko) * 2004-03-11 2007-06-15 주식회사 하이닉스반도체 내부전압 발생장치
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US7330049B2 (en) * 2006-03-06 2008-02-12 Altera Corporation Adjustable transistor body bias generation circuitry with latch-up prevention
US7355437B2 (en) * 2006-03-06 2008-04-08 Altera Corporation Latch-up prevention circuitry for integrated circuits with transistor body biasing
TWI451697B (zh) * 2006-05-03 2014-09-01 Synopsys Inc 極低功率類比補償電路
US7863962B2 (en) * 2008-04-17 2011-01-04 National Semiconductor Corporation High voltage CMOS output buffer constructed from low voltage CMOS transistors
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US8787096B1 (en) 2013-01-16 2014-07-22 Qualcomm Incorporated N-well switching circuit

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