JP2016510195A5 - - Google Patents

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Publication number
JP2016510195A5
JP2016510195A5 JP2015561733A JP2015561733A JP2016510195A5 JP 2016510195 A5 JP2016510195 A5 JP 2016510195A5 JP 2015561733 A JP2015561733 A JP 2015561733A JP 2015561733 A JP2015561733 A JP 2015561733A JP 2016510195 A5 JP2016510195 A5 JP 2016510195A5
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JP
Japan
Prior art keywords
differential signal
driver
current
differential
termination network
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2015561733A
Other languages
English (en)
Japanese (ja)
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JP2016510195A (ja
Filing date
Publication date
Priority claimed from US13/832,990 external-priority patent/US9071220B2/en
Priority claimed from US14/199,898 external-priority patent/US9337997B2/en
Application filed filed Critical
Publication of JP2016510195A publication Critical patent/JP2016510195A/ja
Publication of JP2016510195A5 publication Critical patent/JP2016510195A5/ja
Pending legal-status Critical Current

Links

JP2015561733A 2013-03-07 2014-03-07 効率的なｎ階乗差動シグナリング終端ネットワーク Pending JP2016510195A (ja)

Applications Claiming Priority (9)

Application Number Priority Date Filing Date Title
US201361774408P 2013-03-07 2013-03-07
US61/774,408 2013-03-07
US201361778768P 2013-03-13 2013-03-13
US61/778,768 2013-03-13
US13/832,990 US9071220B2 (en) 2013-03-07 2013-03-15 Efficient N-factorial differential signaling termination network
US13/832,990 2013-03-15
US14/199,898 2014-03-06
US14/199,898 US9337997B2 (en) 2013-03-07 2014-03-06 Transcoding method for multi-wire signaling that embeds clock information in transition of signal state
PCT/US2014/022031 WO2014138658A1 (en) 2013-03-07 2014-03-07 Efficient n-factorial differential signaling termination network

Publications (2)

Publication Number Publication Date
JP2016510195A JP2016510195A (ja) 2016-04-04
JP2016510195A5 true JP2016510195A5 (enExample) 2017-03-30

Family

ID=51487797

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015561733A Pending JP2016510195A (ja) 2013-03-07 2014-03-07 効率的なｎ階乗差動シグナリング終端ネットワーク

Country Status (6)

Country Link
US (1) US9071220B2 (enExample)
EP (1) EP2965480B1 (enExample)
JP (1) JP2016510195A (enExample)
KR (1) KR101668576B1 (enExample)
CN (1) CN105009533B (enExample)
WO (1) WO2014138658A1 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9363071B2 (en) 2013-03-07 2016-06-07 Qualcomm Incorporated Circuit to recover a clock signal from multiple wire data signals that changes state every state cycle and is immune to data inter-lane skew as well as data state transition glitches
US9313058B2 (en) 2013-03-07 2016-04-12 Qualcomm Incorporated Compact and fast N-factorial single data rate clock and data recovery circuits
US9374216B2 (en) 2013-03-20 2016-06-21 Qualcomm Incorporated Multi-wire open-drain link with data symbol transition based clocking
EP2816765B1 (en) * 2013-06-17 2016-10-12 ST-Ericsson SA Three-wire three-level digital interface
US9735948B2 (en) 2013-10-03 2017-08-15 Qualcomm Incorporated Multi-lane N-factorial (N!) and other multi-wire communication systems
US9755818B2 (en) 2013-10-03 2017-09-05 Qualcomm Incorporated Method to enhance MIPI D-PHY link rate with minimal PHY changes and no protocol changes
US9203599B2 (en) 2014-04-10 2015-12-01 Qualcomm Incorporated Multi-lane N-factorial (N!) and other multi-wire communication systems
US9710412B2 (en) * 2014-05-15 2017-07-18 Qualcomm Incorporated N-factorial voltage mode driver
CN108964691A (zh) * 2017-05-26 2018-12-07 聚晶半导体股份有限公司 数据传输系统

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6556628B1 (en) * 1999-04-29 2003-04-29 The University Of North Carolina At Chapel Hill Methods and systems for transmitting and receiving differential signals over a plurality of conductors
US6320406B1 (en) * 1999-10-04 2001-11-20 Texas Instruments Incorporated Methods and apparatus for a terminated fail-safe circuit
JP4234337B2 (ja) * 2000-11-17 2009-03-04 テキサス インスツルメンツ インコーポレイテッド データ伝送システムにおける又は関する改善
KR20020054053A (ko) * 2000-12-27 2002-07-06 엘지전자 주식회사 동기식 전송 모드의 랜덤 패턴을 고려한 프레임 검출 장치및 그 방법
JP2003258844A (ja) 2002-03-01 2003-09-12 Fujitsu Ltd インターネットプロトコルネットワークの網終端装置及びその冗長系運転方法
US7199681B2 (en) * 2002-04-19 2007-04-03 Intel Corporation Interconnecting of digital devices
US7358869B1 (en) 2003-08-20 2008-04-15 University Of Pittsburgh Power efficient, high bandwidth communication using multi-signal-differential channels
JP2005086662A (ja) * 2003-09-10 2005-03-31 Seiko Epson Corp 半導体装置
DE602004028144D1 (de) * 2003-10-22 2010-08-26 Nxp Bv Verfahren und einrichtung zum senden von daten über mehrere übertragungsleitungen
US7061266B2 (en) * 2004-07-06 2006-06-13 Intel Corporation Methods and apparatus for improving impedance tolerance of on-die termination elements
US8222917B2 (en) * 2005-11-03 2012-07-17 Agate Logic, Inc. Impedance matching and trimming apparatuses and methods using programmable resistance devices
US7746937B2 (en) * 2006-04-14 2010-06-29 Formfactor, Inc. Efficient wired interface for differential signals
WO2007125963A1 (ja) * 2006-04-27 2007-11-08 Panasonic Corporation 多重差動伝送システム
US7541838B2 (en) * 2007-03-27 2009-06-02 Intel Corporation Transmitter swing control circuit and method
JP5180634B2 (ja) * 2007-04-24 2013-04-10 パナソニック株式会社 差動伝送線路
US8649460B2 (en) 2007-06-05 2014-02-11 Rambus Inc. Techniques for multi-wire encoding with an embedded clock
JP2009021978A (ja) * 2007-06-11 2009-01-29 Panasonic Corp 伝送ケーブル
US8848810B2 (en) * 2008-03-05 2014-09-30 Qualcomm Incorporated Multiple transmitter system and method
US7710144B2 (en) * 2008-07-01 2010-05-04 International Business Machines Corporation Controlling for variable impedance and voltage in a memory system
KR101079603B1 (ko) * 2009-08-11 2011-11-03 주식회사 티엘아이 3레벨 전압을 이용하는 차동 데이터 송수신 장치 및 차동 데이터 송수신 방법
KR101668858B1 (ko) * 2014-04-28 2016-10-24 주식회사 이타기술 다채널 비디오 스트림 전송 방법, 그리고 이를 이용한 관제 시스템

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