JP2016509280A5 - - Google Patents
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- JP2016509280A5 JP2016509280A5 JP2015549407A JP2015549407A JP2016509280A5 JP 2016509280 A5 JP2016509280 A5 JP 2016509280A5 JP 2015549407 A JP2015549407 A JP 2015549407A JP 2015549407 A JP2015549407 A JP 2015549407A JP 2016509280 A5 JP2016509280 A5 JP 2016509280A5
- Authority
- JP
- Japan
- Prior art keywords
- memory transfer
- transfer mode
- transfer operation
- memory
- gpu
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000004044 response Effects 0.000 claims description 71
- 238000000034 method Methods 0.000 claims description 35
- 230000007717 exclusion Effects 0.000 claims description 4
- 238000004891 communication Methods 0.000 claims description 2
- 230000005540 biological transmission Effects 0.000 claims 5
- 230000003139 buffering effect Effects 0.000 claims 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/725,393 US9245496B2 (en) | 2012-12-21 | 2012-12-21 | Multi-mode memory access techniques for performing graphics processing unit-based memory transfer operations |
| US13/725,393 | 2012-12-21 | ||
| PCT/US2013/071283 WO2014099249A1 (en) | 2012-12-21 | 2013-11-21 | Multi-mode memory access techniques for performing graphics processing unit-based memory transfer operations |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2016509280A JP2016509280A (ja) | 2016-03-24 |
| JP2016509280A5 true JP2016509280A5 (enExample) | 2016-05-12 |
| JP6009692B2 JP6009692B2 (ja) | 2016-10-19 |
Family
ID=49759568
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015549407A Active JP6009692B2 (ja) | 2012-12-21 | 2013-11-21 | グラフィックスプロセッシングユニットベースのメモリ転送動作を行うためのマルチモードメモリアクセス技法 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US9245496B2 (enExample) |
| EP (1) | EP2936492B1 (enExample) |
| JP (1) | JP6009692B2 (enExample) |
| KR (1) | KR101667508B1 (enExample) |
| CN (1) | CN104871246B (enExample) |
| ES (1) | ES2907227T3 (enExample) |
| WO (1) | WO2014099249A1 (enExample) |
Families Citing this family (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015150342A1 (en) * | 2014-03-30 | 2015-10-08 | Universiteit Gent | Program execution on heterogeneous platform |
| JP6412708B2 (ja) * | 2014-04-01 | 2018-10-24 | 株式会社ソニー・インタラクティブエンタテインメント | プロセッシングシステムおよびマルチプロセッシングシステム |
| US10417990B2 (en) * | 2014-10-16 | 2019-09-17 | Nvidia Corporation | Efficient binding of resource groups in a graphics application programming interface |
| US9818170B2 (en) * | 2014-12-10 | 2017-11-14 | Qualcomm Incorporated | Processing unaligned block transfer operations |
| US10198206B2 (en) | 2015-04-17 | 2019-02-05 | Hewlett-Packard Development Company, L.P. | Memory mode categorizations |
| US10163180B2 (en) | 2015-04-29 | 2018-12-25 | Qualcomm Incorporated | Adaptive memory address scanning based on surface format for graphics processing |
| US9947277B2 (en) | 2015-05-20 | 2018-04-17 | Apple Inc. | Devices and methods for operating a timing controller of a display |
| WO2017049583A1 (en) * | 2015-09-25 | 2017-03-30 | Intel Corporation | Gpu-cpu two-path memory copy |
| US9864705B2 (en) | 2015-11-01 | 2018-01-09 | International Business Machines Corporation | Dynamic access method switching for open data sets |
| US10091904B2 (en) * | 2016-07-22 | 2018-10-02 | Intel Corporation | Storage sled for data center |
| US10310860B2 (en) * | 2016-07-29 | 2019-06-04 | International Business Machines Corporation | Starting and stopping instruction dispatch to execution unit queues in a multi-pipeline processor |
| US10175905B2 (en) * | 2016-09-13 | 2019-01-08 | Apple Inc. | Systems and methods for dynamically switching memory performance states |
| KR102022481B1 (ko) * | 2017-12-06 | 2019-09-18 | 연세대학교 산학협력단 | Gpu 사용량을 이용한 고성능 컴퓨팅 시스템의 체크포인트 생성 방법 |
| US10430915B2 (en) * | 2017-12-28 | 2019-10-01 | Nvidia Corporation | Multi-GPU frame rendering |
| US11252429B2 (en) * | 2018-04-27 | 2022-02-15 | Ati Technologies Ulc | Low-latency consumption of an encoded video bitstream |
| US10877906B2 (en) * | 2018-09-17 | 2020-12-29 | Micron Technology, Inc. | Scheduling of read operations and write operations based on a data bus mode |
| KR102520412B1 (ko) * | 2018-09-19 | 2023-04-12 | 에스케이하이닉스 주식회사 | 메모리 시스템 및 그것의 동작방법 |
| US10642764B1 (en) * | 2019-03-01 | 2020-05-05 | Western Digital Technologies, Inc. | Data transfer command latency of a host device |
| US20220129198A1 (en) * | 2019-07-12 | 2022-04-28 | Hewlett-Packard Development Company, L.P. | Data updates for controllers |
| US11237873B2 (en) | 2019-08-29 | 2022-02-01 | Microsoft Technology Licensing, Llc | Hardware acceleration for function processing |
| US11843772B2 (en) | 2019-12-06 | 2023-12-12 | Ati Technologies Ulc | Video encode pre-analysis bit budgeting based on context and features |
| WO2021120132A1 (zh) * | 2019-12-19 | 2021-06-24 | 华为技术有限公司 | 一种存储系统及数据交叉方法 |
| JP7334358B2 (ja) * | 2020-02-03 | 2023-08-28 | 株式会社ソニー・インタラクティブエンタテインメント | レンダリング前にインターリーブスクリーン領域に対して事前テストを行うことによってジオメトリの効率的なマルチgpuレンダリングを行うシステム及び方法 |
| US11960404B2 (en) * | 2020-09-23 | 2024-04-16 | Advanced Micro Devices, Inc. | Method and apparatus for reducing the latency of long latency memory requests |
| KR102641532B1 (ko) * | 2022-10-20 | 2024-02-28 | (주)한국플랫폼서비스기술 | 사생활 보호 딥러닝 프레임워크 응용 컴퓨팅 장치 및 그 방법 |
| US12314585B2 (en) * | 2023-06-05 | 2025-05-27 | SanDisk Technologies, Inc. | Multi-tenant device read command service balancing |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5396597A (en) | 1992-04-03 | 1995-03-07 | International Business Machines Corporation | System for transferring data between processors via dual buffers within system memory with first and second processors accessing system memory directly and indirectly |
| US5948081A (en) | 1997-12-22 | 1999-09-07 | Compaq Computer Corporation | System for flushing queued memory write request corresponding to a queued read request and all prior write requests with counter indicating requests to be flushed |
| US6756986B1 (en) | 1999-10-18 | 2004-06-29 | S3 Graphics Co., Ltd. | Non-flushing atomic operation in a burst mode transfer data storage access environment |
| US6564304B1 (en) | 2000-09-01 | 2003-05-13 | Ati Technologies Inc. | Memory processing system and method for accessing memory including reordering memory requests to reduce mode switching |
| US6625685B1 (en) | 2000-09-20 | 2003-09-23 | Broadcom Corporation | Memory controller with programmable configuration |
| US6819327B2 (en) | 2001-05-18 | 2004-11-16 | Sun Microsystems, Inc. | Signature analysis registers for testing a computer graphics system |
| JP2003323339A (ja) * | 2002-03-01 | 2003-11-14 | Sony Computer Entertainment Inc | メモリアクセス装置、半導体デバイス、メモリアクセス制御方法、コンピュータプログラム及び記録媒体 |
| KR100648293B1 (ko) * | 2005-08-09 | 2006-11-23 | 삼성전자주식회사 | 그래픽 시스템 및 그것의 그래픽 처리 방법 |
| US8035647B1 (en) | 2006-08-24 | 2011-10-11 | Nvidia Corporation | Raster operations unit with interleaving of read and write requests using PCI express |
| US8327092B2 (en) | 2009-09-21 | 2012-12-04 | Freescale Semiconductor, Inc. | Memory device configurable as interleaved or non-interleaved memory |
| KR101639574B1 (ko) * | 2009-12-30 | 2016-07-14 | 삼성전자주식회사 | 적응적 뱅크 어드레스를 제공하는 디스플레이 시스템 및 그것의 어드레스 맵핑 방법 |
| JP5678273B2 (ja) * | 2010-03-01 | 2015-02-25 | パナソニックIpマネジメント株式会社 | メモリコントローラ |
| KR101620460B1 (ko) * | 2010-05-04 | 2016-05-13 | 삼성전자주식회사 | 인터커넥트, 그것을 포함하는 버스 시스템 그리고 버스 시스템의 동작 방법 |
| US9465728B2 (en) * | 2010-11-03 | 2016-10-11 | Nvidia Corporation | Memory controller adaptable to multiple memory devices |
| US9208002B2 (en) * | 2012-01-06 | 2015-12-08 | International Business Machines Corporation | Equalizing bandwidth for multiple requesters using a shared memory system |
-
2012
- 2012-12-21 US US13/725,393 patent/US9245496B2/en active Active
-
2013
- 2013-11-21 EP EP13803357.6A patent/EP2936492B1/en active Active
- 2013-11-21 JP JP2015549407A patent/JP6009692B2/ja active Active
- 2013-11-21 WO PCT/US2013/071283 patent/WO2014099249A1/en not_active Ceased
- 2013-11-21 CN CN201380066624.7A patent/CN104871246B/zh active Active
- 2013-11-21 ES ES13803357T patent/ES2907227T3/es active Active
- 2013-11-21 KR KR1020157018907A patent/KR101667508B1/ko active Active
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