JP2016213321A - Semiconductor device manufacturing method and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method and a semiconductor device, which inhibit warpage by using a semiconductor encapsulation component.SOLUTION: A semiconductor device manufacturing method comprises: a process of temporality fixing an active surface of a semiconductor element 3 to a support medium 1 with a temporary fixing layer 2; a process of encapsulating the semiconductor element 3 with an encapsulation component 4 to form a first insulation layer 4; a process of detaching the support medium 1 and the temporary fixing layer 2 to obtain the semiconductor element with an exposed active surface; a process of forming a second insulation layer having an opening to the active surface of the semiconductor element 3 in the semiconductor element 3 and the first insulation layer 4; a process of forming a seed layer in the opening and on the second insulation layer; a process of forming a pattern; a process of removing the seed layer; a process of forming a third insulation layer having an opening to the pattern on the pattern and second insulation layer; and a process of forming an external connection terminal in the opening. The semiconductor encapsulation component 4 is a thermosetting resin film containing a thermosetting resin component containing a thermosetting resin and a curative agent, an inorganic filler and a cross-linked rubber.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a method for manufacturing a semiconductor device using a semiconductor sealing member and the semiconductor device. More specifically, the present invention relates to a method for manufacturing a wafer level semiconductor device that is highly demanded to be reduced in size and thickness.

  As electronic devices become more sophisticated, semiconductor devices are becoming smaller and thinner. In recent years, semiconductor devices have become lighter, thinner and smaller, and packaging forms such as wafer-level semiconductor devices that are almost the same size as semiconductor elements and package-on-packages that stack semiconductor devices on top of semiconductor devices have been developed. Yes. In the future, it is expected that semiconductor devices will be further reduced in size and thickness.

  By the way, a wafer level semiconductor device is manufactured by forming a rewiring layer on a wafer, providing external connection terminals such as solder balls, and then dicing into pieces. In such a method, when the number of terminals is about several tens to 100 pins, external connection terminals such as solder balls can be provided on the wafer.

  However, when the miniaturization of semiconductor elements progresses and the number of terminals increases to 100 pins or more, it becomes difficult to form a rewiring layer only on the wafer and provide external connection terminals. When the external connection terminals are forcibly provided, the pitch between the terminals is reduced and the height of the terminals is reduced, and it is difficult to ensure connection reliability after the semiconductor device is mounted. For this reason, it is required to cope with the miniaturization of semiconductor elements, that is, the increase in the number of external connection terminals.

  Recently, a method for manufacturing a semiconductor device in which external connection terminals can be provided outside the semiconductor element by dividing the wafer into a predetermined size and rewiring has been proposed (for example, Patent Documents 1 to 3). 3).

  On the other hand, from the viewpoint of improving the workability of miniaturized and thinned semiconductor elements, a method of using a molded body in which a plurality of semiconductor elements are sealed with plastic has been proposed (for example, see Patent Document 4). .

Japanese Patent No. 3616615 JP 2001-244372 A Japanese Patent Laid-Open No. 2001-127095 US Patent Application Publication No. 2007/205513

  The methods described in Patent Documents 1 to 3 can secure a wider rewiring area than rewiring on a wafer, and can cope with the increase in the number of pins of a semiconductor element.

  On the other hand, the method described in Patent Document 4 is expected to improve the productivity of semiconductor devices that are becoming smaller and thinner.

  However, the present inventors have examined a combination of the above techniques, and found that there is a problem to be improved in order to sufficiently cope with downsizing and thinning of semiconductor devices and miniaturization of semiconductor elements.

  First, a method for manufacturing a semiconductor device combining the above-described conventional techniques will be described with reference to the drawings. 1 to 3 are schematic end views for explaining an example of the manufacturing method according to the above. The semiconductor device 20 shown in FIG. 3 (n) is obtained through the following steps.

  A temporary fixing film is bonded to one side of the support to prepare a support 1 provided with a temporary fixing layer 2 (temporary fixing film) (see FIG. 1A). Next, the semiconductor element 3 is arranged at a predetermined interval so that the active surface (surface; the surface on which the circuit is formed) of the semiconductor element is bonded to the temporary fixing layer 2 and temporarily fixed (see FIG. 1B). A semiconductor sealing member 4 is prepared and then sealed with a sealing material so as to cover the semiconductor element 3 to form a first insulating layer 4 (see FIGS. 1C and 1D). After sealing, the sealing material is heated at a predetermined temperature and time, and post-curing is performed. Next, the substrate is placed on a hot plate set at a predetermined temperature, and the support is removed (see FIG. 1 (e)). Next, the temporary fixing film 2 is peeled off to expose the active surface (surface) of the semiconductor element (see FIG. 1 (f)).

  Next, for example, a coating-type photosensitive resin composition is spin-coated on the active surface of the semiconductor element and dried on a hot plate set to a predetermined temperature to form the second insulating layer 5 (FIG. 2). (Refer to (f)). Next, a second insulating layer 5 'having an opening reaching the active surface of the semiconductor element is provided by exposing and developing a predetermined portion and post-curing in an oven (see FIG. 2G). Next, a seed layer 6 is formed on the second insulating layer 5 ′ by sputtering (see FIG. 2H). Next, a circuit forming resist is laminated on the seed layer 6, and a predetermined portion is exposed and developed to form a resist pattern 7 (see FIG. 2 (i)). Next, a wiring pattern 8 is formed by electroplating (see FIG. 2 (j)).

  Next, the resist pattern 7 is removed by a peeling solution (see FIG. 3 (k)). Next, portions of the seed layer 6 other than the wiring pattern are removed by etching (see FIG. 3L). Next, the photosensitive resin composition is spin-coated again on the second insulating layer 5 ′ and the wiring pattern 8, and dried on a hot plate set at a predetermined temperature (for example, about 80 ° C.). A third insulating layer 9 having an opening reaching the wiring pattern is formed by performing exposure and development processing and post-curing in an oven (see FIG. 3M). Next, a solder ball is mounted on the opening of the third insulating layer 9 by reflow mounting, and the semiconductor device 20 is manufactured by dicing into pieces (see FIG. 3 (n)).

  In the semiconductor device manufactured by such a method, since the passive surface (back surface) of the semiconductor element is sealed, warpage is likely to occur particularly in a process involving heating, and it is difficult to cope with further thinning. It turned out to be.

  The present invention has been made in view of the above problems, and a semiconductor capable of manufacturing a semiconductor device in which the occurrence of warpage is sufficiently suppressed by using a semiconductor sealing member capable of sufficiently embedding a semiconductor. An object of the present invention is to provide a device manufacturing method and a semiconductor device.

In order to solve the above-described problem, one aspect of the present invention provides a support provided with a temporary fixing layer, one or more semiconductor elements each having an active surface and a passive surface on the side opposite to the active surface, the temporary fixing layer. And a step (I) of temporarily fixing the semiconductor element and the active surface of the semiconductor element so as to be bonded together,
Sealing the semiconductor element temporarily fixed with the semiconductor sealing member according to the present invention to form a first insulating layer covering the passive surface side of the semiconductor element (II);
The support element and the temporary fixing layer are peeled off from the semiconductor element and the first insulating layer that seals the semiconductor element, and the semiconductor element and the semiconductor element that have the active surface exposed are sealed. Step (III) for obtaining one insulating layer;
Forming a second insulating layer having an opening reaching the active surface of the semiconductor element on the active surface side of the semiconductor element with the active surface exposed and the first insulating layer sealing the semiconductor element ( IV)
Forming a seed layer on a part of the active surface of the semiconductor element and the second insulating layer;
A step (VI) of forming a wiring pattern on the seed layer;
A step (VII) of removing a portion of the seed layer other than the wiring pattern provided;
Forming a third insulating layer having an opening reaching the wiring pattern on the wiring pattern and the second insulating layer (VIII);
Forming an external connection terminal in the opening (IX);
With
The semiconductor sealing member is a thermosetting resin film containing a thermosetting resin component containing a thermosetting resin and a curing agent, an inorganic filler, and a crosslinked rubber,
The content of the crosslinked rubber in the thermosetting resin film is 0.5% by volume or more based on the capacity of the thermosetting resin component,
The thermosetting resin film has a minimum melt viscosity of 500 Pa · s or less and an average coefficient of thermal expansion at 25 to 140 ° C. after curing of 12 × 10 ⁻⁶ / ° C. or less.
A method for manufacturing a semiconductor device is provided.

  According to the above method for manufacturing a semiconductor device, by using the specific thermosetting resin film as a semiconductor sealing member, it is possible to sufficiently embed a semiconductor element and to prevent a warped from being generated. In the subsequent steps, the occurrence of warpage can be suppressed, and the semiconductor device can be manufactured efficiently. As a result, the semiconductor device can be thinned.

According to another aspect of the present invention, a support provided with a temporary fixing layer includes an active surface and one or more semiconductor elements having a passive surface on the opposite side of the active surface, and the temporary fixing layer and the active element of the semiconductor element. A step (I) of temporarily fixing the surface to be bonded;
Sealing the semiconductor element temporarily fixed with the semiconductor sealing member according to the present invention to form a first insulating layer covering the passive surface side of the semiconductor element (II);
The support element and the temporary fixing layer are peeled off from the semiconductor element and the first insulating layer that seals the semiconductor element, and the semiconductor element and the semiconductor element that have the active surface exposed are sealed. Step (III) for obtaining one insulating layer;
Forming a second insulating layer having an opening reaching the active surface of the semiconductor element on the active surface side of the semiconductor element with the active surface exposed and the first insulating layer sealing the semiconductor element ( IV)
Forming a seed layer on a part of the active surface of the semiconductor element and the second insulating layer;
A step (VI) of forming a wiring pattern on the seed layer;
A step (VII) of removing a portion of the seed layer other than the wiring pattern provided;
Forming a third insulating layer having an opening reaching the wiring pattern on the wiring pattern and the second insulating layer (VIII);
Forming an external connection terminal in the opening (IX);
With
The semiconductor sealing member is a thermosetting resin film containing a thermosetting resin component containing a thermosetting resin and a curing agent, an inorganic filler, and a crosslinked rubber,
The content of the inorganic filler in the thermosetting resin film is 75 to 83% by volume based on the capacity of the thermosetting resin component, and the content of the crosslinked rubber in the thermosetting resin film is Based on the capacity of the thermosetting resin component, it is 0.5% by volume or more.
A method for manufacturing a semiconductor device is provided.

  According to the above method for manufacturing a semiconductor device, by using the specific thermosetting resin film as a semiconductor sealing member, it is possible to sufficiently embed a semiconductor element and to prevent a warped from being generated. In the subsequent steps, the occurrence of warpage can be suppressed, and the semiconductor device can be manufactured efficiently. As a result, the semiconductor device can be thinned.

  The present invention also provides a semiconductor device obtained by the method for manufacturing a semiconductor device according to the present invention.

  According to the present invention, it is possible to provide a semiconductor device manufacturing method capable of manufacturing a semiconductor device in which the occurrence of warpage is sufficiently suppressed by using a semiconductor sealing member that can sufficiently embed a semiconductor. it can.

  According to the present invention, it is possible to reduce the thickness and to efficiently manufacture a wafer level semiconductor device in which warpage is sufficiently suppressed.

  The semiconductor device obtained by the present invention is suitable for electronic devices such as smartphones and tablet terminals whose functions and functions are increasing.

It is a model end view for demonstrating an example of the manufacturing method of a semiconductor device. FIG. 2 is a schematic end view showing the continuation of FIG. 1. FIG. 3 is a schematic end view showing the continuation of FIG. 2.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. In the following description, the same or corresponding parts are denoted by the same reference numerals, and redundant description is omitted. Further, the positional relationship such as up, down, left and right is based on the positional relationship shown in the drawings unless otherwise specified. Further, the dimensional ratios in the drawings are not limited to the illustrated ratios.

In the method for manufacturing a semiconductor device according to the present embodiment, a support provided with a temporarily fixed layer includes an active surface and one or more semiconductor elements having a passive surface on the opposite side of the active surface, the temporarily fixed layer and the semiconductor. A step (I) of temporarily fixing the active surface of the element so as to be bonded;
Sealing the temporarily fixed semiconductor element with a semiconductor sealing member to form a first insulating layer covering the passive surface side of the semiconductor element (II);
The support element and the temporary fixing layer are peeled off from the semiconductor element and the first insulating layer that seals the semiconductor element, and the semiconductor element and the semiconductor element that have the active surface exposed are sealed. Step (III) for obtaining one insulating layer;
Forming a second insulating layer having an opening reaching the active surface of the semiconductor element on the active surface side of the semiconductor element with the active surface exposed and the first insulating layer sealing the semiconductor element ( IV)
Forming a seed layer on a part of the active surface of the semiconductor element and the second insulating layer;
A step (VI) of forming a wiring pattern on the seed layer;
A step (VII) of removing a portion of the seed layer other than the wiring pattern provided;
Forming a third insulating layer having an opening reaching the wiring pattern on the wiring pattern and the second insulating layer (VIII);
Forming an external connection terminal in the opening (IX);
Is provided.

  A method for manufacturing a semiconductor device according to the present embodiment will be described with reference to FIGS.

  As the step (I), for example, a support 1 provided with a temporary fixing layer 2 is prepared by pasting a temporary fixing film on one side of the support 1 (FIG. 1A), and then a semiconductor. There is a step in which the element 3 is arranged and temporarily fixed at a predetermined interval so that the active surface (front surface) of the semiconductor device 3 is bonded to the temporary fixing layer 2 (FIG. 1B).

  The material of the support 1 is not particularly limited, but a SUS plate or a silicon wafer that is small in dimensional change due to heat is suitable. Similarly, the thickness is not particularly limited, but a thickness of 0.5 mm or more capable of suppressing warpage is preferable.

  The temporary fixing film 2 is not particularly limited, and any commercially available material may be used. When heat resistance is required for the temporarily fixing film, for example, an amide bond or an imide obtained by a polycondensation reaction between a diamine compound described in JP 2010-254808 A and an aromatic polycarboxylic acid compound A polymer film having a specific structure having a bond can be used.

  The semiconductor element 3 is not particularly limited, and a known element can be used. In the present embodiment, for example, a semiconductor element having a thickness of 400 μm or less can be used. Further, the number of semiconductor elements fixed on the support can be two or more, and it is preferable to provide a gap between the semiconductor elements from the viewpoint of resin filling properties.

  As the step (II), a thermosetting resin film is prepared as the semiconductor sealing member 4 and disposed so as to cover the passive surface side of the semiconductor element 3 (FIG. 1C), and these are known vacuum laminators. Then, the first insulating layer 4 for sealing the semiconductor element 3 is formed by bonding using a roll laminator or a press machine (FIG. 1D).

  The sealing temperature at this time is preferably 50 to 140 ° C, more preferably 70 to 100 ° C. By setting the sealing temperature in such a range, the semiconductor element can be sufficiently embedded with the resin, and after the sealing, the semiconductor element is sealed with the above member from the structure obtained by sealing the semiconductor element. It can be prevented that it is difficult to peel off the fixed layer.

  The sealing time is preferably 10 to 300 seconds, more preferably 30 to 120 seconds. By setting the sealing time in such a range, the semiconductor element can be sufficiently embedded with resin, and a decrease in productivity and an increase in cost can be suppressed.

  The sealing pressure is preferably 0.2 to 2.0 MPa, more preferably 0.2 to 1.0 MPa. By setting the sealing pressure in such a range, the semiconductor element can be sufficiently filled with resin, and an insulating layer having a sufficient thickness can be formed on the passive surface of the semiconductor element 3.

  In the present embodiment, post-curing of the first insulating layer can be performed at a predetermined temperature and time. Although post-curing temperature is not specifically limited, Preferably it is 120-200 degreeC, More preferably, it is 150-180 degreeC. The post-curing time is not particularly limited, but is preferably 15 to 180 minutes, more preferably 30 to 120 minutes.

  The thickness T3 of the first insulating layer can be 25 μm to 500 μm, and preferably 100 μm to 300 μm. When T3 is 500 μm or less, the resulting semiconductor device tends to be thin. On the other hand, when T3 is 25 μm or more, the semiconductor element 3 also has an appropriate thickness accordingly, and therefore, when the semiconductor element 3 is sealed with the first insulating layer, cracking of the semiconductor element 3 tends to be suppressed. is there.

  In the present embodiment, the difference (T3−T1) between the thickness T3 of the first insulating layer and the thickness T1 of the semiconductor element is preferably 30 to 200 μm, more preferably 40 to 150 μm, and 50 More preferably, it is ˜100 μm.

  The thickness T2 of the semiconductor sealing member 4 used in the present embodiment can be set to 20 to 190 μm, and is set so that the thickness T3 of the first insulating layer and the thickness T1 of the semiconductor element satisfy the above relationship. Is preferred.

  As the step (III), for example, as shown in FIGS. 1 (e) and (f), the composition obtained in the step (II) is placed on a hot plate set at a predetermined temperature, and the support 1 and temporary A step of exposing the active surface (surface) of the semiconductor element by removing the fixing layer (temporary fixing film) 2 may be mentioned. The temperature of the hot plate is not particularly limited, and a temperature suitable for the characteristics of the temporary fixing film can be selected. The support 1 and the temporary fixing layer (temporary fixing film) 2 may be removed in this order, or may be removed together. Moreover, you may perform peeling of a support body and the film for temporary fixing before thermosetting of a 1st insulating layer.

  As the step (IV), for example, a thermosetting property is formed on the active surface side of the semiconductor element 3 of the structure including the semiconductor element 3 with the active surface exposed and the first insulating layer 4 sealing the semiconductor element. A step of forming the second insulating layer 5 made of the resin composition (FIG. 2 (f)) and then grinding the surface of the second insulating layer by alkali treatment provide an opening to the semiconductor element 3. One including a process (FIG. 2 (g)) is mentioned.

  In the step of forming the second insulating layer 5, in the case where the thermosetting resin composition is a liquid or a varnish obtained by dissolving a resin with a solvent, the second insulating layer 5 is subjected to a coating step and a semi-curing or drying step. An insulating layer can be formed. In the coating step, coating can be performed using a coater or printing method. The method of the coater is not particularly limited, and a die, comma, dip, spin, or the like can be used. In the step of curing or drying, a hot plate or a drying furnace can be used. In the case where the thermosetting resin composition is a film, a second insulation is provided on the active surface (front surface) side of the semiconductor element 3 of the above-described composition through a step of bonding with a known vacuum laminator, roll laminator, press, or the like. Layers can be formed. When the thermosetting resin composition is a film, the pressure, temperature, and time of the laminator in the laminating step are not particularly limited, but it is preferable to select conditions that do not cause air entrapment or the like.

  The alkali treatment liquid used in the alkali treatment is not particularly limited, and a desmear treatment liquid, a resist stripping liquid, or the like can be used. The pH can be adjusted according to the opening diameter. A desmear process can be implemented by immersing a to-be-processed board | substrate in liquid mixture, such as a sodium permanganate liquid, sodium hydroxide liquid, potassium permanganate liquid, chromium liquid, a sulfuric acid, for example. Specifically, after the substrate to be treated is swelled with hot water or a predetermined swelling liquid, residues, etc. are removed with sodium permanganate liquid, etc., and reduction (neutralization) is performed, followed by washing with water and washing with hot water. , Dry. If sufficient effects of roughening and residue removal are not obtained even if the treatment is performed once, the treatment may be performed a plurality of times. The desmear process is not limited to the above. Further, after the desmear treatment, the thermosetting resin composition may be thermally cured again. Although the effect of the second thermosetting is different depending on the thermosetting resin used, not only can the thermosetting be performed sufficiently to reduce unreacted substances and the glass transition temperature, but also lower the thermal expansion. Because you can.

  Examples of the step (V) include a step of providing the seed layer 6 on the second insulating layer 5 ′ provided with the opening by an electroless copper plating process (FIG. 2H). The thickness of the seed layer 6 is not particularly limited, but is preferably 0.1 to 1.0 μm. The seed layer 6 may be formed by a sputtering method in addition to the electroless copper plating method, and various formation layers may be selected such as depositing Ti before depositing copper.

  Step (VI) can be performed, for example, by the following steps.

  First, a circuit forming resist is laminated on the seed layer 6, and then an exposure process is performed in which a predetermined portion of the circuit forming resist is exposed by irradiating actinic rays through a mask pattern, and the circuit forming resist in the exposed portion is photocured. Then, a resist pattern 7 for rewiring is formed by performing development processing for removing unexposed portions (FIG. 2 (i)).

A known light source can be used as the actinic ray light source. For example, a light source that effectively emits ultraviolet rays, such as a carbon arc lamp, a mercury vapor arc lamp, an ultrahigh pressure mercury lamp, a high pressure mercury lamp, and a xenon lamp can be used. Further, direct drawing direct laser exposure may be used. The amount of exposure varies depending on the apparatus used and the composition of the resist for circuit formation, but is preferably 10 to 600 mJ / cm ² , more preferably 20 to 400 mJ / cm ² . When the exposure amount is 10 mJ / cm ² or more, photocuring is rarely insufficient. On the other hand, when it is 600 mJ / cm ² or less, photocuring is rarely excessive and the opening shape of the resist pattern 7 is stabilized. Tend to be obtained. The resist for circuit formation can be either liquid or film. In the case of liquid, it can be applied using a printing machine. In the case of a film, it can be attached using a roll laminator or a vacuum laminator.

  As the developer used for removing the resist for circuit formation other than the exposed portion, for example, an alkaline developer such as a dilute solution of sodium carbonate (1 to 5% by mass aqueous solution) at 20 to 50 ° C. is used. Development can be performed by a known method such as spraying, rocking dipping, brushing, and scraping.

  Next, a copper wiring pattern 8 is formed on the seed layer 6 by electroplating (FIG. 2 (j)). The wiring pattern 8 preferably has a thickness of 1 to 20 μm. The wiring pattern 8 may be formed by a known method other than the electroplating method.

  Next, the resist pattern 7 is peeled and removed by a peeling solution (FIG. 3 (k)). The peeling solution is not particularly limited and a known one can be used. For example, an alkaline aqueous solution such as an aqueous sodium carbonate solution can be used.

  Examples of the step (VII) include a step of removing the seed layer 6 exposed on the surface of the first insulating layer 5 ′ with an etching solution (FIG. 3L). The etching solution is not particularly limited, and known ones can be used, and commercially available etching solutions that are commercially available can be used.

  As the step (VIII), for example, an insulating layer made of a thermosetting resin composition is formed on the second insulating layer 5 ′ and the wiring pattern 8, and an alkali treatment is performed to open the wiring pattern 8. There is a step of providing the third insulating layer 9 having (FIG. 3M). The method for forming the insulating layer and the alkali treatment are the same as in the case of the second insulating layer.

  Step (IX) can include a step of performing electroless nickel plating and gold plating 12 on the wiring pattern 8 exposed from the opening provided in the third insulating layer. The plating thickness is not particularly limited, but the nickel plating thickness is preferably about 1 to 10 μm, and the gold plating thickness is preferably about 0.1 to 0.5 μm.

  After the above process, a conductive material as the external connection terminal 10 can be formed in the opening of the third insulating layer. The conductive material is not particularly limited, but it is preferable to use Sn-Ag or Sn-Ag-Cu solder from the viewpoint of environmental protection. Cu posts may be formed using a circuit forming resist.

  In the present embodiment, after the step (IX), the semiconductor device 20 shown in FIG. 3N can be obtained by dicing into pieces using a dicer.

  The method for manufacturing a semiconductor device according to this embodiment is particularly suitable as a method for manufacturing a wafer level semiconductor device that is becoming smaller and thinner. In addition, the semiconductor device obtained by the method of this embodiment is suitable for electronic devices such as smartphones, tablet terminals, and wearable terminals that are becoming increasingly functional and multifunctional.

  Next, the thermosetting resin film according to this embodiment will be described in detail as a semiconductor sealing member used for manufacturing the semiconductor device described above.

  The thermosetting resin film of the present embodiment contains a thermosetting resin component containing a thermosetting resin and a curing agent, an inorganic filler, and a crosslinked rubber.

  As the thermosetting resin, at least one selected from the group consisting of an epoxy resin, a cyanate resin, a phenol resin, a polyamideimide resin, and a thermosetting polyimide resin can be used.

  As the epoxy resin, an epoxy resin having two or more glycidyl groups in the molecule is preferable.

  The epoxy resin having two or more glycidyl groups can be used without any particular limitation, but is preferably bisphenol A type epoxy resin, bisphenol F type epoxy resin, novolac phenol type epoxy resin, biphenyl type epoxy. Bisphenol S type epoxy resin such as resin, bisphenol S diglycidyl ether, naphthalene type epoxy resin, dicyclopentadiene type epoxy resin, bixylenol type epoxy resin such as bixylenol diglycidyl ether, hydrogenated bisphenol A glycidyl ether, etc. Examples thereof include bisphenol A type epoxy resins and dibasic acid-modified diglycidyl ether type epoxy resins thereof. These can be used alone or in combination of two or more.

  Commercially available epoxy resins include naphthalene type epoxy resins such as EXA4700 (tetrafunctional naphthalene type epoxy resin) manufactured by DIC Corporation, NC-7000 (polyfunctional solid epoxy resin containing naphthalene skeleton) manufactured by Nippon Kayaku Co., Ltd .; Nippon Kayaku Epoxidized product of a condensation product of phenols such as EPPN-502H (trisphenol epoxy resin) and an aromatic aldehyde having a phenolic hydroxyl group (trisphenol type epoxy resin); Epicron HP-7200H (dicyclo) Dicyclopentadiene aralkyl epoxy resin such as pentadiene skeleton-containing polyfunctional solid epoxy resin); biphenyl aralkyl epoxy resin such as NC-3000H (biphenyl skeleton-containing polyfunctional solid epoxy resin) manufactured by Nippon Kayaku Co., Ltd .; manufactured by DIC Corporation Novolak type epoxy resins such as Piclone N660, Epicron N690, Nippon Kayaku Co., Ltd. EOCN-104S; Tris (2,3-epoxypropyl) isocyanurate such as TEPIC made by Nissan Chemical Industries, Epicron 860 made by DIC Corporation, Epicron 900-IM, Epicron EXA-4816, Epicron EXA-4822, Araldite AER280 manufactured by Asahi Chiba Corporation, Epototo YD-134 manufactured by Tohto Kasei Co., Ltd. JER834 manufactured by Mitsubishi Chemical Corporation, JER872, ELA-134 manufactured by Sumitomo Chemical Co., Ltd. Bisphenol A type epoxy resins such as DIC Corporation Epiklon HP-4032, etc .; naphthalene type epoxy resins such as DIC Corporation Epicron N-740, etc .; Epoxy resin of a condensate of chill aldehyde; and Nippon Kayaku Co., Ltd. EPPN-500 series can be cited. These epoxy resins can be used individually by 1 type or in combination of 2 or more types.

  Among the above epoxy resins, biphenyl aralkyl type epoxy resins such as NC-3000H (biphenyl skeleton-containing polyfunctional solid epoxy resin) manufactured by Nippon Kayaku Co., Ltd. are preferable in terms of excellent adhesion and insulation with copper, It is more preferable to use Nippon Kayaku Co., Ltd. EPPN-500 series in terms of high crosslinking density and high Tg.

  The content of the epoxy resin is preferably 30 to 90 parts by mass, and more preferably 40 to 80 parts by mass with respect to 100 parts by mass of the resin component excluding the inorganic filler component and the crosslinked rubber component.

  As the curing agent combined with the epoxy resin, various conventionally known epoxy resin curing agents or epoxy resin curing accelerators can be blended. For example, phenol resins, imidazole compounds, acid anhydrides, aliphatic amines, alicyclic polyamines, aromatic polyamines, tertiary amines, dicyandiamide, guanidines, or epoxy adducts or microencapsulated products thereof, triphenyl Organic phosphine compounds / organic boron compounds such as phosphine, tetraphenylphosphonium, tetraphenylborate, DBU (1,8-diazabicyclo (4.5.0) undecene-7) or derivatives thereof, curing agent or curing Regardless of the accelerator, known and commonly used ones may be used alone or in combination of two or more.

  Specifically, 4,4′-diaminodiphenylsulfone, 4,4′-bis (4-aminophenoxy) biphenyl, 2,2-bis [4- (4-aminophenoxy) phenyl] propane, 1,3- Bis (4-aminophenoxy) benzene, 1,4-bis (4-aminophenoxy) benzene, trimethylenebis (4-aminobenzoate), 3,3′-dimethyl-4,4′-diaminobiphenyl, 2,2 '-Dimethyl-4,4'-diaminobiphenyl, 4,4'-diaminodiphenyl ether, 3,4'-diaminodiphenyl ether, bis [4- (4-aminophenoxy) phenyl] sulfone, bis [4- (3-amino Phenoxy) phenyl] sulfone, 9,9′-bis (4-aminophenyl) fluorene, 2,2-bis [4- (4-aminophen) ) Phenyl] can be exemplified hexafluoropropane and the like. These can be used alone or in combination of two or more.

  Said hardening | curing agent can be used in the ratio of 1-60 mass parts with respect to 100 mass parts of epoxy resins, and it is preferable to use it in the ratio of 5-25 mass parts.

  The thermosetting polyimide resin preferably contains a maleimide compound having at least two unsaturated N-substituted maleimide groups in the molecular structure. Specifically, for example, N, N′-ethylene bismaleimide, N, N′-hexamethylene bismaleimide, N, N ′-(1,3-phenylene) bismaleimide, N, N ′-[1,3 -(2-methylphenylene)] bismaleimide, N, N '-[1,3- (4-methylphenylene)] bismaleimide, N, N'-(1,4-phenylene) bismaleimide, bis (4- Maleimidophenyl) methane, bis (3-methyl-4-maleimidophenyl) methane, 3,3-dimethyl-5,5-diethyl-4,4-diphenylmethane bismaleimide, bis (4-maleimidophenyl) ether, bis (4 -Maleimidophenyl) sulfone, bis (4-maleimidophenyl) sulfide, bis (4-maleimidophenyl) ketone, bis (4-maleimidocyclohexane) Syl) methane, 1,4-bis (4-maleimidophenyl) cyclohexane, 1,4-bis (maleimidomethyl) cyclohexane, 1,4-bis (maleimidomethyl) benzene, 1,3-bis (4-maleimidophenoxy) Benzene, 1,3-bis (3-maleimidophenoxy) benzene, bis [4- (3-maleimidophenoxy) phenyl] methane, bis [4- (4-maleimidophenoxy) phenyl] methane, 1,1-bis [4 -(3-maleimidophenoxy) phenyl] ethane, 1,1-bis [4- (4-maleimidophenoxy) phenyl] ethane, 1,2-bis [4- (3-maleimidophenoxy) phenyl] ethane, 1,2 -Bis [4- (4-maleimidophenoxy) phenyl] ethane, 2,2-bis [4- (3-maleimidophene) Xyl) phenyl] propane, 2,2-bis [4- (4-maleimidophenoxy) phenyl] propane, 2,2-bis [4- (3-maleimidophenoxy) phenyl] butane, 2,2-bis [4- (4-maleimidophenoxy) phenyl] butane, 2,2-bis [4- (3-maleimidophenoxy) phenyl] -1,1,1,3,3,3-hexafluoropropane, 2,2-bis [4 -(4-maleimidophenoxy) phenyl] -1,1,1,3,3,3-hexafluoropropane, 4,4-bis (3-maleimidophenoxy) biphenyl, 4,4-bis (4-maleimidophenoxy) Biphenyl, bis [4- (3-maleimidophenoxy) phenyl] ketone, bis [4- (4-maleimidophenoxy) phenyl] ketone, 2,2′-bis (4 -Maleimidophenyl) disulfide, bis (4-maleimidophenyl) disulfide, bis [4- (3-maleimidophenoxy) phenyl] sulfide, bis [4- (4-maleimidophenoxy) phenyl] sulfide, bis [4- (3- Maleimidophenoxy) phenyl] sulfoxide, bis [4- (4-maleimidophenoxy) phenyl] sulfoxide, bis [4- (3-maleimidophenoxy) phenyl] sulfone, bis [4- (4-maleimidophenoxy) phenyl] sulfone, bis [4- (3-maleimidophenoxy) phenyl] ether, bis [4- (4-maleimidophenoxy) phenyl] ether, 1,4-bis [4- (4-maleimidophenoxy) -α, α-dimethylbenzyl) benzene 1,3-bis [4- (4-male Imidophenoxy) -alpha, alpha-dimethylbenzyl] benzene, 1,4-bis [4- (3-maleimidophenoxy) -α, α-dimethylbenzyl] benzene, 1,3-bis [4- (3-maleimidophenoxy) ) -Α, α-dimethylbenzyl] benzene, 1,4-bis [4- (4-maleimidophenoxy) -3,5-dimethyl-α, α-dimethylbenzyl] benzene, 1,3-bis [4- ( 4-maleimidophenoxy) -3,5-dimethyl-α, α-dimethylbenzyl] benzene, 1,4-bis [4- (3-maleimidophenoxy) -3,5-dimethyl-α, α-dimethylbenzyl] benzene 1,3-bis [4- (3-maleimidophenoxy) -3,5-dimethyl-α, α-dimethylbenzyl] benzene, polyphenylmethanemaleimide, etc. Can be mentioned. These maleimide compounds may be used alone or in admixture of two or more.

  The content of the thermosetting polyimide resin is preferably 0.25 to 40 parts by mass and more preferably 0.5 to 30 parts by mass with respect to 100 parts by mass of the resin component excluding the inorganic filler component. preferable.

  As the polymerization catalyst for the maleimide compound, known polymerization catalysts for bismaleimide resin compositions can be used. For example, imidazoles, tertiary amines, quaternary ammonium salts, boron trifluoride amine complexes, organo Examples thereof include ion catalysts such as phosphine and organophosphonium salts, and radical polymerization initiators such as organic peroxides, hydroperoxides, and azoisobutyronitrile. Although the addition amount of a polymerization catalyst should just be determined according to the objective, it is preferable to set it as 0.01-3 mass% with respect to all the resin components from the surface of stability of a bismaleimide resin composition.

  As the thermosetting resin used in the present embodiment, it is preferable to use one or more of polyimide resin, cyanate resin, and polyamideimide resin. Moreover, you may use a polyimide resin, cyanate resin, polyamideimide resin, and various carboxylic acid containing resin as another resin with which an epoxy resin is made to react. Examples of the polyamide-imide resin include “Bilomax HR11NN”, “Bilomax HR12N2”, and “Bilomax HR16NN” manufactured by Toyobo Co., Ltd. Examples of the carboxylic acid-containing resin include acrylic resins, acid-modified epoxy acrylates, and acid-containing urethane resins.

  The content of another resin (curing agent) to be reacted with the epoxy resin is preferably 5 to 50 parts by mass, and 10 to 40 parts by mass with respect to 100 parts by mass of the resin component excluding the inorganic filler component. It is more preferable.

  As the inorganic filler, all conventionally known inorganic fillers can be used and are not limited to specific ones. For example, extender pigments such as barium sulfate, barium titanate, amorphous silica, crystalline silica, fused silica, spherical silica, talc, clay, magnesium carbonate, calcium carbonate, aluminum oxide, aluminum hydroxide, silicon nitride, aluminum nitride, , Copper, tin, zinc, nickel, silver, palladium, aluminum, iron, cobalt, gold, platinum, and other metal powders.

  The thermosetting resin film according to the present embodiment is selected from the group consisting of an epoxy resin, a cyanate resin, a phenol resin, a polyamideimide resin, and a thermosetting polyimide resin from the viewpoint of suppressing warpage during the semiconductor device manufacturing process. It is preferable to include at least one resin and an inorganic filler having a maximum particle size of 20 μm or less and an average particle size of 5 μm or less. The inorganic filler preferably has a maximum particle size of 10 μm or less and an average particle size of 3 μm or less.

  When a silica filler is used as the inorganic filler, it is preferable to use a silane coupling agent in order to improve the dispersibility of the filler in the resin. The maximum particle size of the silica filler is preferably 5 μm or less, and more preferably 1 μm or less.

  As the silane coupling agent, generally available ones can be used, for example, alkyl silane, alkoxy silane, vinyl silane, epoxy silane, amino silane, acrylic silane, methacryl silane, mercapto silane, sulfide silane, isocyanate silane, Sulfur silane, styryl silane, alkylchlorosilane, and the like can be used.

  Specific compound names include methyltrimethoxysilane, dimethyldimethoxysilane, trimethylmethoxysilane, methyltriethoxysilane, methyltriphenoxysilane, ethyltrimethoxysilane, n-propyltrimethoxysilane, diisopropyldimethoxysilane, isobutyltrimethoxy. Silane, diisobutyldimethoxysilane, isobutyltriethoxysilane, n-hexyltrimethoxysilane, n-hexyltriethoxysilane, cyclohexylmethyldimethoxysilane, n-octyltriethoxysilane, n-dodecylmethoxysilane, phenyltrimethoxysilane, diphenyldimethoxy Silane, triphenylsilanol, methyltrichlorosilane, dimethyldichlorosilane, trimethylchlorosilane, n-octyldi Tylchlorosilane, tetraethoxysilane, 3-aminopropyltrimethoxysilane, 3-aminopropyltriethoxysilane, 3- (2-aminoethyl) aminopropyltrimethoxysilane, 3- (2-aminoethyl) aminopropylmethyldimethoxysilane , 3-phenylaminopropyltrimethoxysilane, 3-glycidoxypropyltrimethoxysilane, 3-glycidoxypropylmethyldimethoxysilane, 3-glycidoxypropyltriethoxysilane, 3-glycidoxypropylmethyldiethoxysilane Bis (3- (triethoxysilyl) propyl) disulfide, bis (3- (triethoxysilyl) propyl) tetrasulfide, vinyltriacetoxysilane, vinyltrimethoxysilane, vinyltriethoxysilane, Lutriisopropoxysilane, allyltrimethoxysilane, diallyldimethylsilane, 3-methacryloxypropyltrimethoxysilane, 3-methacryloxypropylmethyldimethoxysilane, 3-methacryloxypropyltriethoxysilane, 3-mercaptopropyltrimethoxysilane, 3 -Mercaptopropylmethyldimethoxysilane, 3-mercaptopropyltriethoxysilane, N- (1,3-dimethylbutylidene) -3-aminopropyltriethoxysilane, aminosilane and the like.

  The content of the inorganic filler contained in the thermosetting resin film is preferably 75 to 83% by volume, more preferably 76 to 82% by volume, and 78 to 80% by volume based on the volume of the thermosetting resin component. Further preferred. When the content of the inorganic filler is 75% by volume or more, the warp of the semiconductor device tends to be effectively suppressed. When the content of the inorganic filler is 83% by volume or less, the fluidity of the resin can be secured and the semiconductor element tends to be sufficiently sealed.

  The average particle size of the inorganic filler is preferably 5 μm or less, more preferably 3 μm or less. When the average particle size of the inorganic filler is 5 μm or less, the roughness of the surface after plating tends to be small, and the formation of a fine pattern tends to be good in the subsequent photolithography process.

  As the crosslinked rubber, known elastomer components can be used without limitation, but styrene butadiene particles, silicone powder, silicone oil, and silicone oligomer are preferably used from the viewpoints of dispersibility and solubility. These may be used alone or in combination of two or more.

  The average particle size of the crosslinked rubber is preferably 0.05 to 90 μm, more preferably 0.08 to 70 μm, and still more preferably 0.1 to 50 μm from the viewpoint of chip embedding.

  The content of the crosslinked rubber contained in the thermosetting resin film is preferably 0.5% by volume or more, more preferably 0.5 to 2.0% by volume, based on the capacity of the thermosetting resin component. 7-1.7 volume% is still more preferable, and 0.9-1.4 volume% is especially preferable.

  The thermosetting resin film according to this embodiment preferably has a minimum melt viscosity of 500 Pa · s or less, more preferably 50 to 400 Pa · s, and still more preferably 100 to 300 Pa · s. The minimum melt viscosity of the thermosetting resin film can be adjusted by, for example, a method of setting the blending amount of the inorganic filler and the crosslinked rubber within the above-described range.

  The minimum melt viscosity means the viscosity when the thermosetting resin film is melted before the start of curing. Specifically, it can be determined by the following procedure. A thermosetting resin film 0.6 g is formed into a tablet having a diameter of 2 cm using a compression molding machine. Using this rheometer (ARES-2KSTD manufactured by Rheometric Scientific), measure the viscosity while raising the temperature under the conditions of a frequency of 0.1 Hz, a heating rate of 5 ° C./minute, and a measurement mode of Dynamic Temperature Ramp. . The temperature is raised from 20 ° C. to 200 ° C., and the lowest viscosity is set as the minimum melt viscosity.

Moreover, it is preferable that the average thermal expansion coefficient in 25-140 degreeC after hardening of the thermosetting resin film which concerns on this embodiment is 12 * 10 < ^-6 > / degrees C or less, and is 10 * 10 < ^-6 > / degrees C or less. More preferably, it is more preferably 8 × 10 ⁻⁶ / ° C. or less. The average coefficient of thermal expansion of the thermosetting resin film can be adjusted, for example, by a method such as setting the blended amount of the crosslinked rubber within the above-described range.

  The average coefficient of thermal expansion at 25 to 140 ° C. after curing is the average value of the coefficient of thermal expansion at 25 to 140 ° C., and [{(sample length at 140 ° C.) − (Sample length at 25 ° C.)} / (25 Sample length at ° C.)] / (140 ° C.-25 ° C.). Specifically, it can be determined by the following procedure. A thermosetting resin film is cut into a predetermined size (length: 37 mm × width: 4 mm × thickness: 0.025 mm, and cured for 2 hours at 140 ° C. in a clean oven (Espec Corp.). Thermal expansion is measured under the conditions of a temperature range of 25 to 140 ° C., a heating rate of 5 ° C./min, and a load of 0.5 MPa using a rate measuring device (manufactured by Seiko Instruments Inc., thermal analysis system TMASS6000).

  The thermosetting resin film according to the present embodiment preferably has an elastic modulus at 25 ° C. of 8 to 20 GPa and more preferably 10 to 18 GPa from the viewpoint of suppressing warpage during the semiconductor device manufacturing process. More preferably, it is 12-16 GPa.

  The elastic modulus at 25 ° C. means the elastic modulus at 25 ° C. of the cured thermosetting resin film. Specifically, it can be determined by the following procedure. The thermosetting resin film is cut into a predetermined size (length: 37 mm × width: 4 mm × thickness: 0.025 mm, and cured in a clean oven (manufactured by Espec Co., Ltd.) for 2 hours at 140 ° C. After curing, dynamic Using a viscoelasticity measuring device (TA Instruments), measurement is performed at a temperature range of 30 ° C. to 300 ° C., a temperature rising rate of 5 ° C./min, a strain of 0.25%, and a frequency of 1 Hz.

  As mentioned above, although the suitable embodiment of the manufacturing method of the semiconductor device concerning the present invention, and the thermosetting resin film as a member for semiconductor sealing was described, the present invention is not necessarily limited to the embodiment mentioned above, Changes may be made as appropriate without departing from the spirit of the invention.

Example 1
[Preparation of thermosetting resin film]

  As an epoxy resin, a biphenyl aralkyl type epoxy resin (product name NC-3000H, manufactured by Nippon Kayaku Co., Ltd., viscosity 0.25 to 0.35 Pa · s) was prepared.

  26.40 g of bis (4-aminophenyl) sulfone and 2,2′-bis [4] were added to a reaction vessel with a volume of 2 liters that can be heated and cooled, equipped with a thermometer, a stirrer, and a moisture meter with a reflux condenser. 484.50 g of-(4-maleimidophenoxy) phenyl] propane, 29.10 g of p-aminobenzoic acid, and 360.00 g of dimethylacetamide were allowed to react at 140 ° C. for 5 hours to form a sulfone group in the molecular main chain. And a solution of a curing agent (A-1) having an acidic substituent and an unsaturated N-substituted maleimide group was obtained.

  As an inorganic filler, a silica filler having an average particle diameter of 50 nm and silane coupling treatment with vinylsilane was prepared. Styrene butadiene particles were prepared as a crosslinked rubber.

  70 parts by mass of the epoxy resin, 30 parts by mass of the curing agent (A-1), the inorganic filler, and the crosslinked rubber were mixed. The inorganic filler is blended so as to be 78% by volume with respect to the total capacity of the epoxy resin and the curing agent, and the crosslinked rubber is 1.0% by volume with respect to the total capacity of the epoxy resin and the curing agent. It mix | blended so that it might become. The dispersion state was measured using a dynamic light scattering nanotrack particle size distribution analyzer “UPA-EX150” (manufactured by Nikkiso Co., Ltd.) and a laser diffraction scattering type microtrack particle size distribution meter “MT-3100” (manufactured by Nikkiso Co., Ltd.). It was measured and it was confirmed that the maximum particle size of the inorganic filler and the crosslinked rubber was 1 μm or less.

  The thermosetting resin composition obtained by applying the thermosetting resin composition obtained as described above onto a 16 μm-thick polyethylene terephthalate film (G2-16, trade name, manufactured by Teijin Ltd.) as a support. A layer was formed. Thereafter, the thermosetting resin composition layer was dried at 100 ° C. for about 10 minutes using a hot air convection dryer to obtain a thermosetting resin film on the support. A thermosetting resin film having a film thickness of 420 μm was prepared.

  Next, a polyethylene film (NF-15, manufactured by Tamapoly Co., Ltd., trade name) is used as a protective film on the surface opposite to the side in contact with the support so that dust or the like does not adhere to the thermosetting resin film. Bonding was performed to obtain a thermosetting resin film with a protective film. Further, this film was cut into a circle having a diameter of 7 inches.

[Preparation of support with temporary fixing film]
First, a SUS plate having a diameter of 220 mm and a thickness of 1.5 mm was prepared as a support. Next, a temporary fixing film was attached to one side of the SUS plate using a laminator to obtain a support with a temporary fixing film as shown in FIG.

  The temporarily fixing film protruding from the SUS plate was cut off with a cutter knife.

[Manufacture of semiconductor devices]
A 7.3 mm x 7.3 mm semiconductor element (CC80-0101JY, manufactured by Waltz Co., Ltd.) is placed on a support with a temporary fixing film so that the passive surface (back surface) of the semiconductor element and the temporary fixing film are bonded together. (Refer FIG.1 (b)). The number of mounted semiconductor elements was 193, and the pitch was 9.6 mm in both the vertical and horizontal directions. A die sorter (CAP3500 manufactured by Canon Machinery Co., Ltd.) was used for the arrangement of the semiconductor elements. The load at the time of arrangement was 1 kgf per semiconductor element.

  Next, the thermosetting resin film produced above was used to seal the semiconductor element so that a first insulating layer made of the thermosetting resin film was formed (see FIG. 1D). . Specifically, first, a thermosetting resin film was placed on the active surface (surface) of the semiconductor element. This was laminated using a press-type vacuum laminator (MVLP-500, trade name, manufactured by Meiki Seisakusho Co., Ltd.) to form a first insulating layer on the passive surface (back surface) of the semiconductor element and between the semiconductor elements. . Table 1 shows the thickness T3 (μm) of the first insulating layer and the thickness T1 (μm) of the semiconductor element at this time. The sealing conditions were a mold temperature of 140 ° C., a sealing time of 600 seconds, an atmospheric pressure of 0.012 Pa, and a sealing pressure of 2.5 MPa. Subsequently, heat curing was performed at 140 ° C. for 1 hour in a clean oven.

  Thereafter, the support and the temporary fixing film were peeled off on a 200 ° C. hot plate (see FIGS. 1E and 1F).

  Next, a second insulating layer made of a thermosetting resin composition was formed on the active surface side of the semiconductor element (see FIG. 2F). The thermosetting resin composition was the same as the first insulating layer, and the second insulating layer was formed in the same manner as the first insulating layer. The thickness of the second insulating layer was 10 μm. Next, heating was performed at 120 to 170 ° C. for 30 minutes to 1 hour in a clean oven, and the second insulating layer was thermally cured.

  Next, a desmear treatment was performed under the conditions shown in Table 3, the surface of the second insulating layer was ground, and an opening reaching the semiconductor element was provided in the second insulating layer (see FIG. 2G). .

  Thereafter, a seed layer having a thickness of 1 μm was formed on the opening and the second insulating layer by an electroless copper plating method (see FIG. 2H).

Next, a resist for circuit formation (Phototec RY-3525 manufactured by Hitachi Chemical Co., Ltd.) is stuck on the seed layer with a roll laminator, and a photo tool having a pattern formed thereon is brought into close contact, and an EXM-1201 type exposure machine manufactured by Oak Manufacturing Co., Ltd. And was exposed with an energy amount of 100 mJ / cm ² . Next, spray development was performed for 90 seconds with a 1% by mass aqueous sodium carbonate solution at 30 ° C. to form a resist pattern for circuit formation (see FIG. 2 (i)).

  Next, a copper wiring pattern having a thickness of 5 μm was formed on the seed layer by electroplating (see FIG. 2J). Next, after peeling the circuit forming resist pattern with a peeling solution (see FIG. 3 (k)), the seed layer exposed on the surface of the second insulating layer was removed with an etching solution (see FIG. 3 (l)). .

  Next, a third insulating layer made of a thermosetting resin composition is formed on the wiring pattern and the second insulating layer, subjected to desmearing treatment in Table 3, and the third insulating layer reaches the wiring pattern. (See FIG. 3 (m)). The thermosetting resin composition used was the same thermosetting resin composition as the first insulating layer, and the third insulating layer was formed in the same manner as the first insulating layer. The thickness of the third insulating layer was 20 μm.

  Thereafter, using a commercially available electroless nickel / gold plating solution, the wiring pattern was plated so that the nickel plating thickness was 3 μm and the gold plating thickness was 0.1 μm. Next, an Sn—Ag—Cu-based solder ball serving as an external connection terminal was mounted on the gold plating by reflow mounting.

  Next, the semiconductor device was obtained by dicing into pieces having a size of 9.3 mm × 9.3 mm by dicing (blade width 0.3 mm) (see FIG. 3 (n)).

[Evaluation in the manufacture of semiconductor devices]
Warpage, embedding property and smoothness in the manufacture of semiconductor devices were evaluated by the following methods. The results are shown in Tables 5-7.

(warp)
About the molding after forming the 1st insulating layer and performing predetermined | prescribed thermosetting, the curvature amount of the range of diameter 200mm was measured under room temperature (25 degreeC), and curvature was evaluated based on the following references | standards. .
A: The amount of warpage is less than 1 mm.
B: The amount of warpage is 1 mm or more and less than 2 mm.
C: Warpage amount is 2 mm or more.

(Embeddability)
About the molding after forming the first insulating layer and performing the predetermined thermosetting, the embedding state of the semiconductor element by the thermosetting resin composition is visually confirmed, and the embedding property is evaluated based on the following criteria. did.
A: The resin is sufficiently embedded between the semiconductor elements, and there is no unfilled portion.
B: There is an unfilled portion between the semiconductor elements.

(Smoothness (step))
About the molding after forming the 1st insulating layer and performing predetermined | prescribed thermosetting, the passive surface (back surface) of a semiconductor element is used using the surface roughness meter (Surfcoder SE-2300 by Kosaka Laboratory Ltd.). ) Side of the first insulating layer surface was measured, and the smoothness (step) was evaluated based on the following criteria.
A: The level | step difference of the surface of a 1st insulating layer is less than 2 micrometers.
B: The level | step difference of the surface of a 1st insulating layer is 2 micrometers or more and less than 5 micrometers.
C: The level | step difference of the surface of a 1st insulating layer is 5 micrometers or more.

(Smoothness (wall surface))
About the molding after forming the 1st insulating layer and performing predetermined | prescribed thermosetting, the smoothness of the wall surface was confirmed visually and smoothness (step difference) was evaluated based on the following references | standards.
A: There is no chipping.
B: There is a chip.

[Evaluation of thermosetting resin film]
About the thermosetting resin film prepared above, minimum melt viscosity (Pa · s), average thermal expansion coefficient (× 10 ⁻⁶ / ° C.) at 25 to 140 ° C. after curing, and elastic modulus (GPa) at 25 ° C. Was measured according to the following method.

(Minimum melt viscosity)
A thermosetting resin film 0.6 g was formed into a tablet having a diameter of 2 cm using a compression molding machine. Using a rheometer (ARES-2KSTD manufactured by Rheometric Scientific), this tablet was measured for viscosity while raising the temperature under the conditions of a frequency of 0.1 Hz, a heating rate of 5 ° C./min, and a measurement mode of Dynamic Temperature Ramp. . The temperature was raised from 20 ° C. to 200 ° C., and the lowest viscosity was defined as the lowest melt viscosity.

(Average thermal expansion coefficient)
The thermosetting resin film was cut into a predetermined size (length 37 mm × width 4 mm × thickness 0.025 mm, and cured in a clean oven (manufactured by Espec Co., Ltd.) for 2 hours at 140 ° C. After curing, thermal expansion Thermal expansion was measured under the conditions of a temperature range of 25 to 140 ° C., a temperature increase rate of 5 ° C./min, and a load of 0.5 MPa using a rate measuring device (Seiko Instruments Inc., thermal analysis system TMASS6000). The coefficient of expansion was an average coefficient of thermal expansion (ppm / ° C.) up to 25 to 140 ° C.

(Elastic modulus at 25 ° C)
The thermosetting resin film was cut out to a predetermined size (length: 37 mm × width: 4 mm × thickness: 0.025 mm, and cured for 2 hours at 140 ° C. in a clean oven (manufactured by ESPEC Corporation). Using a viscoelasticity measuring apparatus (TA Instruments Co., Ltd.), the temperature range was 30 ° C. to 300 ° C., the temperature rising rate was 5 ° C./min, the strain was 0.25%, and the frequency was 1 Hz.

(Examples 2 to 12)
The amount of inorganic filler, the amount of crosslinked rubber, the thickness and diameter of the thermosetting resin film, the thickness of the semiconductor element, and the thickness of the first insulating layer were changed to the values shown in Tables 2 and 3. Except for the above, production of a thermosetting resin film and production of a semiconductor device were carried out in the same manner as in Example 1, and further evaluation in production of the semiconductor device and evaluation of the thermosetting resin film were conducted.

(Comparative Examples 1-7)
Except for changing the amount of inorganic filler, the amount of crosslinked rubber, the thickness and diameter of the thermosetting resin film, the thickness of the semiconductor element, and the thickness of the first insulating layer to the values shown in Table 4. In the same manner as in Example 1, production of a thermosetting resin film and manufacture of a semiconductor device were performed, and evaluation in manufacturing of the semiconductor device and evaluation of the thermosetting resin film were performed.

  ADVANTAGE OF THE INVENTION According to this invention, the semiconductor device by which generation | occurrence | production of curvature was fully suppressed can be manufactured using the member for semiconductor sealing which can fully embed a semiconductor. Thereby, it is possible to efficiently provide a wafer level semiconductor device which can be thinned and warp is sufficiently suppressed at low cost. The present invention is not limited to a wafer level semiconductor device, but can be applied to all semiconductor devices and component-embedded substrates that need to be reduced in size and thickness, such as a package-on-package rewiring process. .

DESCRIPTION OF SYMBOLS 1 ... Support body, 2 ... Temporary fixing layer (temporary fixing film), 3 ... Semiconductor element, 4 ... Semiconductor sealing member (thermosetting resin film, 1st insulating layer), 5 ... 2nd insulating layer 5 ', 5''... second insulating layer having opening, 6 ... seed layer, 7 ... resist pattern, 8 ... wiring pattern, 9 ... third insulating layer having opening, 10 ... terminal for external connection, 12 ... Electroless nickel / gold plating, 20 ... Semiconductor device.

Claims (3)

At least one semiconductor element having an active surface and a passive surface on the opposite side of the active surface, and the temporary fixing layer and the active surface of the semiconductor element are bonded to the support provided with the temporary fixing layer. Temporarily fixing to (I),
Sealing the temporarily fixed semiconductor element with a semiconductor sealing member to form a first insulating layer covering the passive surface side of the semiconductor element (II);
The support element and the temporary fixing layer are peeled off from the semiconductor element and the first insulating layer that seals the semiconductor element, and the semiconductor element that exposes the active surface and the semiconductor element are sealed. Obtaining a first insulating layer (III);
A second insulating layer having an opening reaching the active surface of the semiconductor element is formed on the active surface side of the semiconductor element in which the active surface is exposed and the first insulating layer sealing the semiconductor element. Performing step (IV);
Forming a seed layer on a part of the active surface of the semiconductor element and the second insulating layer (V);
Forming a wiring pattern on the seed layer (VI);
Removing the portion of the seed layer other than the wiring pattern (VII);
Forming a third insulating layer having an opening reaching the wiring pattern on the wiring pattern and the second insulating layer (VIII);
Forming an external connection terminal in the opening (IX);
With
The semiconductor sealing member is a thermosetting resin film containing a thermosetting resin component containing a thermosetting resin and a curing agent, an inorganic filler, and a crosslinked rubber.
The content of the crosslinked rubber in the thermosetting resin film is 0.5% by volume or more based on the capacity of the thermosetting resin component,
The thermosetting resin film has a minimum melt viscosity of 500 Pa · s or less and an average coefficient of thermal expansion at 25 to 140 ° C. after curing of 12 × 10 ⁻⁶ / ° C. or less.
A method for manufacturing a semiconductor device. At least one semiconductor element having an active surface and a passive surface on the opposite side of the active surface, and the temporary fixing layer and the active surface of the semiconductor element are bonded to the support provided with the temporary fixing layer. Temporarily fixing to (I),
Sealing the temporarily fixed semiconductor element with a semiconductor sealing member to form a first insulating layer covering the passive surface side of the semiconductor element (II);
The support element and the temporary fixing layer are peeled off from the semiconductor element and the first insulating layer that seals the semiconductor element, and the semiconductor element that exposes the active surface and the semiconductor element are sealed. Obtaining a first insulating layer (III);
A second insulating layer having an opening reaching the active surface of the semiconductor element is formed on the active surface side of the semiconductor element in which the active surface is exposed and the first insulating layer sealing the semiconductor element. Performing step (IV);
Forming a seed layer on a part of the active surface of the semiconductor element and the second insulating layer (V);
Forming a wiring pattern on the seed layer (VI);
Removing the portion of the seed layer other than the wiring pattern (VII);
Forming a third insulating layer having an opening reaching the wiring pattern on the wiring pattern and the second insulating layer (VIII);
Forming an external connection terminal in the opening (IX);
With
The semiconductor sealing member is a thermosetting resin film containing a thermosetting resin component containing a thermosetting resin and a curing agent, an inorganic filler, and a crosslinked rubber.
Content of the said inorganic filler in the said thermosetting resin film is 75 to 83 volume% on the basis of the capacity | capacitance of a thermosetting resin component, And content of the said crosslinked rubber in the said thermosetting resin film Is 0.5% by volume or more based on the volume of the thermosetting resin component.
A method for manufacturing a semiconductor device. A semiconductor device obtained by the method for manufacturing a semiconductor device according to claim 1.

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