JP2016208036A - Wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board having high reliability of electrical and mechanical connection via a joint portion between a ceramic substrate portion and a resin substrate portion.SOLUTION: A wiring board comprises a ceramic substrate 1, a ceramic substrate portion 1A having first thin-film wiring 14 provided on the upper surface thereof, a resin substrate 3 including a plurality of resin layers 31, a resin substrate part 3A having second thin film wiring 32 provided on the lower surface thereof, a bonding layer 2 having a lower surface bonded to the upper surface of the ceramic substrate 1 and an upper surface bonded to the lower surface of the resin substrate 3, and a joining portion 2A having a conductor 22 disposed in the bonding layer 2 so as to be connected to the first thin film wiring 14 and the second thin film wiring 32. The first thin film wiring 14 and the second thin film wiring 32 are patterns which overlap with each other in plan view perspective opposing the upper surface and the lower surface of the bonding layer 2.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a wiring board having a ceramic substrate, a resin insulating layer disposed on the ceramic substrate, and a bonding layer that is interposed between the ceramic substrate and the resin insulating layer to bond them together. .

  As a wiring board for a probe card or the like for electrical inspection of a semiconductor element, a wiring board having a ceramic substrate and a plurality of resin insulation layers arranged on the ceramic substrate is used. The ceramic substrate and the resin insulating layer each have a wiring conductor, and a conductive path is formed by the wiring conductor from the upper surface of the resin insulating layer to the lower surface of the ceramic substrate. When the wiring board is used for a probe card, the wiring conductor arranged on the upper surface of the uppermost resin insulation layer is electrically connected to the electrode of the semiconductor element through the probe or the like and arranged on the lower surface of the ceramic substrate. The formed wiring conductor is electrically connected to the external electric circuit.

  In the wiring board, for example, in order to improve productivity, a structure in which a ceramic substrate and a plurality of thin film insulating layers are separately manufactured and bonded to each other by a bonding layer has been proposed. The upper surface of the bonding layer is bonded to the lower surface of the lowermost resin insulating layer, and the lower surface is bonded to the upper surface of the ceramic substrate. Thereby, the ceramic substrate and the plurality of resin insulating layers are bonded to each other through the bonding layer.

  In addition, the connection conductor provided in advance from the upper surface to the lower surface of the bonding layer electrically connects the wiring conductor on the lower surface of the lowermost resin insulation layer and the wiring conductor on the upper surface of the ceramic substrate (for example, (See Patent Document 1).

JP2009-75059

  When the wiring conductor on the lower surface of the lowermost resin insulation layer and the wiring conductor on the upper surface of the ceramic substrate are both formed by thin film wiring in order to increase wiring density and improve pattern accuracy, the following Problems are likely to occur.

  That is, a thermal stress is generated between the ceramic substrate and the resin insulating layer due to a difference in thermal expansion coefficient (linear expansion coefficient) between the two. This thermal stress tends to concentrate on the bonding layer located between the ceramic substrate and the resin insulating layer, and this thermal stress acts in a direction along the main surface of the bonding layer. Due to this thermal stress, a mechanical breakdown such as a crack occurs in the joint portion between the conductor of the joining layer and the thin film wiring, and the electrical connection between them tends to break.

The inventor has investigated the broken portion of the connection between the conductor of the bonding layer and the thin film wiring with respect to the above problem. As a result, the present inventors have completed the present invention by finding the relationship between the size (area) of the thin film wirings above and below the conductors of the bonding layer in a plan view and the easily damaged portion. The outline of this relationship is as follows. If the pattern shape or area of the upper and lower thin film wirings that are positioned one above the other or the positions of the connection portions with the conductors of the thin film wirings are different from each other in plan perspective, the upper surface and the lower surface of the bonding layer respectively The stress applied to the conductor from the thin film wiring differs. That is, since the stress is applied to the conductor, stress in the peeling direction (peeling stress) is easily applied to the joint portion. In general, the joint is weaker in peel stress than shear stress. Therefore, when the upper and lower patterns (area, etc.) positioned above and below are different from each other, it is considered that the connection portion of the thin film wiring with the conductor is likely to break due to peeling stress.

  That is, a wiring board according to one aspect of the present invention includes a ceramic substrate portion having a ceramic substrate having an upper surface and a first thin film wiring provided on the upper surface of the ceramic substrate. A resin substrate including a plurality of resin layers stacked on each other and having a lower surface facing the upper surface of the ceramic substrate, and a second thin film wiring provided on the lower surface of the resin substrate Contains parts. A lower surface and an upper surface; the lower surface is bonded to the upper surface of the ceramic substrate; and a bonding layer in which the upper surface is bonded to the lower surface of the resin substrate; the first thin film wiring; A bonding portion having a conductor disposed in the bonding layer so as to be connected to the second thin film wiring; In addition, the first thin film wiring and the second thin film wiring overlap each other in a plan view facing the upper surface and the lower surface of the bonding layer.

  According to the wiring board of one aspect of the present invention, the first thin film wiring and the second thin film wiring have the same coefficient of thermal expansion, and the first transparent thin film wiring in the plane perspective facing the upper surface and the lower surface of the bonding layer The thin film wiring and the second thin film wiring overlap each other. As a result, the stress applied to the bonding portion between the conductor of the bonding layer and the thin-film wiring layer due to the thermal stress due to the thermal expansion difference between the ceramic substrate and the resin substrate (resin layer) And on the resin substrate side), the joint portions are almost the same.

  For this reason, the occurrence of the peeling stress as described above and the possibility of stress concentration at some joint portions are reduced. As a result, the stress applied to each joint portion is suppressed to approximately the above-described thermal stress. Therefore, breakage at the joint portion due to generation of peeling stress or stress concentration at some joint portions is suppressed. That is, peeling between the first thin film wiring and the second thin film wiring and the conductor of the joint is suppressed, and the connection reliability as a whole is improved.

It is sectional drawing which shows the wiring board of embodiment of this invention. (A) is sectional drawing which planarly viewed the cross section of the AA part of the wiring board of FIG. 1, (b) is sectional drawing which shows the sectional view of the BB part planarly. (A) is sectional drawing which shows the modification of Fig.2 (a), (b) is sectional drawing which shows the modification of FIG.2 (b). (A) is sectional drawing which shows the other modification of FIG. 2 (a), (b) is sectional drawing which shows the other modification of FIG.2 (b). It is sectional drawing which shows the modification of FIG. (A) is sectional drawing which planarly viewed the cross section of the AA part of the wiring board of FIG. 5, (b) is sectional drawing which planarly shows the cross section of a BB part. It is sectional drawing which shows the other modification of FIG. (A) is sectional drawing which planarly viewed the cross section of the AA part of the wiring board of FIG. 7, (b) is sectional drawing which planarly shows the cross section of a BB part.

A wiring board according to an embodiment of the present invention will be described with reference to the drawings. The drawings used in the following description are schematic, and the distinction between the upper and lower sides is for the convenience of explanation, and does not restrict the upper and lower sides when a wiring board or the like is actually used. For convenience of explanation, in FIG. 1, an orthogonal coordinate system xyz is defined, and the word “upper surface” or “lower surface” is used with the positive side in the z direction as the upper side.

  FIG. 1 is a cross-sectional view showing a wiring board and a probe card according to an embodiment of the present invention. 2A is a cross-sectional view of the cross-section of the AA portion of the wiring board of FIG. 1, and FIG. 2B is a cross-sectional view of the cross-section of the BB portion of the wiring board of FIG. It is sectional drawing shown.

  The wiring board according to the embodiment includes a ceramic substrate portion 1A, a joining portion 2A provided on the ceramic substrate portion 1A, and a resin substrate portion 3A provided on the joining portion 2A. The ceramic substrate portion 1A has functions such as ensuring rigidity and mechanical strength as a wiring substrate. The resin substrate portion 3A has functions such as enabling arrangement of fine wiring (details will be described later) when the wiring substrate is used as a substrate for a probe card, for example. The joining portion 2A has a function of joining the ceramic substrate portion 1A and the resin substrate portion 3A to each other. That is, the resin substrate portion 3A is bonded onto the ceramic substrate portion 1A via the bonding portion 2A, so that the wiring substrate is basically configured. These will be described in detail sequentially.

  When the wiring board is used as a probe card board, for example, probe pins (not shown) are attached to the uppermost surface of the resin board portion 3A. The wiring board is pressed against the semiconductor element so that the probe pin is connected to the electrode of the semiconductor element (not shown). The electrode of the semiconductor element electrically connected to the probe pin is electrically led out from the upper surface side of the resin substrate portion 3A to the lower surface side of the ceramic substrate portion 1A through the joint portion 2A. A predetermined portion of an external circuit for inspection (not shown) and the semiconductor element are electrically connected to each other through the derived portion, and various inspections such as the presence or absence of malfunction of the circuit of the semiconductor element are performed. .

  In this case, the semiconductor element is temporarily placed on the upper surface of the wiring board in order to perform an electrical check. Examples of the semiconductor element include a semiconductor integrated circuit element such as an IC or LSI, or a micromachine (so-called MEMS element) in which a minute electromechanical mechanism is formed on the surface of a semiconductor substrate.

  The ceramic substrate portion 1 </ b> A has, for example, a polygonal plate shape such as a rectangular plate shape, and includes a ceramic substrate 1 including a plurality of ceramic insulating layers 11 stacked on each other. The ceramic substrate 1 has a polygonal upper surface such as a square shape. A ceramic wiring conductor layer 12 is provided between the ceramic insulating layers 11 (inside the ceramic substrate 1), etc., and the upper and lower ceramic wiring conductor layers 12 are electrically connected to each other by the ceramic through conductors 13 that penetrate the ceramic insulating layer 11 in the thickness direction. Connected.

  The ceramic substrate 1 of the ceramic substrate portion 1A has a function of ensuring the overall rigidity of the wiring substrate as described above. The ceramic substrate 1 increases the rigidity as a wiring substrate. Therefore, when the wiring board is used as a probe card board, for example, and pressed against a semiconductor element (not shown) for inspection, its deformation is suppressed.

  The ceramic substrate 1 has, for example, a plate shape having a polygonal shape or a circular shape in plan view as a whole. In this case, the plurality of ceramic insulating layers 11 are each formed in a plate shape having the same shape and dimensions. The dimensions of the ceramic substrate 1 in plan view are appropriately set according to the dimensions of the semiconductor element to be inspected when used as a probe card substrate, for example.

  The plurality of ceramic insulating layers 11 included in the ceramic substrate 1 are made of, for example, a ceramic sintered body such as an aluminum oxide sintered body, an aluminum nitride sintered body, a silicon carbide sintered body, a mullite sintered body, or a glass ceramic. Consists of union.

  The thickness and the number of layers of the ceramic insulating layer 11 may vary depending on various conditions such as electrical conditions such as the layout of the ceramic wiring conductor layer 12 and the ceramic through conductor 13, and the desired rigidity and economy of the ceramic substrate portion 1A. It is set accordingly.

  If the ceramic substrate 1 formed by laminating a plurality of ceramic insulating layers 11 is made of, for example, an aluminum oxide sintered body, it can be manufactured as follows. That is, a ceramic green sheet is formed by forming a slurry prepared by adding and mixing an appropriate organic binder and organic solvent to raw material powders such as aluminum oxide and silicon oxide into a sheet shape by a sheet forming technique such as a doctor blade method or a lip coater method. Then, the ceramic green sheet is made into an appropriate shape and size by cutting or punching, and is fired at a temperature of about 1300 to 1500 ° C., whereby the ceramic substrate 1 can be manufactured.

  The ceramic wiring conductor layer 12 and the ceramic through conductor 13 are made of, for example, a metal material such as tungsten, molybdenum, manganese, or copper, or an alloy material of these metal materials. These metal materials (alloy materials) are deposited on the exposed surface or inside of the ceramic substrate 1 by a method such as metallization or plating.

  If the ceramic wiring conductor layer 12 and the ceramic through conductor 13 are made of tungsten, for example, a paste of tungsten is applied to the surface of the ceramic green sheet to be the ceramic substrate 1 or the inside of a through hole formed in advance. It can be applied by filling and cofiring with the ceramic green sheet. The through hole of the ceramic green sheet can be formed by, for example, mechanical punching using a mold or drilling such as laser processing.

  A first thin film wiring 14 is provided on the upper surface of the ceramic substrate 1. The first thin film wiring 14 is a portion that is electrically connected to the resin substrate portion 3A when the ceramic substrate portion 1A is bonded to the resin substrate portion 3A via the bonding portion 2A as described above. Therefore, it is desirable that the wiring pattern be finer than that of the ceramic wiring conductor layer 12, and the thin film conductor is used.

  A lower surface terminal 15 is provided on the lower surface of the ceramic substrate 1. The lower surface terminal 15 is electrically connected to the first thin film wiring 14 by the ceramic wiring conductor layer 12 and the ceramic through conductor 13. Thus, a conductive path formed by the first thin film wiring 14, the ceramic wiring conductor layer 12, the ceramic through conductor 13, and the lower surface terminal 15 is disposed from the upper surface to the lower surface of the ceramic substrate 1. By this conductive path, for example, the electrode of the semiconductor element placed on the upper surface of the resin substrate portion 3A (that is, the upper surface of the wiring substrate) is electrically connected to the external circuit.

  The first thin film wiring 14 is formed of one or more kinds of metal materials such as copper, gold, silver, chromium or titanium. The first thin film wiring 14 can be formed by the following method, for example. First, a chromium (Cr) -copper (Cu) alloy layer or titanium is formed on the upper surface of the ceramic substrate 1 including a portion where the first thin film wiring 14 is formed by a thin film forming method such as a vapor deposition method, a sputtering method, or an ion plating method. A base conductor layer made of a (Ti) -copper (Cu) alloy layer is formed. Next, a metal layer such as copper or gold is deposited by plating or the like. Thereafter, the base conductor layer and the metal layer are formed into a predetermined pattern of the first thin film wiring 14 by a method such as resist and etching. Thereby, the first thin film wiring 14 can be formed on the upper surface of the ceramic substrate 1.

The resin substrate portion 3A includes a resin substrate 3 having a plurality of resin layers 31 stacked on each other. The resin substrate 3 has a lower surface facing the upper surface of the ceramic substrate 1. in this case,
Since the joint 2A is interposed between the lower surface of the resin substrate 3 and the ceramic substrate 1 as described above, the lower surface of the resin substrate 3 and the upper surface of the ceramic substrate 1 are not in direct contact with each other.

  In the wiring board of the embodiment, the resin layer 31 further includes an organic insulating layer 31a and an adhesive layer 31b. The organic insulating layer 31a is a part for ensuring basic characteristics as a so-called insulating layer, such as the mechanical strength of the resin layer 31. The adhesive layer 31b is a layer having higher adhesiveness than the organic insulating layer 31a, and is a part for bonding the upper and lower resin layers 31 to each other. The organic insulating layer 31a and the adhesive layer 31b may be formed of an insulating resin material appropriately selected from, for example, insulating resin materials that can be used as the resin layer 31 described later. In this case, for example, the adhesive layer 31b may have the same basic composition as the organic insulating layer 31a and may have a tacky component added. It may contain more of the highly adhesive component.

  Further, the resin substrate portion 3 </ b> A has a second thin film wiring 32 provided on the lower surface of the resin substrate 3. The second thin film wiring 32 is electrically led to the upper surface of the resin substrate 3 through a through conductor 33 that penetrates the resin layer 31 in the thickness direction, for example. In the wiring board of the embodiment, the upper surface terminal 34 is provided on the upper surface of the resin substrate portion 3A (resin substrate 3). The upper surface terminal 34 functions as a terminal electrically connected to a semiconductor element in a probe card, for example. The semiconductor element (electrode) electrically connected to the upper surface terminal 34 is electrically connected to the lower surface terminal 15 through the conductive path and the like, and is further electrically connected to an external circuit.

  In the wiring board of the embodiment, the second thin film wiring 32 is also provided between the upper and lower resin layers 31. In other words, the second thin film wiring 32 included in the resin substrate portion 3 </ b> A is provided at least on the lower surface of the lowermost resin layer 31 of the resin substrate 3, and is provided on the lower surface of the other resin layer 31. You may include what is.

  The resin layer 31 is, for example, polyimide resin, polyamideimide resin, siloxane modified polyamideimide resin, siloxane modified polyimide resin, polyphenylene sulfide resin, wholly aromatic polyester resin, BCB (benzocyclobutene) resin, epoxy resin, bismaleimide triazine resin. , Polyphenylene ether resin, polyquinoline resin, fluororesin and other insulating resin materials.

  Further, the second thin film wiring 32 is formed of the same method (etching process or the like) with a metal material such as copper, for example, similarly to the first thin film wiring 14. Further, the through conductor 33 is made of a metal material such as copper, for example, similarly to the second thin film wiring 32, and is formed by filling a metal material such as copper in a through hole provided in the resin layer 31 in advance. The filling of the metal material is performed by a method such as vapor deposition or plating.

  The bonding portion 2A has a lower surface and an upper surface, and the lower surface is bonded to the upper surface of the ceramic substrate 1 and has a bonding layer 2 whose upper surface is bonded to the lower surface of the resin substrate 3. . The bonding layer 2 is a portion having a main bonding force for mechanically connecting the ceramic substrate 1 and the resin substrate 3 in the bonding portion 2A, and includes, for example, a bonding resin layer 21 as an adhesive. The bonding layer 2 may include an auxiliary layer (not shown) such as a core material layer in addition to the bonding resin layer 21. The bonding layer 2 is bonded to both the ceramic substrate 1 and the resin substrate 3, and the ceramic substrate 1 and the resin substrate 3 are mechanically connected to each other via the bonding layer 2.

Further, the joining portion 2A has a conductor 22 arranged in the joining layer 2 so as to be connected to the first thin film wiring 14 on the upper surface of the ceramic substrate 1 and the second thin film wiring 32 on the lower surface of the resin substrate 3. Since the conductor 22 is connected to the first thin film wiring 14 and the second thin film wiring 32 on the upper and lower surfaces of the bonding layer 2, the conductor 22 exists on both the upper and lower surfaces of the bonding layer 2. An example of the conductor 22 is a bonding layer penetrating conductor that passes through the bonding layer 2 in the thickness direction (the bonding layer penetrating conductor has no symbol).

  The bonding layer 2 includes, for example, polyimide resin, polyamideimide resin, siloxane-modified polyamideimide resin, siloxane-modified polyimide resin, polyphenylene sulfide resin, wholly aromatic polyester resin, BCB (benzocyclobutene) resin, epoxy resin, bismaleimide triazine resin. , Polyphenylene ether resin, polyquinoline resin, fluororesin, glass epoxy resin, bonding resin layer 21 made of an insulating resin material such as polyether / ether / ketone resin.

  The conductor 22 is made of, for example, a metal material having a melting point lower than that of the through conductor 33 of the resin substrate portion 3A. Examples of such a metal material include solder such as tin-silver solder or tin-silver-copper solder. The metal material may be a solder (low melting point brazing material) in which copper powder is added to tin-silver solder or tin-silver-copper solder.

  When the melting point of the conductor 22 is relatively low, the conductor 22 is bonded when the bonding layer 2 and the resin substrate 3 are bonded to the ceramic substrate 1 (that is, when the ceramic substrate portion 1A and the resin substrate portion 3A are bonded via the bonding portion 2A). Therefore, the electrical connection between the first thin film wiring 14 and the second thin film wiring 32 is facilitated.

  The melting point of the solder to be the conductor 22 (second metal material) is, for example, about 200 ° C. to 250 ° C. On the other hand, the melting point of the through conductor 33 is, for example, about 1000 ° C. to 1100 ° C.

  The conductor 22 (unheated) is formed, for example, by filling a metal paste such as solder with a screen printing or the like in a through-hole previously formed in the bonding layer 2 (bonding resin layer 21) by laser processing or the like. Yes.

  In addition, the first thin film wiring 14 and the second thin film wiring 32 overlap each other in a plan view facing the upper surface and the lower surface of the bonding layer 2. As a result, the stress applied to the bonding portion between the conductor 22 of the bonding layer 2 and the thin film wiring (first and second thin film wirings 14 and 32) due to the thermal stress due to the thermal expansion difference between the ceramic substrate 1 and the resin layer 31. However, it becomes substantially the same in each joining part on the upper and lower sides of the joining layer 2 (the ceramic substrate part 1A side and the resin substrate part 3A side).

  Here, suppose that the first thin film wiring and the second thin film wiring are in plan perspective and have different areas or positions (not shown), and according to the difference, the upper surface of the bonding layer 2 and The stress applied to the conductor 22 from the first thin film wiring and the second thin film wiring on the lower surface is different. That is, since the stress is applied to the conductor, stress in the peeling direction (peeling stress) is easily applied to the joint portion. For this reason, there is a possibility that the joint portion of the first and second thin film wirings with the conductor is likely to break due to peeling stress.

  On the other hand, in the wiring board of the embodiment, the first thin film wiring 14 and the second thin film wiring 32 overlap each other in plan view (hereinafter also simply referred to as “up and down”). Therefore, the possibility of occurrence of peeling stress or the like at the joint portion between the first thin film wiring 14 and the second thin film wiring 32 and the conductor 22 is reduced. As a result, the stress applied to each joint portion is suppressed to approximately the thermal stress caused by the difference in thermal expansion between the ceramic substrate 1 and the resin substrate 3, and the stress bias is suppressed. Therefore, breakage at the joint portion due to generation of peeling stress or stress concentration at some joint portions is suppressed. That is, peeling between the first thin film wiring 14 and the second thin film wiring 32 and the conductor 22 of the bonding layer 2 is suppressed, and a wiring board having high connection reliability as a whole can be provided.

The first thin film wiring 14 and the second thin film wiring 32 overlap each other when seen in a plan view. The first thin film wiring 14 and the second thin film wiring 32 positioned above and below with the bonding layer 2 interposed therebetween. It means that portions of about 80% or more of the area overlap each other.

  In the example of FIG. 1, the first thin film wiring not connected to the conductor 22 of the bonding layer 2 is not limited to the first thin film wiring 14 and the second thin film wiring 32 directly connected to the conductor 22 of the bonding layer 2. 14 and the second thin film wiring 32 also overlap each other (in other words, the patterns overlap each other).

  As a result, for example, the following effects can be obtained. Stress is also generated in the first and second thin film wirings 14 and 32 not connected to the conductor 22, but the stress transmitted to the other adjacent first thin film wiring 14 or the second thin film wiring 32 is on the bonding layer 2. It is almost the same on the bottom surface. Therefore, the stress applied to the conductor 22 connected to the other first thin film wiring 14 or the second thin film wiring 32 is not easily affected by the first thin film wiring 14 or the second thin film wiring 32 not connected to the conductor 22. . Therefore, it becomes more difficult to receive the influence other than the thermal stress caused by the thermal expansion difference between the ceramic substrate 1 and the resin substrate 3. Thus, even when the first thin film wiring 14 and the second thin film wiring 32 not connected to the conductor 22 of the bonding layer 2 are included, the bonding portion 2A between the ceramic substrate portion 1A and the resin substrate portion 3A is interposed. It becomes easier to provide a wiring board with high electrical and mechanical connection reliability.

  Further, in the example of FIG. 1, the first thin film wiring 14 and the second thin film wiring 32 have the same pattern in a plan view facing the upper surface and the lower surface of the bonding layer 2. That is, the first thin film wiring 14 and the second thin film wiring 32 overlap each other over the entire surface in a plan view. Note that the two do not have to be exactly the same as each other, and a slight deviation (for example, about 50 μm) due to processing accuracy or the like is allowed.

  In this case, the possibility of occurrence of peeling stress or the like at the joint portion between the first thin film wiring 14 and the second thin film wiring 32 and the conductor 22 is further effectively reduced. For this reason, breakage at the joint due to generation of peeling stress or concentration of stress at some joint is further effectively suppressed. That is, the connection reliability between the first thin film wiring 14 and the second thin film wiring 32 and the conductor 22 of the bonding layer 2 is further improved.

  Further, for example, as in this embodiment, the conductor 22 of the joining portion 2A penetrates the joining layer 2 in the thickness direction and has an end connected to the first thin film wiring 14 and the second thin film wiring 32. In the case of a conductor, the area of each junction of the through conductor (conductor 22) with the first thin film wiring 14 and the second thin film wiring 32 in a plan view facing the upper and lower surfaces of the bonding layer 2 is, for example, FIG. As shown in the example, the outer peripheral portion of the bonding layer 2 may be larger than the central portion.

  In this case, the bonding area between the first thin film wiring 14 and the second thin film wiring 32 and the conductor 22 also becomes larger at the outer peripheral portion where the thermal stress tends to be larger than the central portion of the bonding layer 2, and the connection Strength is further increased. Therefore, it is possible to provide a wiring board that is more advantageous in terms of connection reliability between the first thin film wiring 14 and the second thin film wiring 32 and the conductor 22.

  The wiring board of each of the above embodiments can be manufactured, for example, by the following method.

  First, for example, the ceramic substrate 1 provided with the ceramic wiring conductor layer 12 and the ceramic through conductor 13 is prepared by the method as described above. Further, the first thin film wiring 14 is formed on the upper surface of the ceramic substrate 1 by, for example, the method described above to prepare the ceramic substrate portion 1A.

Moreover, while preparing the ceramic substrate part 1A, the resin substrate part 3A is prepared. The resin substrate 3 of the resin substrate portion 3A is formed by laminating an uncured product of the above resin material such as a polyimide resin to be the resin layer 31 by a coating method such as a spin coating method, a die coating method, a curtain coating method, or a printing method (10 μm). (Thickness of about 50 μm) and then deposited, and then heated and cured.

  Further, the second thin film wiring 32 can be formed by a similar method (etching process or the like) with a metal material such as copper, for example, similarly to the first thin film wiring 14.

  The conductor 22 that penetrates the resin layer 31 in the thickness direction is formed by filling a metal material such as copper into a through-hole previously provided in the resin layer 31 by a method such as vapor deposition or plating. can do. This through hole can be formed by drilling such as laser processing.

  A wiring board can be manufactured by aligning the ceramic substrate portion 1A and the resin substrate portion 3A vertically with the bonding portion 2A interposed therebetween and bonding them together via the bonding portion 2A. In this case, the bonding portion 2A is interposed between the ceramic substrate portion 1A and the resin substrate portion 3A in a state in which the resin material to be the bonding layer 2 is uncured, and then heat-cured, thereby the ceramic substrate. The portion 1A and the resin substrate portion 3A can be made to function as a bonding material.

The interposition of the joining portion 2A between the ceramic substrate portion 1A and the resin substrate portion 3A is performed by, for example, arranging the joining portion 2A in which the joining layer 2 is uncured on the upper surface of the ceramic substrate portion 1A in advance. be able to. That is, an uncured polyimide resin or the like for the bonding layer 2 is applied to the upper surface of the ceramic substrate 1 by a spin coating method, a die coating method, a curtain coating method, or a printing method, and then cured with a heat of about 400 ° C. Then, the bonding layer 2 is formed by making it polyimide. Further, a through hole is formed in the bonding layer 2 by a method such as laser processing, and the through hole is filled with a metal material for the conductor 22 such as tin-silver solder. As a result, the joining portion 2 </ b> A including the joining layer 2 can be formed on the upper surface of the ceramic substrate 1.

  A modification of the wiring board of the embodiment is shown in FIG. FIG. 3 is a cross-sectional view at positions corresponding respectively to the AA line and the BB line of FIG. 1 in the wiring board of the modified example. 3A is a cross-sectional view showing a modification of FIG. 2A, and FIG. 3B is a cross-sectional view showing a modification of FIG. 2B.

  In the example shown in FIG. 3, the first thin film wiring 14 and the second thin film wiring 32 include a power supply wiring, a ground wiring and a signal wiring, respectively, and the areas of the power supply wiring and the ground wiring are It is larger than the wiring area. For example, each of the power supply wiring, the ground wiring, and the signal wiring is electrically connected to a plurality of electrodes (power supply electrode, ground electrode, or signal electrode) corresponding to the semiconductor element. In this case, the power supply wiring and the grounding wiring are regarded as a plurality of power supply wirings corresponding to the plurality of power supply electrodes or grounding electrodes, and the grounding wirings being made common to each other and widened. be able to.

  Also in the example shown in FIG. 3, the first thin film wiring 14 and the second thin film wiring 32 overlap with each other in a plan view facing the upper surface and the lower surface of the bonding layer 2. As a result, due to the thermal stress due to the thermal expansion difference between the ceramic substrate 1 and the resin layer 31 (resin substrate 3), it is applied to the joint portion between the conductor 22 of the joining layer 2 and the first and second thin film wirings 14, 32. The stresses are approximately the same on the upper and lower sides of the bonding layer 2 (the ceramic substrate portion 1A side and the resin substrate portion 3A side).

Therefore, as in the case of the wiring board of the above-described embodiment, the generation of peeling stress and the concentration of stress are reduced, and the stress applied to each joining portion is almost equal to the ceramic substrate 1 and the resin layer 31 (resin substrate 3). ) And the thermal stress level. Accordingly, it is possible to provide a wiring board having high connection reliability as a whole because the breakage at the joint portion due to generation of peeling stress or stress concentration is suppressed.

  In the case of this example, the plurality of power supply electrodes and ground electrodes of the semiconductor element are electrically connected to the first and second thin film wirings 14 and 32 as power supply wirings or grounding wirings having a relatively large area. Therefore, it is easy to stabilize the potentials of the power supply and the ground.

  Another modification of the wiring board of the embodiment is shown in FIG. FIG. 4 is a cross-sectional view at positions corresponding to the lines AA and BB in FIG. 4A is a cross-sectional view illustrating another modification of FIG. 2A, and FIG. 4B is a cross-sectional view illustrating another modification of FIG.

  Also in the example shown in FIG. 4, the first thin film wiring 14 and the second thin film wiring 32 include the power wiring, the ground wiring, and the signal wiring, respectively, and the areas of the power wiring and the ground wiring are as follows. It is larger than the area of the signal wiring. For example, each of the power supply wiring, the ground wiring, and the signal wiring is electrically connected to a plurality of electrodes (power supply electrode, ground electrode, or signal electrode) corresponding to the semiconductor element. Among these, the first and second thin film wirings 14 and 32 as the grounding wiring are regarded as a plurality of grounding wirings corresponding to the plurality of grounding electrodes being made common and widened. Can do.

  Further, the power supply wirings are arranged as a plurality of first thin film wirings 14 and second thin film wirings 32 that are independent from each other so as to be electrically connected to the power supply electrodes of the semiconductor elements. However, the first thin film wiring 14 and the second thin film wiring 32 as the power supply wiring have a larger area than the first thin film wiring 14 and the second thin film wiring 32 for signals.

  Also in the example shown in FIG. 4, the first thin film wiring 14 and the second thin film wiring 32 overlap each other in a plan view facing the upper surface and the lower surface of the bonding layer 2. As a result, due to the thermal stress due to the thermal expansion difference between the ceramic substrate 1 and the resin layer 31 (resin substrate 3), it is applied to the joint portion between the conductor 22 of the joining layer 2 and the first and second thin film wirings 14, 32. The stresses are approximately the same on the upper and lower sides of the bonding layer 2 (the ceramic substrate portion 1A side and the resin substrate portion 3A side).

  Therefore, as in the case of the wiring board of the above-described embodiment, the generation of peeling stress and the concentration of stress are reduced, and the stress applied to each joining portion is almost equal to the ceramic substrate 1 and the resin layer 31 (resin substrate 3). ) And the thermal stress level. Accordingly, it is possible to provide a wiring board having high connection reliability as a whole because the breakage at the joint portion due to generation of peeling stress or stress concentration is suppressed.

  In the case of this example, since the plurality of ground electrodes of the semiconductor element are electrically connected to the first and second thin film wires 14 and 32 as the ground wires having a relatively large area, the ground potential Is more stable.

  Furthermore, in this example, since the area of the first and second thin film wirings 14 and 32 that is the power supply wiring is relatively large (for example, compared with that for the signal), the potential of the power supply is further stabilized. You can also. In this case, since all of the first and second thin film wirings 14 and 32 as the power supply wiring are not integrated into one, for example, freedom of design when dealing with the arrangement of the power supply electrodes of the semiconductor element, etc. It is advantageous in terms of degree.

For example, in the wiring substrate having the form as shown in FIG. 4, the first and second thin film wirings 14 and 32 as the power supply wirings are not necessarily electrically connected to one power supply electrode, but a plurality of them. It may be connected to the power supply electrode. That is, the first and second thin film wirings 14 and 32 for signals are electrically connected to one signal electrode, respectively, and the first and second thin film wirings 14 and 32 for grounding are respectively provided in the semiconductor element. The first and second thin-film wirings 14 and 32 for power supply are respectively connected to a plurality of groups each including a plurality of power supply electrodes included in the semiconductor element. It may be in the form of being electrically connected.

  Note that the present invention is not limited to the above-described embodiment, and various modifications are possible within the scope of the gist of the present invention. For example, the bonding layer 2 may include a plurality of sub-bonding layers (not shown), and each sub-bonding layer may be made of different resin materials. In this case, a resin material suitable for each of the ceramic substrate 1 and the resin substrate 3 may be properly used for the sub-bonding layers on the ceramic substrate 1 side (lower side) and the resin substrate 3 side (upper side). The sub-bonding layer may include the bonding resin layer 21 as described above, for example.

  Further, the conductor 22 of the joining portion 2A is not limited to the through conductor (joining layer penetrating conductor) penetrating the joining layer 2 in the thickness direction, and the lateral direction (X− (Y direction) may be included.

  Also in the example shown in FIG. 2, the first thin film wiring 14 and the second thin film wiring 32 may each include a power supply wiring, a ground wiring, and a signal wiring.

  Further, the wiring board is not limited to a circuit board that is temporarily electrically connected to a semiconductor element or the like for a probe card, but may be used as a mounting board on which an electronic component such as a semiconductor element is mounted on an upper surface or the like. I do not care.

  FIG. 5 is a sectional view showing a modification of the wiring board shown in FIG. 6A is a cross-sectional view of the cross-section of the AA portion of the wiring board shown in FIG. 5, and FIG. 6B is a cross-sectional view of the cross-section of the BB portion viewed in plan. It is. In FIGS. 5 and 6, the same parts as those in FIGS. 1 and 2 are denoted by the same reference numerals.

  In the example shown in a sectional view in FIG. 5, as described above, the resin substrate portion 3 has the through conductor 33 that penetrates at least the lowermost resin layer 31. Further, in this example, at least a part of the through conductor 33 is located immediately above the ceramic through conductor 13. In other words, at least a part of the through conductor 33 that penetrates the lowermost resin layer 31 overlaps the ceramic through conductor 13 in a plan view.

  In such a case, with respect to the first thin film wiring 14 and the second thin film wiring 32 on the bonding layer 21 that are electrically connected to each other, a land pattern (a part that improves the electrical connectivity between them) The land pattern includes a portion having the same position in the upper and lower sides, or the same position as a whole.

  The land pattern is a part of the first thin film wiring 14 and the second thin film wiring 32, and is a part where the line width is wide in a circular shape. The conductor 22 of the joint 2A is directly connected to the land pattern. The land pattern may be elliptical or rectangular.

  With such a configuration, as shown in plan views in FIGS. 6A and 6B, the land pattern (part included in the signal wiring) that requires fine wiring becomes two places. That is, for example, the number of land patterns can be reduced from three land patterns as in the examples shown in FIGS. Therefore, an area (hereinafter referred to as a wiring area) necessary for routing a conductor portion including such a land pattern (no symbol as a conductor portion) can be reduced.

  Such a form in which the land pattern is reduced can increase the wiring density of the first thin film wiring 14 and the second thin film wiring 32. Among them, the signal wiring that requires particularly fine wiring is also included. Thus, the wiring density can be effectively increased. However, the first thin film wiring 14 and the second thin film wiring 32 are not limited to signal wiring, and may include other wirings such as grounding.

  The term “located directly above” means that the overlapping area of the through conductor 33 and the ceramic through conductor 13 that penetrates the lowermost resin layer 31 in plan view is about 30% of the area of the through conductor 33 in plan view. It may be more than about.

  FIG. 7 is a cross-sectional view showing another modification of the wiring board shown in FIG. 8A is a cross-sectional view of the cross-section of the AA portion of the wiring board shown in FIG. 7, and FIG. 6B is a cross-sectional view of the cross-section of the BB portion viewed in plan. It is. 7 and 8, the same parts as those in FIGS. 1 and 2 are denoted by the same reference numerals.

  In the example shown in the cross-sectional view of FIG. 7, the conductor 22 is a bonding layer through conductor 22, and at least a part of the bonding layer through conductor 22 is located immediately above the ceramic through conductor 13. In other words, at least a part of the bonding layer penetrating conductor 22 overlaps the ceramic penetrating conductor 13 in a plan view.

  In such a case, for the first thin film wiring 14 and the second thin film wiring 32 on the bonding layer 21 that are electrically connected, the through conductor 33 of the resin layer 31, the conductor (bonding layer through conductor) 22 and Portions connected to any of the ceramic through conductors 13 are connected to each other in a straight line. With such a configuration, as shown in plan views in FIGS. 8A and 8B, the signal wiring land patterns that require fine wiring are the first thin film wiring 14 and the second thin film wiring 32, respectively. There is one place for each of the wirings (the wiring is unsigned). Therefore, the above-described routing of the conductor portion is unnecessary. Therefore, for example, each of the first thin film wiring 14 and the second thin film wiring 32 may be composed of only a land pattern. Alternatively, even when the wiring is necessary, the necessary wiring area can be reduced.

  Also in this case, the land pattern is reduced, and the wiring density of the first thin film wiring 14 and the second thin film wiring 32 can be increased. In particular, among the first thin film wiring 14 and the second thin film wiring 32, the density of signal wiring that requires fine wiring can be further increased. Also in this example, the first thin film wiring 14 and the second thin film wiring 32 are not limited to signal wiring, and may include other wiring such as grounding.

  Further, as shown in a cross-sectional view in FIG. 7, when at least a part of the through conductor 33 is located immediately above the bonding layer through conductor 22, no wiring is required for connection between the through conductors 33. The density of the wiring of the insulating layer 31a (second thin film wiring 32, etc.) can be further increased.

1 ... Ceramic substrate
11 ・ ・ ・ ・ ・ Ceramic insulation layer
12 ・ ・ ・ ・ ・ Ceramic wiring conductor layer
13 ・ ・ ・ ・ ・ Ceramic through conductor
14 ・ ・ ・ ・ ・ First thin film wiring
15: Bottom terminal 2: Bonding layer
21 ... Joint resin layer
22 ・ ・ ・ ・ ・ Conductor (joining layer through conductor)
3 ... Resin substrate
31 …… Resin layer
31a ... Organic insulating layer
31b ... Adhesive layer
32 …… Second thin film wiring
33 ・ ・ ・ ・ ・ Penetration conductor
34 ・ ・ ・ ・ ・ Top terminal

Claims (6)

A ceramic substrate portion having a ceramic substrate having an upper surface, and a first thin film wiring provided on the upper surface of the ceramic substrate;
A resin substrate portion including a plurality of resin layers stacked on each other and having a lower surface facing the upper surface of the ceramic substrate; and a second thin film wiring provided on the lower surface of the resin substrate; ,
A lower surface and an upper surface; the lower surface is bonded to the upper surface of the ceramic substrate; the upper surface is bonded to the lower surface of the resin substrate; the first thin film wiring; 2 having a conductor having a conductor disposed in the bonding layer so as to be connected to the thin film wiring,
The wiring board, wherein the first thin film wiring pattern and the second thin film wiring pattern overlap each other in a plan view facing the upper surface and the lower surface of the bonding layer. 2. The wiring board according to claim 1, wherein a pattern of the first thin film wiring and a pattern of the second thin film wiring are the same as each other in a planar perspective facing the upper surface and the lower surface of the bonding layer. . The conductor of the joint includes a joint layer through conductor that has an end connected to the first thin film wiring and the second thin film wiring while passing through the joining layer in the thickness direction;
In a plan view facing the upper surface and the lower surface of the bonding layer, each bonding area of the bonding layer penetrating conductor with the first thin film wiring and the second thin film wiring is a central portion in the outer peripheral portion of the bonding layer. The wiring board according to claim 1, wherein the wiring board is larger than the wiring board. The resin substrate part has a through conductor penetrating at least the lowermost resin layer, and at least a part of the through conductor is located immediately above the ceramic through conductor. The wiring board in any one. The wiring board according to claim 1, wherein at least a part of the bonding layer through conductor is located immediately above the ceramic through conductor. The wiring substrate according to claim 1, wherein at least a part of the through conductor is located immediately above the bonding layer through conductor.