JP2016184366A - Timer correction device, timer correction method, and timer correction program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technique with which it is possible to make a signal outputted by a timer match with a time at which the cycle and signal outputted by a timer generated by a reference clock change even if a frequency of the clock is changed.SOLUTION: The cycle of a timer is corrected using a ratio of the number of pulses of a reference clock to the number of pulses of a clock inputted when a frequency has changed, and further a correction to make the phases of pulses outputted by the timer match is performed using a difference between the number of pulses of a reference clock and the number of pulses of a clock inputted when a frequency has changed.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a timer correction device, a timer correction method, and a timer correction program.

  The clock function in the information equipment is used for basic operations for information processing and various periodic processes in the operating system. In addition, this clock is used as a starting point for switching file date / time management, multitasking and time sharing system processes. Further, this clock is used by a driver of a device such as a peripheral device to determine that the processing request has timed out due to a failure of the device. Therefore, it is required to keep the time of the clock accurate.

  For example, in Patent Document 1, in an information processing apparatus capable of changing the frequency of a system clock, a ratio between a pulse count value before switching the system clock frequency and a pulse count value after switching the frequency is obtained. A technique for correcting a clock by correcting a count value after multiplying this by a certain constant and changing a clock frequency is described.

  In Patent Document 2, the first clock is counted, the number of clock pulses is measured, and when the input clock is changed from the first clock to the second clock, the number of pulses of the first clock The threshold value of the timer counter is corrected based on the ratio to the number of clock pulses. From the next timer interrupt, using the corrected threshold value of the new timer counter, the frequency of timer interrupt occurrence is equal to that before the input clock change, and the timer interrupt occurrence frequency is the same as before the input clock switching. A technique for adjusting to be described is described.

  In Patent Document 3, the period of a first clock that supplies a clock to the system is measured in advance using a second clock that is more accurate than the first clock, and the obtained measurement value is used. A technique for adjusting the time of a clock operated with a first clock is described.

  In Patent Document 4, a timer that operates by receiving a real clock is converted into a virtual timer that is proportional to a predetermined clock conversion coefficient, and an application is executed using the converted clock of the virtual timer, whereby the clock to be supplied is It describes a technology that softly absorbs the effect of time disturbance due to changes.

Japanese Patent Laid-Open No. 08-292822 JP2013-117785A Japanese Patent Laid-Open No. 10-049251 JP 2007-034672 A

  The technique described in Patent Document 1 can be set to an appropriate software timer value each time the clock frequency is changed, but the count-up excess or deficiency caused by increasing or decreasing the number of pulses in the process of changing the clock frequency, That is, it does not consider that the time is shifted. For this reason, the technique of Patent Document 1 can adjust the timer value to make the generation interval of the intelligent timer equal to that before the clock frequency change, but there is no means for storing the accumulated value of the count excess / deficiency, and the generation of the intelligent timer There is no means for making the timing, that is, the time equal to that before the clock frequency switching. Therefore, the technique of Patent Document 1 has a problem that the timer generation timing cannot be made equal to that before the clock frequency is changed.

  The technique described in Patent Document 2 can adjust the timer interrupt occurrence frequency to be the same as before the input clock switching. At this time, when the input clock becomes high speed, the timer threshold increases, and conversely, when the input clock becomes low speed, the timer threshold decreases. However, in the technique of Patent Document 2, the timer interrupt generation frequency is adjusted to the same frequency as before the clock switching by the timer threshold correction, but there is a problem that the timer interrupt generation timing does not match the timer interrupt generation timing before the clock switching. is there.

  The techniques described in Patent Document 3 and Patent Document 4 describe a technique for improving the accuracy of the clock cycle, but there is a problem that the timer interrupt generation timing before and after the clock switching cannot be matched. .

  An object of the present invention is to provide a timer correction device, a timer correction method, and a timer correction program that solve the above-described problems.

  Specifically, the main object of the present invention is to make the period and timing of a pulse output by a timepiece that is disturbed by the influence of the frequency change of the system clock coincide with a predetermined reference timing.

  A timer correction apparatus according to an aspect of the present invention includes a first clock oscillation unit that outputs a clock having a reference frequency, a second clock oscillation unit that outputs a frequency different from the first clock oscillation unit, An input clock selection unit that selects one of the first clock and the second clock and outputs the selected clock to the timer generation unit; and an input clock measurement unit that measures the number of pulses counted by the reference clock Comparing the number of pulses of each period counted by the clock measurement unit, and accumulating the excess / deficiency of the number of pulses, and the ratio and difference of the number of pulses measured by the input clock measurement unit. A pulse number ratio calculating unit for calculating, a timer threshold value correcting unit for giving a threshold value for a condition for the counter to output an interrupt signal from the ratio of the pulse number and the difference, and the input Counting the clock from the lock selector, and a timer generating unit which outputs the interrupt signal by the threshold.

  The input clock measurement unit receives the first clock, and receives the first clock pulse received between the first interrupt signal output from the timer generation unit and the second interrupt signal of the next cycle. The first measured value and the second measured value are pulsed by measuring the number as the first measured value, the measured value after measuring the first measured value as the second measured value, Output to the number ratio calculation unit, and the clock excess / deficiency accumulation unit adds the first accumulation value obtained in the previous cycle to the difference between the first measurement value and the second measurement value. The second cumulative value is obtained, and the second cumulative value calculated by substituting the second cumulative value into the first cumulative value by addition of the next period is used as the clock excess / deficiency number. The pulse number ratio calculation unit outputs the first measurement value to the timer threshold value correction unit and stores the first measurement value. A second storage unit that stores the second measurement value, determination information as to whether or not the first measurement value and the second measurement value match, and the first measurement value A determination unit that outputs a ratio to the second measurement value to a timer threshold value correction unit, wherein the timer threshold value correction unit receives the determination information and the determination value from the determination unit of the pulse number ratio calculation unit. It receives ratio information, calculates the threshold value of the counter of the timer generation unit, stores the threshold value, outputs the threshold value to the timer generation unit, and the timer generation unit is a clock output from the input clock selection unit. Count, set the count value to the threshold output by the timer threshold value correction unit, count down the counter, and when the counter reaches 0, the timer generation unit outputs the first interrupt signal and the first interrupt signal. 2 interrupt signals and Is output to the clock measuring unit and an external device.

  One aspect of the timer correction method according to the present invention oscillates a first clock that is a reference frequency, oscillates a second clock having a frequency different from the first clock, receives the first clock, The first measured value is measured by measuring the number of pulses of the first clock received between the first interrupt signal and the second interrupt signal of the next period, and the first measured value is measured. The first measured value and the second measured value are output to the pulse number ratio calculation unit using the measured value after the measurement as the second measured value, and the first measured value and the second measured value. Is added to the first accumulated value obtained in the previous cycle to obtain the second accumulated value, and the second accumulated value is added to the first accumulated value by adding the next cycle. The second cumulative value calculated recursively by substituting is output, and the first measured value and the second measured value are output. The judgment information as to whether or not they match and the ratio between the first measurement value and the second measurement value are output, the judgment information and the ratio information are received, the threshold value of the counter is calculated, and The threshold value is stored, the threshold value is output, the clock is output by the input clock selection unit, the count is set to the threshold value, the counter is counted down, and when the counter reaches 0, the timer The generation unit outputs the first interrupt signal and the second interrupt signal to the clock measurement unit and the external device.

  A timer correction program according to one aspect of the present invention oscillates a first clock that is a reference frequency, oscillates a second clock having a frequency different from the first clock, receives the first clock, The first measured value is measured by measuring the number of pulses of the first clock received between the first interrupt signal and the second interrupt signal of the next period, and the first measured value is measured. The first measured value and the second measured value are output to the pulse number ratio calculation unit using the measured value after the measurement as the second measured value, and the first measured value and the second measured value. Is added to the first accumulated value obtained in the previous cycle to obtain the second accumulated value, and the second accumulated value is added to the first accumulated value by adding the next cycle. The second cumulative value calculated recursively by substituting is output, and the first measured value and the second accumulated value are output. Outputs judgment information as to whether or not the measurement values match and a ratio between the first measurement value and the second measurement value, receives the judgment information and the ratio information, and calculates the threshold value of the counter Then, the threshold value is stored, the threshold value is output, the count is performed with the clock output from the input clock selection unit, the count value is set as the threshold value, and the counter is counted down. , Causing the computer to execute a process of outputting the first interrupt signal and the second interrupt signal from the timer generation unit to the clock measurement unit and an external device.

  In the present invention, when a plurality of clock oscillation devices having different frequencies are mounted and any one of them is supplied to the timer, the signal output by the timer is output even if the clock frequency is arbitrarily switched. The period of the timer generated by the reference clock and the timing at which the signal changes can be matched.

It is a block diagram of timer correction device 1 in a 1st embodiment of the present invention. It is a flowchart which shows operation | movement of the timer correction apparatus 1 of this invention. It is a timing chart figure of operation of timer amendment device 1 of the present invention. It is a timing chart figure of operation of timer amendment device 1 of the present invention. It is a figure which shows the numerical formula which prescribes | regulates the state of the timer correction apparatus 1 of this invention. It is a figure which shows the numerical formula which prescribes | regulates the state of the timer correction apparatus 1 of this invention.

[First Embodiment]
A first embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a diagram showing a timer correction apparatus 1 according to the first embodiment of the present invention.

  The timer correction device 1 includes a first clock oscillation unit 10, a second clock oscillation unit 11, a clock measurement unit 13, an input clock selection unit 12, a pulse number ratio calculation unit 14, and a clock excess / deficiency accumulation unit. 15, a timer threshold value correction unit 16, and a timer generation unit 17.

  The pulse number ratio calculation unit 14 includes a first storage unit 3, a second storage unit 4, and a determination unit 5.

  The first clock oscillation unit 10 is connected to the clock measurement unit 13 and the input clock selection unit 12. The second clock oscillator 11 is connected to the input clock selector 12. The first clock oscillator 10 and the second clock oscillator 11 can be mounted in any number of two or more. Further, the frequency of the first clock oscillator 10 and the second clock oscillator 11 may be variable.

  The input clock selection unit 12 selects a pulse from the first clock oscillation unit 10 or the second clock oscillation unit 11 and supplies the selected pulse to the timer generation unit 17. It is assumed that the first clock oscillation unit 10 is selected in the initial state of the timer correction device 1.

  The pulse number ratio calculation unit 14 and the clock excess / deficiency accumulation unit 15 are connected to the timer threshold value correction unit 16. The pulse number ratio calculation unit 14 is connected to the clock excess / deficiency accumulation unit 15. The clock measurement unit 13 is connected to the pulse number ratio calculation unit 14.

  The timer threshold correction unit 16 is connected to the timer generation unit 17. The timer threshold value correcting unit 16 outputs the corrected timer threshold value 110 to the timer generating unit 17. The timer generation unit 17 counts the clock received from the input clock selection unit 12 and outputs an interrupt signal 100 when it becomes equal to a predetermined threshold value. The interrupt signal 100 output from the timer generation unit 17 is supplied to the clock measurement unit 13 and an external device. The external device is an information processing device such as a computer. The present invention is not limited to the configuration shown in FIG.

  The operation of the timer correction device 1 will be described with reference to the flowchart shown in FIG.

  The first clock oscillating unit 10 and the second clock oscillating unit 11 are activated by turning on the power or an operator or the like, and start oscillating at the respective frequencies (S10).

  The signals of the first clock oscillation unit 10 and the second clock oscillation unit 11 are output to the input clock selection unit 12. The input clock selection unit 12 selects any one signal and supplies it to the timer generation unit 17 (S20).

  The clock measurement unit 13 starts measuring the clock from the first clock oscillation unit 10 (S30).

  On the other hand, the timer generation unit 17 performs counting based on the clock selected by the input clock selection unit 12. The timer generation unit 17 outputs a timer interrupt signal 100 when the count number of the timer generation unit 17 reaches a preset timer threshold value (S40).

  Here, in the timer correction apparatus 1 according to the first embodiment of the present invention, the measured value of the number of pulses by the clock measurement unit 13 at the time when the clock measuring unit 13 enters the steady operation state after the initialization stage performed after power-on is set to X0. . X0 is stored in the first storage unit 3 provided in the pulse number ratio calculation unit 14. Further, after the observation of X0 is completed and X0 is stored in the first storage unit 3, the measured value of the number of pulses similarly measured by the clock measurement unit 13 is defined as Xn. The second storage unit 4 stores Xn. Xn is transmitted to the determination unit 5 and the clock excess / deficiency unit 15, and further transmitted from the clock excess / deficiency unit 15 to the timer threshold value correction unit 16. The argument n is an integer given to uniquely distinguish the state between the interrupt signal 100 and the next interrupt signal 100 to be generated. For example, when a certain point in time when the timer correction apparatus is operating is determined as state 0, in this state, the measured value of the number of pulses of the clock measurement unit 13 is X0. Similarly, the measured value of the number of pulses of the clock measurement unit 13 when the operation of the timer correction device transitions from state 0 to state 1 is X1. Therefore, the state sequentially changes and the measured value in state n becomes Xn.

  When the count number of the timer generation unit 17 reaches a preset threshold value, the timer generation unit 17 outputs the interrupt signal 100 and transmits it to the clock measurement unit 13 (S50).

  The clock measurement unit 13 reads the numerical value Xn counted until the interrupt signal 100 is received and outputs it to the pulse number ratio calculation unit 14 (S60). Xn received by the pulse number ratio calculation unit 16 is stored in the second storage unit 4.

  The determination unit 5 reads X0 from the first storage unit 3 and Xn from the second storage unit 4. The determination unit 5 outputs a determination result as to whether X0 = Xn to the timer threshold value correction unit 16. The determination unit 5 calculates the ratio between X0 and Xn and outputs it to the timer threshold value correction unit 16 (S70).

  When X0 = Xn (S70 = Yes), the timer threshold value correction unit 16 calculates the correction timer threshold value 110 according to equation (2) (described later) for calculating the threshold value (S80).

  When X0 ≠ Xn (S70 = No), the timer threshold value correction unit 16 calculates the correction timer threshold value 110 according to the equation (1) (described later) for calculating the threshold value (S90).

  The correction timer threshold 110 is used by the timer generation unit 17 to determine whether to issue the interrupt signal 100, and is overwritten on the timer threshold described above (S100).

  The clock excess / deficiency accumulating unit 15 calculates a difference in numerical values between X0 and Xn and temporarily stores a clock excess / deficiency accumulated value (referred to as An). An is stored for two generations, and An and the next state An + 1 are stored (S110).

  Thereafter, the flow returns to S30, and the flow is repeated from the operation of the clock measurement unit 13.

  Here, the calculation performed by the timer threshold value correction unit 16 will be described.

  First, it is assumed that the timer correction device 1 operates and the interrupt signal 110 is continuously output from the timer generation unit 17. A period from when the interrupt signal 110 is output until the next interrupt signal 110 is output is expressed as a state. Each state is assigned n (integer) as an identifier, and the nth state is referred to as state n. Further, the state in which the period of the state n is finished and is operating next is referred to as a state n + 1. The state numbers in the description of this example indicate that states are continuous, such as state n, next state n + 1, and further next state n + 2.

  Next, parameters required for calculation and their contents will be described. First, there is X0 which is a reference value of the pulse number measurement value in state 0, that is, the 0th state, and state n, that is, Xn whose state is the nth pulse number measurement value. Here, the difference between X0 and each Xn (all of n = 1 to n) from state 0 to state Xn is added to obtain the accumulated value. This accumulated value is the clock excess / deficiency number An. There are two types of formulas for calculating the threshold value, and one of the formulas is selected depending on whether X0 and Xn match. Details of the formula will be described later. In this description, Xn, An, and an argument n of Yn, which will be described later, indicate respective values in the state n.

First, calculation when the values of X0 and Xn do not match will be described. This condition means that the cycle in which the interrupt signal 100 in the state 0 is generated differs from the cycle in which the interrupt signal 100 is generated in the state n. Therefore, first, the correction timer threshold 110 is calculated in order to match the periods. Assuming that the value of the correction timer threshold 110 in the state n is Yn and the value of the correction timer threshold 110 in the next state n + 1 is Yn + 1, Yn + 1 is calculated by the following equation (1).
Yn + 1 = Yn * X0 / Xn (1)
The count value of the timer generation unit 17 thereafter is corrected by this new threshold value. This equation (1) calculates the ratio between the reference count number X0 and the count number Xn in the state n, and assigns the ratio to the value of the correction timer threshold 110 in the state n. Thus, the count number is matched by allocating the increase / decrease of the count number due to the change in the clock frequency to the reference value X0. Therefore, finally, X0 = Xn is adjusted.

Further, the cumulative value An + 1 of the number of clock excess / deficiency is calculated by the following equation (3).
An + 1 = An + X0−Xn (3)
Next, calculation when X0 and Xn match will be described.

  This condition means that the cycle in which the interrupt signal 100 in the state 0 is generated coincides with the cycle in which the interrupt signal 100 is generated in the state n. However, as a result of changing the threshold value of the timer to match the cycle, there are states in which the timing at which the interrupt signal 100 is output differs between the state 0 and the state n. This is a state where the clock excess / deficiency An is not zero. Therefore, the correction timer threshold 110 is calculated in order to match the timing at which the interrupt signal 100 is output in the state 0 and the timing of the interrupt signal 100 in the state n.

Assuming that the value of the correction timer threshold 110 in state n is Yn and the value of the correction timer threshold 110 for the timer operation in the next state n + 1 is Yn + 1, Yn + 1 is calculated by the following equation (2).
Yn + 1 = Yn * (X0 + An) / Xn (2)
In this equation (2), after reaching X0 = Xn, the number of pulses is corrected by adding the clock excess / deficiency number An to X0 in order to correct the difference between the switching timing of X0 and the switching timing of Xn. This is an equation for calculating a timing correction value that takes into account the correction of the timing that has been performed and shifted after switching to Xn.

Further, the cumulative value An + 1 of the number of clock excess / deficiency is calculated by the following equation (4).
An + 1 = An + X0−Xn (4)
Here, the operation example of the timer correction device 1 shown in FIG. 1 is a timing chart of FIGS. 3A and 3B, and a table showing numerical formulas that define the state of the timer correction device 1 of FIGS. 4A and 4B. It demonstrates more concretely using.

  3A and 3B show the clock waveform of the first clock oscillating unit 10, the clock oscillation waveform of the second clock oscillating unit 11, the correction timer threshold 110, the number of clock pulses, the timing at which the interrupt signal 100 is generated, The relationship between the small timings of the interrupt signal 100 originally expected is shown in the figure.

  4A and 4B show the formulas and values for calculating the number of clock pulses (X0, Xn) and the number of clock excess / deficiency (An, An + 1) measured by the clock measurement unit 13, and the correction timer threshold 110 (Yn, Yn + 1). Is a diagram illustrating an equation for calculating the value and its value. The states 0 to 6 described in FIGS. 3A and 3B correspond to the states 0 to 6 described in FIGS. 4A and 4B, respectively.

  Next, with reference to FIG. 3A, FIG. 3B, FIG. 4A and FIG. 4B, the correction of the cycle of the interrupt signal 100 and the operation for matching the timing with the reference timing will be described in stages 1 to 6.

  Here, the definition of the steady state of this example will be described. In the steady state, the timer correction device 1 is turned on, the initial values are set for the timer generation unit 17 and the clock measurement unit 13, the operation is started, and then the pulse measured by the clock measurement unit 13 is measured. A state in which a number of transient fluctuations converge and a specific value is continuously output.

(Explanation 1)
In the steady state, it is assumed that the clock of the low-speed first clock oscillation unit 10 is selected as the input clock of the timer generation unit 17 (FIG. 3A_state 0, FIG. 4A_state 0). At this time, the clock measurement unit 13 measures the number of pulses from the first clock oscillation unit 10 measured between the interrupt signal 100 output from the timer generation unit 17 and the next interrupt signal 100, and the value is measured as X0. And The count of the timer generation unit 17 is executed by the clock of the low-speed first clock oscillation unit 10 to output the interrupt signal 100, and the timer threshold value correction unit 16 calculates the next correction timer threshold value Yn (FIG. 3A_state 1, FIG. 4A_state 1). In the steady state (in this example, the state 0 and the state before the state 0 correspond), the pulse of the first clock oscillation unit 10 and the clock input to the timer generation unit 17 are the same, and the clock measurement unit 13 performs measurement. The number of clock pulses between the interrupt signal 100 to be interrupted and the interrupt signal 100 next does not change. Further, in the steady state, there is no clock excess / deficiency, and the clock excess / deficiency number A0 is zero. Since the condition of X0 = Xn is satisfied for the correction timer threshold value Y1 in the next state 1, the above-described equation (2) is applied. Therefore, with respect to the correction timer threshold value Y0 in the previous state 0, Y1 = Y0 * (X0 + A0) / X0 = Y0 = 5, which is equal to the previous correction timer threshold value. That is, in the steady state, timer interrupts are generated at intervals of the first clock pulse number X0. The clock excess / deficiency accumulating unit 15 calculates the clock excess / deficiency number A1 to obtain A1 = A0 + X0−X0 = 0. The clock excess / deficiency accumulating unit 15 stores A1.

(Description 2)
The operation in state 1 will be described. The timer threshold value Y1 = 5 calculated in the above-described state 0 is set as the threshold value of the timer generation unit 17, and the count is executed.

  Before the timer interrupt signal 100 is generated, the clock of the low-speed first clock oscillation unit 10 is switched to the clock of the high-speed second clock oscillation unit 11 (FIG. 3A_state 1, FIG. 4A_state 1). .

  Although the count speed of the timer generation unit 17 is increased by switching to the clock to the high-speed second clock oscillation unit 11, the correction timer threshold 110 remains applied as Y0 equal to the steady state. The correction timer interrupt signal 100 is generated in a short time (FIG. 3A_rear end portion of state 1, FIG. 4A_state 1).

  The number of clock pulses of the first clock oscillating unit 10 measured by the clock measuring unit 13 during the period of state 1 is X1. Since the clock frequency of the second clock 11 supplied to the timer generation unit 17 is higher than the clock frequency of the first clock 10, a timer interrupt is generated earlier than in the normal state. X1 <X0. Therefore, in order to keep the generation frequency of the interrupt signal 100 of the timer generation unit 17 the same as the steady state even after the input clock of the timer generation unit 17 is switched to a high-speed clock, the timer generation in the next state 2 The correction timer threshold 110 for the unit 17 needs to be increased with respect to Y1, which is the correction timer threshold applied to the current state 1.

  Here, since the condition of X0 ≠ X1 (X0 = 5 and X1 = 4 when referring to state 1 in FIG. 3A) is satisfied, the correction timer for the next state 2 is applied by applying the above-described equation (1). A threshold value Y2 is calculated. The timer threshold value correction unit 16 obtains Y2 = Y1 * X0 / X1≈6.

  In addition, the number of clock pulses of the first clock oscillation unit 10 to be originally measured while the timer interrupt signal 100 is generated is X0, but since the actually measured number of clock pulses is X1, the timing at which the timer interrupt occurs There is a deviation of X0-X1 compared to the steady state. Further, since the condition of X0 ≠ X1 is satisfied, the clock excess / deficiency accumulating unit 15 calculates the clock excess / deficiency number A2 by applying the above-described equation (3) to obtain A2 = A1 + X0−X1 = 1. The clock excess / deficiency accumulating unit 15 stores A2.

(Explanation 3)
Next, state 2 will be described. Assume that the high-speed second clock is still supplied as the input clock (FIG. 3A_state 2 to state 3, FIG. 4A_state 2 to state 3). The interrupt signal 100 is generated based on the corrected timer threshold Y2. The previous time, the input clock of the timer generation unit 17 was switched from the middle to the clock of the second clock oscillation unit 11, whereas this time the first time from the beginning. 2 is operating with the clock of the clock oscillator 11, the timer interrupt is generated at a shorter interval than the previous time (FIG. 3A_state 2 rear end portion, FIG. 4A_state 2). At this time, the number of clock pulses measured by the clock measurement unit 13 during the period of state 2 is assumed to be X2. Since the interrupt signal 100 is generated earlier than the previous time, X2 <X1 <X0. The condition is X0 ≠ X2. Therefore, the timer threshold value correction unit 16 calculates the correction timer threshold value Y3 of the next state 3 by applying the above-described equation (1) to obtain Y3 = Y2 * X0 / X2 = 10. Thus, if the clock input to the timer generation unit 17 remains the clock output from the second clock 11, the number of clock pulses from the first clock oscillation unit 10 measured in the next state 3 period Becomes the same value as in the steady state. Since the condition of X0 ≠ X2 is satisfied, the clock excess / deficiency part accumulating unit 15 calculates the clock excess / deficiency number A3 by applying the above-described equation (3), and sets A3 = A2 + X0−X2 = 3. obtain. The clock excess / deficiency accumulating unit 15 stores A3.

(Explanation 4)
In the next state 3 as well, it is assumed that the input clock is still supplied from the high-speed second clock 11 (FIG. 3A_state 3 and FIG. 4A_state 3). Since the correction timer threshold Y3 calculated in the state 3 is larger than Y2 and the input clock does not change, a timer interrupt is generated at a longer interval than the previous time, and the interval becomes equal to that in the normal state (FIG. 3B_the rear end of the state 3). Part of FIG. 4B_state 3). At this time, the number of clock pulses of the first clock oscillation unit 10 measured by the clock measurement unit 13 is X3. Since the interval at which the interrupt signal 100 is generated is equal to the constant time, X3 = X0. Since the condition of X3 = X0 is satisfied, the above-described equation (2) is applied to the calculation of the correction timer threshold Y4. The timer threshold value correction unit 16 calculates the correction timer threshold value Y4 of the next state 4 to obtain Y4 = Y3 * (X0 + A3) / X3 = 16. Since X3 = X0, it can be said that Y4 = Y3 * (X0 + A3) / X0. Further, since the condition of X3 = X0 is satisfied, the above equation (4) is applied to the calculation of the clock excess / deficiency number A4. The clock excess / deficiency accumulating unit 15 calculates the clock excess / deficiency number A4 to obtain A4 = A3 + X0−X3 = 3. The clock excess / deficiency accumulating unit 15 stores A4 (in this case, the excess / deficiency number does not change).

(Explanation 5)
In the next state 4 as well, it is assumed that the clock input to the timer generator 17 remains the clock output from the high-speed second clock 11 (FIG. 3B_state 4 and FIG. 4B_state 4). Since the correction timer threshold Y4 is larger than Y3 and the input clock does not change, a timer interrupt occurs at an interval longer than the previous time (FIG. 3B_state 4 rear end portion, FIG. 4B_state 4). At this time, the number of clock pulses of the first clock oscillation unit 10 measured by the clock measurement unit 13 is X4. Since the frequency of the input clock has not changed from the previous time, and the correction timer threshold value corrected last time is increased by the number of clock excess / deficiency, X4 = X3 + A3. Since the condition of X4 ≠ X0 is satisfied, the above equation (1) is applied to the calculation of the correction timer threshold Y5. The timer threshold value correction unit 16 calculates the correction timer threshold value Y5 of the next state 5 to obtain Y5 = Y4 * X0 / X4 = 10. As described in (Description 4), since Y4 = Y3 * (X0 + A3) / X3 and X3 = X0, the next correction timer threshold Y5 is equal to the correction timer threshold Y3 from the previous time. The correction timer threshold value Y3 of the last time is a value that becomes equal to the timer interrupt generation interval in the steady state when the input clock is the clock of the second clock oscillation unit 11. Further, since the condition of X4 ≠ X0 is satisfied, the above equation (3) is applied to the calculation of the clock excess / deficiency number A5. The clock excess / deficiency accumulating unit 15 calculates the clock excess / deficiency number A5 to obtain A5 = A4 + X0−X4 = 0. The clock excess / deficiency accumulating unit 15 stores A5.

(Explanation 6)
It is assumed that the input clock remains the second high-speed clock during the next state 5 (FIG. 3B_state 5 and FIG. 4B_state 5). Since the correction timer threshold Y5 corrected last time is smaller than Y4 and the input clock does not change, a timer interrupt is generated at an interval shorter than the previous time (the last part of FIG. 3B_state 5, FIG. 4B_state 5). The number of clock pulses of the first clock oscillation unit 10 measured at this time and measured by the clock measurement unit 13 is assumed to be X5. Since there is no change in the input clock frequency and the correction timer threshold Y5 is equal to the correction timer threshold Y3 of the previous time, X5 = X3 = X0. Since the condition of X5 = X0 is satisfied, the above equation (2) is applied to the calculation of the correction timer threshold Y6. The timer threshold value correction unit 16 calculates the correction timer threshold value Y6 of the next state 6 using the equation Y6 = Y5 * (X0 + A5) / X5. However, since X5 = X0, Y5 = Y3, and A5 = 0, the correction is performed. The timer threshold Y6 is equal to the correction timer threshold Y3 and becomes 10. Therefore, unless the input clock frequency is changed, the timer interrupt generation interval is equal to the steady-state timer interrupt generation interval. Further, since the condition of X5 = X0 is satisfied, the above equation (4) is applied to the calculation of the clock excess / deficiency number A6. The clock excess / deficiency accumulating unit 15 calculates the clock excess / deficiency number A6 to obtain A6 = A5 + X0−X5 = 0. The clock excess / deficiency accumulating unit 1 stores A6.

  As described above, the interval at which the interrupt signal 100 is generated after the input clock is switched is equal to that before the input clock is switched, and the timer interrupt generation timing after the input clock is switched is also the same as that before the input clock is switched. The same applies when the input clock is changed from the high-speed clock to the low-speed clock.

  As described above, the timer correction apparatus 1 according to the first embodiment of the present invention can match the cycle and phase of the interrupt signal before switching even when switching to clocks having different frequencies. The reason is that in addition to correction for adjusting the period, correction for adjusting the phase can be performed.

DESCRIPTION OF SYMBOLS 1 Timer correction apparatus 3 1st memory | storage part 4 2nd memory | storage part 5 Judgment part 10 1st clock oscillation part 11 2nd clock oscillation part 12 Input clock selection part 13 Clock measurement part 14 Pulse number ratio calculation part 15 Clock Excess / deficiency accumulating unit 16 Timer threshold correcting unit 17 Timer generating unit 100 Interrupt signal 110 Correction timer threshold

Claims (9)

First clock oscillation means for outputting a clock having a reference frequency;
Second clock oscillation means for outputting a frequency different from that of the first clock oscillation means;
An input clock selection unit that selects one of the first clock and the second clock and outputs the selected clock to the timer generation unit;
An input clock measurement unit that measures the number of pulses counted by the reference clock;
Compare the number of pulses in each cycle counted by the clock measurement unit, and accumulate the excess / deficiency of the number of pulses, and a clock excess / deficiency accumulation unit,
A pulse number ratio calculation unit for calculating a ratio and difference between the pulse numbers measured by the input clock measurement unit;
A timer threshold value correction unit that gives a threshold value for the condition that the counter outputs an interrupt signal from the ratio of the number of pulses and the difference;
A timer generation unit that counts with the clock from the input clock selection unit and outputs the interrupt signal according to the threshold;
With
The input clock measuring unit receives a first clock, and receives the first clock received between the first interrupt signal output from the timer generating unit and the second interrupt signal of the next cycle. The first measured value and the second measured value are obtained by measuring the number of pulses as the first measured value, and the measured value after measuring the first measured value as the second measured value. Output to the pulse number ratio calculator,
The clock excess / deficiency accumulating unit obtains a second accumulated value by adding the first accumulated value obtained in the previous cycle to the difference between the first measured value and the second measured value, In the addition of the next period, the second cumulative value that is recursively calculated by substituting the second cumulative value into the first cumulative value is output to the timer threshold value correction unit as a clock excess / deficiency number,
The pulse number ratio calculation unit includes a first storage unit that stores the first measurement value;
A second storage unit for storing the second measurement value;
The determination information as to whether or not the first measurement value and the second measurement value match, and the ratio between the first measurement value and the second measurement value are output to a timer threshold value correction unit. A determination unit;
Including
The timer threshold value correction unit receives the determination information and the ratio information from the determination unit of the pulse number ratio calculation unit, calculates the threshold value of the counter of the timer generation unit, stores the threshold value, and stores the threshold value. Is output to the timer generator,
The timer generation unit counts with the clock output from the input clock selection unit, sets the count value to the threshold value output by the timer threshold value correction unit, counts down the counter, and when the counter reaches 0 The timer generation unit outputs the first interrupt signal and the second interrupt signal to the clock measurement unit and an external device.
Timer correction device.   2. The timer correction apparatus according to claim 1, wherein one of the plurality of calculation formulas for obtaining the predetermined ratio is selected and calculated by the operation of software or an operator.   3. The timer correction apparatus according to claim 1, wherein the second clock oscillation unit arbitrarily changes the frequency by a program or an operator's operation. Oscillate the first clock that is the reference frequency,
Oscillating a second clock having a different frequency from the first clock;
Receiving the first clock, measuring the number of pulses of the first clock received between the first interrupt signal and the second interrupt signal of the next period as a first measurement value, The measurement value after measuring the first measurement value is set as the second measurement value, and the first measurement value and the second measurement value are output to the pulse number ratio calculation unit,
The difference between the first measured value and the second measured value is added to the first accumulated value obtained in the previous period to obtain a second accumulated value, and in the addition of the next period, Outputting the second cumulative value recursively calculated by substituting the second cumulative value for the first cumulative value;
A determination information as to whether or not the first measurement value and the second measurement value match, and a ratio between the first measurement value and the second measurement value;
Receiving the judgment information and the ratio information, calculating the threshold value of the counter, storing the threshold value, and outputting the threshold value;
Counting with the clock output from the input clock selection unit, setting the count value as a threshold and counting down the counter, and when the counter reaches 0, the timer generation unit outputs the first interrupt signal and A timer correction method for outputting the second interrupt signal to the clock measurement unit and an external device.   The timer correction method according to claim 4, wherein any one of the plurality of calculation formulas for obtaining the predetermined ratio is selected.   6. The timer correction method according to claim 4, wherein the frequency of the second clock is arbitrarily changed. Oscillate the first clock that is the reference frequency,
Oscillating a second clock having a different frequency from the first clock;
Receiving the first clock, measuring the number of pulses of the first clock received between the first interrupt signal and the second interrupt signal of the next period as a first measurement value, The measurement value after measuring the first measurement value is set as the second measurement value, and the first measurement value and the second measurement value are output to the pulse number ratio calculation unit,
The difference between the first measured value and the second measured value is added to the first accumulated value obtained in the previous period to obtain a second accumulated value, and in the addition of the next period, Outputting the second cumulative value recursively calculated by substituting the second cumulative value for the first cumulative value;
A determination information as to whether or not the first measurement value and the second measurement value match, and a ratio between the first measurement value and the second measurement value;
Receiving the judgment information and the ratio information, calculating the threshold value of the counter, storing the threshold value, and outputting the threshold value;
Counting with the clock output from the input clock selection unit, setting the count value as a threshold and counting down the counter, and when the counter reaches 0, the timer generation unit outputs the first interrupt signal and The timer correction program which makes a computer perform the process which outputs a said 2nd interruption signal to the said clock measurement part and an external device.   8. The timer correction program according to claim 7, wherein a process of selecting any one of the plurality of calculation formulas for obtaining the predetermined ratio is performed.   The timer correction program according to any one of claims 7 to 8, wherein a process for arbitrarily changing a frequency of the second clock is performed.

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