KR20070016434A - Real time clock apparatus and the real time compensating method thereof - Google Patents

Abstract

The present invention relates to a Real Time Clock (RTC), and more particularly, to an RTC device and a current time correction method of the ALTC device for automatically correcting a time error occurring over time. will be.

The RTC (RTC) device of the present invention includes an RTC oscillation unit for outputting an RTC clock; A system clock oscillation unit for providing a system clock for error correction and driving of the system of the ALTC oscillation unit; After receiving the clock signal of the RTC oscillator, it calculates and outputs a current time, periodically detects error information having an error value and an accumulated error value of the RTC clock with respect to the system clock, and then uses the error information. It is characterized in that it comprises a RCT time output unit for correcting the output current time output.

RTC, current time, system clock, correction, error information

Description

Real time clock apparatus and the real time compensating method

1 is a schematic block diagram of an AltiC apparatus of the prior art,

2 is a schematic block diagram of an RTC apparatus according to an embodiment of the present invention,

3 is a flowchart illustrating a process of a current time correction method of an ALTC apparatus according to an embodiment of the present invention.

* Description of Major Symbols in Drawings *

10. 200: RTC device

11, 210: RTC oscillation unit (RTC oscillation unit) 12: frequency division circuit unit

13 time calculation unit 14 storage unit

220: system clock oscillation unit 230: RTC output unit (RTC output unit)

231: frequency divider 232: first counter

233: second counter 234: time calculator

235: comparator 236: adder

237 memory 238 error time calculator

The present invention relates to a Real Time Clock (RTC), and more particularly to an RTC device and a current time correction method of the ALTC device to automatically correct the time error generated over time will be.

In general, in the case of an electric device that requires real-time information such as a computer, a communication device, etc., a control unit such as a microprocessor is provided to calculate and output a real-time every predetermined period to perform a task required by an operator according to the real-time flow. It will be equipped with a Real Time Clock (RTC) device.

In the case of a mobile communication system, except for the CDMA method, which receives the standard time information from the satellite, the mobile communication terminal cannot receive the standard time information from the satellite. It is equipped with the RTC circuit to implement the clock function of the mobile communication terminal.

1 is a schematic block diagram of an RTC device of the related art for providing current time information to electronic devices as described above.

As described above, the RTC apparatus 10 for providing current time information includes an RTC oscillator 11 and a RTC oscillator 11 for providing a clock that is a reference for calculation of real-time information. 11) After receiving the divided clock output from the divided circuit unit 12 and the divided circuit unit 12 to divide and output the clock output from the output unit after calculating the present time information using the initial reference time information initially set, the display unit, etc. And a storage unit 14 for storing the initial time information unit 13 and initial reference time information.

The conventional RTC device 10 having the above-described configuration does not receive and synchronize standard time information from a satellite as in a CDMA mobile communication system, but constitutes an internal ALTC oscillator 11. After the clock information is input from the clock device, the frequency divider circuit 12 divides and outputs a clock signal suitable for the system. The time calculation unit 13 is implemented in a programming language such as C, C ++, Visual C, or hardware. After receiving the divided clock signal, calculates the current time and outputs it to the display.

However, the ALTC apparatus 10 in the related art as described above generally includes a clock element of 32.768 kHz in the ALTC oscillator 11 to generate a clock. Such a clock element generates an error of about 20 ppm during one cycle, and an error due to temperature change occurs because the clock element changes in characteristics with temperature change. Therefore, due to the error generated by the characteristics of the clock element configured in the ATC oscillator as described above, the time information outputted is slightly different as time passes, and the time error must be corrected periodically using a correction algorithm. In addition, when such a correction algorithm is not applied, the user must periodically match the current time output to the standard time.

In addition, even if the correction algorithm for the time error described above is provided, the correction algorithm described above does not use the reference clock but periodically uses the error information of the clock element configured inside the ATC oscillator. Since the time is corrected by predicting the wrong time value to be generated, the accuracy is significantly reduced.

Accordingly, the present invention is to solve the problems of the prior art described above, by using the system clock oscillation unit system clock provided therein as a reference clock to the error generated by the clock element formed in the clock generator in the ALTC oscillation unit It is an object of the present invention to provide an RTC device and a current time correction method of an RTC device that can correct time information by using the detected error after detection.

An RTC (RTC) device of the present invention for achieving the above object comprises: an RTC oscillation unit for outputting an RTC clock; A system clock oscillation unit for providing a system clock for error correction and driving of the system of the ALTC oscillation unit; After receiving the clock signal of the RTC oscillator, it calculates and outputs a current time, periodically detects error information having an error value and an accumulated error value of the RTC clock with respect to the system clock, and then uses the error information. It is characterized in that it comprises a RCT time output unit for correcting the current time output.

The RTC time output unit may include: a divider which receives the RTC clock and divides it according to an initial setting value to output a divided clock; A first counter for outputting an RTC clock repetition count by counting the repetition number of the division clocks in the RTC clock after receiving the division clock and the RTC clock; A second counter for outputting a system clock repetition number by counting the number of repetitions of the frequency division clock in the system clock after receiving the division clock and the system clock; The ATC clock repeat count and the system clock repeat count are detected by detecting a difference between the system clock in standard time and an error correction value representing the repeat count of the frequency division clock within the frequency of the ATC clock. A comparator for outputting an error value; An adder for adding the error value to a cumulative error value stored in a memory to update a cumulative error value; A memory for storing the cumulative error value, an RTC clock frequency, a system clock frequency, and an error correction value; An error time calculator for calculating and outputting an error time corresponding to the accumulated error value by using the accumulated error value, the AL clock frequency, the system clock frequency, and the error correction value stored in the memory, and initializing the accumulated error value to 0; And a time calculator for correcting and outputting a current time output using the error time.

In the above-described present invention, the time calculator is configured to output an error detection event to the first counter and the second counter for driving the first counter and the second counter when the error detection cycle for the RTC clock arrives. . The time calculator is further configured to output a correction event to the error calculator for driving an error time calculator that calculates an error time for a cumulative error value stored in the memory when a current time correction period arrives.

The present time correction method of the ALTC apparatus of the present invention for achieving the above object, in the ALTC apparatus having an ALTC oscillation unit, a system clock oscillation unit and an RTC time output unit, outputted from the system clock oscillation unit An initial set value setting step of setting an initial set value for detecting a frequency shift of an AL clock on the basis of a system clock; A division clock generation process of generating a division clock of the RTC clock according to the initial setting value; The frequency of the system clock and the number of iterations of the frequency division clock are detected by the ALTC oscillator periodically after the frequency of the frequency division generation. An error operation process of detecting error information having an accumulated error value obtained by adding the error value and the error value of the RTC clock with respect to the system clock having a difference with an error correction value indicating a; And a current time correction process of correcting a current output time by converting the cumulative error value detected in the error operation process into time.

The error operation process includes a system clock repeating number representing a repeating frequency of the divided clocks in the system clock and an ALTC clock repeating number representing a repeating frequency of the frequency division clocks in the ALTC clock during one error detection period. A division clock repeat recovery detection step of detecting a; An error value detection step of detecting a difference between the system clock repeat count and the ALTC clock repeat count and the error correction value detected in the divided clock repeat count detection process and outputting an error value; And a cumulative error value detection process of updating the cumulative error value by adding the error value to a previously stored cumulative error value.

The current time correction process includes: an error time detection process of detecting an error time corresponding to the cumulative error value at each current time correction period; It characterized in that the output time correction process for outputting by correcting the current time by applying the error time.

In the present invention described above, the initial value represents a frequency value of the divided clock output by the divider, and the initial value or the frequency of the divided clock is the frequency value of the RTC clock or the ALTC clock and the It is set to any one of the common factors of the system clock frequency.

The error value refers to a value representing a deviation degree of the ALTC clock for the system clock during one error detection cycle for error detection of the ALTC clock with respect to the system clock, and the cumulative error value is a current time correction. It is the cumulative sum of the value of the deviation degree of RTC clock with respect to the detected system clock for each error detection period generated during the cycle.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

2 is a block diagram of the ALTC device 200 according to an embodiment of the present invention.

As illustrated in FIG. 2, an RTC apparatus 200 according to an embodiment of the present invention includes an RTC oscillator 210 for outputting an RTC clock; A system clock oscillator 220 for providing a high-precision reference clock for time error correction of the RTC apparatus 200; Receives the clock signal of the RTC oscillator 210 and calculates and outputs the current time, and periodically detects an error value of the RTC clock output from the RTC oscillator 210 by using the clock of the system clock oscillator 220. After generating the cumulative error value by cumulatively sum the error value is configured to include an RTC time output unit 230 for performing a correction for the current time is output according to a preset correction period.

The RTC oscillator 210 provides a clock for real time output and generally includes a clock element for outputting a clock of 32.768 kHz therein, and receives power from a battery for 24 hours regardless of driving of the system. It is always driven to output the RTC clock so that the RTC device 200 can always output the current time.

The system clock oscillator 220 is provided with a high-precision clock device to supply a system clock to perform the operation of the system and correction of the current time of the ALTC device 200. In general, the system clock oscillator 220 has a temperature compensated crystal oscillator (TCXO) of 19.2Mhz having high accuracy and temperature compensation, and is off when the system having an ALTC oscillator is turned off. If it is restarted, it is driven again to output the system clock.

The RTC time output unit 230 receives the 32.768 kHz clock generated by the RTC oscillator 210 and then calculates and outputs the current time using the initial reference time information stored initially. When the error information generated by the RTC oscillator 210 is detected using the high precision clock output from the system clock oscillator 220 periodically, accumulated and stored, and the time point for correcting the present time arrives. The current clock is corrected by converting the accumulated output clock error value of the RTC oscillator 210 into time information.

The detailed configuration of the RTC time output unit 230 performing the above-described function is as follows.

As shown in FIG. 2, the RTC time output unit 230 uses an clock of the clock output from the RTC oscillator 210 to output a current time and a clock of the system clock oscillator 220. The frequency divider 231 is provided at the clock output terminal of the RTC oscillator 210 to divide and output the divided clock having a clock which is a reference for detecting the signal. As the frequency divider, an initial setting value having a frequency value of the frequency division clock is input from a controller of an external system provided with the RTC apparatus 200, and the frequency divider 232 generates a frequency division clock having a frequency specified as an initial setting value. Output

The initial setting value having the frequency value of the frequency division clock may be set to have a frequency value of the RTC clock itself, or any one of the frequencies that are a common factor of the RTC clock and the system clock. However, the initial setting value is preferably set to a smaller value of the common factor value of the clock output from the RTC oscillator 210 and the system clock oscillator 220 for the accuracy of the calculation result.

A first counter 232 that counts (counting) an ALTC repetition number in which the frequency of the frequency division clock is repeated within the frequency of the RTC clock is divided into an output terminal of the frequency division clock among the output terminals of the frequency divider 231. A second counter 233 is provided to receive the clock and the system clock and count the frequency repetition frequency of the divided clock per frequency of the system clock, and the output of the time clock calculates the current time. And a time calculator 234 for outputting an error detection event for counting the frequency repetition frequency of the divided clocks at the RTC clock frequency and the system clock frequency to the first counter 232 and the second counter 233. .

The first counter 232 and the second counter 233 are driven by an error detection event output from the time calculator 234. The first counter 233 outputs an RTC clock repeat count that counts how many times the frequency of the divided clock output from the frequency divider 232 is repeated within the frequency of the RTC clock, and the second counter 234 is a system clock. The system clock repeat count that counts how many times the frequency of the divided clock within the frequency is repeated is output.

The RTC clock repeat counts output from the first counter 232 and the system clock repeat counts output from the second counter 233 are input to the output terminals of the first counter 232 and the second counter 233, and the memory 237 is input. After reading the pre-stored correction reference value) is compared with the RTC clock repeat count and the system clock repeat count and the correction reference value is provided with a comparator 235 for calculating the error of the RTC clock output at the present time as the error information.

Here, the correction reference value refers to a value that detects an error of the RTC clock in comparison with the RTC clock repeat count and the system clock repeat count. For example, if the system clock sets the TCXO's 19.2Mhz, the RTC clock is 32.768KHz, and the divider clock is set to 2.048KHz, which is one of the common factors of RTC clock and system clock, the divide clock is repeated 16 times within 32.768 KHz RTC clock. In a 19.2 MHz system clock, 93750 cycles are repeated. At this time, the frequency of the frequency divider clock is 2.048 kHz, and the initial setting value is 16. The number of repetitions within the frequency of the RTC clock of the frequency divider clock and 93750 times of frequency within the frequency of the system clock are the correction reference values.

The comparator generates an error value of the RTC clock by using the ratio of the system clock repeat count and the RTC clock repeat count and the correction reference value. That is, the comparator converts the value of the degree of deviation to the system clock of the RTC clock into a constant value by using the divided clock.

The output terminal of the comparator 235 receives an error value of the RTC clock output from the comparator 234, and is configured to be accessible to the memory 237 to be described below to read the accumulated error value of the RTC clock stored in the memory. An adder 235 for calculating a new cumulative error value by adding the error value to the cumulative error value and storing it in the memory 237 is provided. The cumulative error value refers to the sum of error values of the RTC clocks detected by the comparator 235 periodically.

A memory 237 is connected to the time calculator 234, the comparator 235, the adder 236, and the error time calculator 238 to be described below. The memory 233 stores the frequency information of the RTC clock of the RTC oscillator 210 and the system clock for calculating the correction time corresponding to the reference time information, the accumulated error value, the correction reference value, and the error value of the RTC clock. Save frequency information.

The error time calculator 238 is driven by receiving a correction event signal from the time calculator 237. After driving, the error time calculator 238 accesses the memory 237 to read the accumulated error value, and then uses the frequency of the RTC clock to accumulate the error value. It is provided to calculate a time (correction time) corresponding to the output to the time calculator 237 for the correction of the current time.

The RTC device 100 of FIG. 2 having the above-described configuration uses an accurate system clock output from the system clock oscillator 220 and an error of the RTC clock output from the RTC oscillator 210. Detect the error, convert the detected error into time information, generate a correction time, and correct the current time output from the time calculator 237 using the correction time.

3 is a flowchart illustrating an operation process for performing a current time correction in the above-described ALTC device of FIG. 2 while showing an embodiment of a current time correction method of the ALTC device of the present invention.

Referring to Figures 2 and 3 will be described in the process for the current time correction of the ALTC apparatus according to an embodiment of the present invention.

First, as described in the ALTC apparatus 200 of FIG. 2 described above, the memory 237 has an initial setting value for determining a frequency division frequency output from the frequency divider 231 and a frequency of a frequency division clock having an initial setting value. Information is stored, such as a reference value indicating how many times are repeated within the frequency of the RTC clock and the system clock, the frequency of the RTC clock, the frequency of the system clock, the cumulative error value, and the reference time information initially set for the RTC implementation. Assume that

Under the above-described conditions, when the RTC oscillator 210 outputs the RTC clock, the divider 231 divides the RTC clock to generate a time clock having a frequency signal necessary for output of the current time, and outputs it to the time calculator 237. And a frequency division clock that serves as a reference for detecting error information for correcting an error of a current output time generated according to an error of the RTC clock according to an initial set value inputted from a control unit to a system having an RTC apparatus 200. Generates and outputs the first counter 232 and the second counter 233. Then, the time calculator 234 generates current time information by counting the current time according to the clock output from the divider based on the reference time information stored in the memory 237, and outputs the current time information through the display unit (S1).

After the process S1, the time operator 237 determines whether a predetermined period for detecting error information has arrived (S2).

As a result of the determination of step S2, if the period for error information detection does not arrive, step S2 is repeated. On the contrary, when the time period for detecting the error information arrives as a result of the determination in S2, the time calculator 237 outputs an error detection event to the first counter 232 and the second counter 233 to display the first counter ( 232 and the second counter 233 are driven (S3).

The first counter 232 receives an error detect event signal that drives the counter to detect error information generated from the clock of the RTC oscillator 210 from the time operator 237 by S3. The clock counts and outputs the number of RTC clock repetitions repeated within the frequency of the RTC clock, and the second counter 233 counts and outputs the system clock repetition times repeated within the frequency value of the system clock to the comparator 235. (S4).

The comparator 235 receiving the RTC clock repetition number and the system clock repetition number by the process S4 repeats the system clock repetition number and the RTC clock repetition number in the frequency of the system clock and the ALC clock in standard time. The value indicating the deviation is compared with the error correction value indicating the number of times and is output to the adder 236 as the error value of the RTC clock with respect to the system clock (S5).

As an example, when the system clock is set to 19.2Mhz of TCXO, 32.768KHz of RTC clock, and 2.048KHz of one of the common factors of RTC clock and system clock, as shown in FIG. 2, the division clock is 32.768KHz. While repeating 16 times in the RTC clock and 93751 times in the 19.2 MHz system clock, the time will be 5.2083E-9 and the error will be +1.

After adding the error value of the RTC clock from the comparator 235 by the S5 process, the adder accesses the memory 237 to read the cumulative error value, adds the error value to the cumulative error value, and then generates a new cumulative error value. The cumulative error value is updated by storing in the memory 237 (S6).

While the process S6 is in progress, the time calculator 234 outputs the current time and at the same time determines whether or not a periodic repeated current time correction time that has been set for correction of the current time has arrived (S7).

As a result of the determination of step S7, when the current time correction time does not arrive, the process returns to step S2 to repeat the process, and when the current time correction time arrives, a correction event is output to the error time calculator 238. The above-described correction event refers to an interrupt signal for driving the error time calculator 238 to correct the current time by the time calculator (S8).

The error time calculator 238 receiving the correction event by the process S8 accesses the memory 237, reads the accumulated error value, the RTC clock frequency value, the system clock frequency value, and the correction reference value, and then corresponds to the accumulated error value. Compute the information. That is, the delayed or accelerated time interval of the RTC clock with respect to the system clock is calculated based on the cumulative error value, and then outputted to the time calculator 234 as time correction information. The cumulative error value is initialized by setting the cumulative error value of the memory 237 to 0 (S9).

The time calculator 234 receiving the time correction information by the process S9 outputs the current time information generated after correcting the current time by delaying or speeding up the current time value according to the time correction information (S10). ).

In the above-described processing, the processes S2 to S10 are repeatedly repeated periodically, thereby periodically correcting the current time.

In the above-described embodiment of the present invention, the error information detection period for detecting an error value may be set in units of 1 minute, and the current time correction period may be set to 24 hours, but is not limited thereto.

By the above-described process, the present invention can periodically correct the time information of the RTC using a high-precision system clock.

In the present invention described above, an electronic device that is expected to output high-precision time information can be calculated and corrected to correct an error of its own RTC clock using a system clock oscillation device such as TCXO of high performance mounted inside the electronic device. The present invention provides an effect of outputting a high accuracy current time (real time) without receiving reference time information.

In addition, the present invention described above is a system such as TCXO having a high precision and temperature compensation function that is generally provided for the output of the system clock without the use of expensive RTC crystals in electronic devices that require high-precision real-time information output By using the clock oscillator, it is possible to realize the accurate output of the current time information, thereby significantly reducing the production cost of the electronic device.

Claims (8)

An RTC oscillation unit for outputting an RTC clock; A system clock oscillation unit for providing a system clock for error correction and driving of the system of the ALTC oscillation unit; After receiving the clock signal of the RTC oscillator, it calculates and outputs a current time, periodically detects error information having an error value and a cumulative error value of the RTC clock with respect to the system clock, An RTC apparatus comprising: an RTC time output unit configured to correct and output a current time. The method of claim 1, wherein the RTC time output unit, A divider for generating and outputting a divided clock according to an initial set value indicating a frequency of the divided clock for the RTC clock after receiving the RTC clock; A first counter for outputting an ATC clock repetition count by counting the repetition number of the division clocks in the ATC clock after receiving the division clock and the ATC clock; A second counter for outputting a system clock repetition number by counting the number of repetitions of the frequency division clock in the system clock after receiving the division clock and the system clock; The RTC clock repeat count and the system clock repeat count are detected by a difference value between the system clock in standard time and an error correction value representing the repeat count of the frequency division clock within the frequency of the ALTC clock. A comparator for outputting an error value of a clock; An adder for adding the error value to a cumulative error value stored in a memory to update a cumulative error value; A memory for storing the cumulative error value, an RTC clock frequency, a system clock frequency, and an error correction value; An error time calculator for outputting an error time corresponding to an accumulated error value stored in the memory; And a time calculator for correcting and outputting a current time output using the error time. The method of claim 1 or 2, wherein the dispensing clock, The RTC device is set to any one of a frequency value of the RTC clock or a common factor of the RTC clock and the system clock frequency. In the RTC apparatus having an RTC oscillation unit, a system clock oscillation unit and an RTC time output unit, An initial setting value setting step of setting an initial setting value for detecting a frequency shift of an AL clock in the ALTC oscillator on the basis of the system clock output from the system clock oscillator; A division clock generation process of generating a division clock of the RTC clock according to the initial setting value; After the frequency of generating the clock, periodically repeating the frequency of the system clock and the clock in the ALTC clock after detecting the frequency of the system clock and the clock of the ALTC clock in the standard clock An error operation process of detecting error information having an error value and a cumulative error value of the RTC clock with respect to the system clock in comparison with the error correction value indicating; And a current time correction process of correcting and outputting a current output time by using the error information for each current time correction period after the error calculation process. The method of claim 4, wherein the error calculation process is performed. A system clock repetition number representing a repetition frequency of the dispensing clock in the system clock and an ATC clock repetition number indicating a repetition frequency of the dispensing clock in the AL clock. A division clock repeat recovery detection step of detecting a; The difference between the system clock repeat count detected in the divided clock repeat count detection process and the ALTC clock repeat count between the system clock and the error correction value in standard time is detected so that the error of the AL clock falls on the system clock. An error value detection process of outputting a value; And a cumulative error value detecting step of updating the cumulative error value by adding the error value to a previously stored cumulative error value. The method of claim 4, wherein the current time correction process, An error time detection process of detecting an error time corresponding to the cumulative error value at each current time correction period; And a current time correction process for correcting and outputting a current time by applying the error time. The method of claim 6, wherein the current time correction process, And after the error time detection process, further comprising a process of initializing a cumulative error value for setting the cumulative error value to zero. The frequency of the frequency divider clock according to any one of claims 4 to 6, And a frequency value of the RTC clock or a common divisor of the RTC clock and the system clock frequency.

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