JPH0245837Y2 - - Google Patents

Description

[Detailed explanation of the idea]

The present invention relates to an electronic timepiece that compensates for the frequency-temperature characteristics of a crystal oscillator. Conventionally, there are various methods for compensating the frequency-temperature characteristics (hereinafter simply abbreviated as temperature characteristics) of electronic watches, but they can be roughly divided into methods that combine components with different temperature characteristics, methods that combine components with different temperature characteristics, and methods that use crystal oscillators with excellent temperature characteristics. There is a method using For the former, there are methods such as using two crystal oscillators in parallel, and using temperature-sensitive resistors and capacitors, but both of them increase the number of components and require the necessary elements to obtain good temperature characteristics. Because it is difficult to combine, mass production is poor and costs are inevitably high. Regarding the latter, for example, AT-cut and GT-cut crystal resonators exist as crystal resonators that have a flat frequency-temperature characteristic over a wide temperature range and have good long-term stability, but both have oscillation frequencies ranging from megaHz to Several hundred kilograms
Due to its high frequency (Hz), it consumes a lot of power, making it difficult to extend the lifespan of electronic watches. The purpose of this invention is to improve the above drawbacks,
To obtain an electronic watch that detects the temperature of a watch body using a temperature measurement circuit built into an IC, creates a temperature compensation signal, and performs temperature compensation and rate adjustment using this temperature compensation signal and a conventional logical rate adjustment circuit. It is in. Furthermore, another object of the present invention is to provide an electronic timepiece that selectively disables the temperature compensation operation and adjusts the rate accurately and reliably. According to the present invention, the time standard signal source does not require any special components other than an IC, a crystal oscillator, and a trimmer capacitor. Furthermore, when calculating the temperature characteristics, good time accuracy can be achieved without the need for particularly troublesome combinations. Hereinafter, the content of the present invention will be explained with reference to the drawings. FIG. 1 shows the circuit configuration of a time standard source included in a conventional temperature-compensated electronic timepiece that uses a temperature-sensitive capacitor such as a Chitavari capacitor. The names of each component in the diagram are 11 and 12 resistors, 13
is a crystal resonator, 14 is a temperature compensation capacitor, 1
5 is a fixed capacitor (IC built-in), 16 is a trimmer capacitor, 17 is a C-MOS inverter, 18 is a frequency dividing circuit, and 19 is a time display means. The temperature characteristics of the temperature compensated crystal oscillation circuit are as follows:
The figure becomes curve 22. Curve 20 is the temperature characteristic of the crystal resonator. Further, 21 is an effective compensation temperature characteristic curve synthesized from the capacitance change of the Chitavari capacitor and the load capacitance versus frequency characteristic curve determined by the IC and the crystal resonator. Compensation characteristic 22 is given by the sum of 20 and 21. However, this compensation characteristic 22 depends on the degree of coincidence between the peak θ ₀ of the characteristic curve of the crystal resonator and the peak C _P of the capacitance change of the Chitavari capacitor, and the capacitance 15, 16
It also changes depending on the value of, for example, 23, which deteriorates the compensation characteristics. This is because the factors that determine temperature characteristics are complexly intertwined with the characteristics of the IC, Chitavari capacitor, and crystal resonator, and variations in these temperature characteristics are unavoidable. Furthermore, since the capacitor 16 is used for rate adjustment, temperature characteristics change even with rate adjustment, making accurate compensation difficult. FIG. 3 shows the configuration of a time standard source for an electronic watch according to the present invention. In the figure, 13 is a crystal oscillator, 16 is a trimmer capacitor, 30 is a 1-chip IC,
302 is a temperature detection circuit section in the IC, 302 is a correction signal creation logic circuit section, 301 is an oscillation and frequency division drive circuit section, 31
40 is a time display section, and 5 is a system reset switch. First, the normal timekeeping operation of the electronic watch shown in FIG. Input to the creation logic circuit section. Also, the rate adjustment signal for frequency adjustment by logical means of the crystal oscillator (hereinafter simply abbreviated as logical frequency adjustment), which is set independently from this, is as follows:
Setting terminals 31 to 30 for rate adjustment of fixed memory, etc.
2 is added and subtracted, and the resulting binary data is 3.
The frequency divider of the 01 oscillation and frequency division drive circuit section is controlled to simultaneously perform temperature compensation and rate adjustment of the crystal oscillator. On the other hand, when the system reset switch 5 is turned on by, for example, pulling out the winding stem of the electronic clock two steps, the temperature measurement circuit section becomes an uncompensated state, and the
Only logical rate adjustments are made according to the data set in . The advantages of being able to perform only logical rate adjustment in accordance with the operation of the system reset switch 5 are as follows. In other words, if an electronic watch is dropped while in use, the impact will cause the rate of the crystal oscillator, which is the time standard, to deviate, and in order to correct this, the rate at room temperature must be readjusted to zero. . At this time, if the temperature compensation operation is activated at the same time, the sixth
As shown in the figure, since the compensation characteristics are discontinuous, the clock rate instruction value is not constant depending on temperature fluctuations, giving the adjuster a sense of anxiety. However, in such a case, if the temperature compensation operation is disabled, the clock rate indication value will remain constant, and the adjuster will always be able to accurately and reliably perform rate adjustment using the trimmer capacitor or logical rate adjustment. It can be done. Furthermore, at the time of shipping inspection of electronic watches, two states, a logical rate correction state and a logical rate correction and temperature compensation state, can be set with a single operation of a winding stem, which serves as a system reset switch, and both states can be set. It can be adjusted and tested independently, and high reliability of electronic watches can be achieved. FIG. 4a shows a drive signal to the coil of the motor 4. When the reset signal 423 of the system reset switch 5 is at a low level, a current flows in the opposite direction every second, causing the motor to rotate. On the other hand, in the reset state where the reset signal is set to high level, signals with the same period are output, but the pulse width _W2 is 1 to 1.
The motor stops because it is as small as 2msec. At this time, not only can power be saved, but also the rate of an electronic clock whose logical frequency has been adjusted can be measured using the signal. FIG. 4b shows an example of a circuit block for realizing this, which includes two types of clocks 421 and 422.
The frequencies of are respectively 1/W ₁ and 1/W ₂ , which are selectively selected by the switching circuit 42 and inputted to the clock signal 41 , which generates a driving and rate measurement signal from the clock signal 411 . 43 is a driving buffer inverter. Next, the temperature characteristics realized by the electronic timepiece shown in FIG. 3 will be described in detail. FIG. 5 is a diagram showing the temperature characteristics realized by the electronic timepiece having the configuration shown in FIG. 3, where 20 is the temperature characteristic of the crystal resonator before compensation, and 510 is the temperature characteristic after temperature compensation. 511 represents the average temperature characteristic in a general usage state (a state where temperature fluctuations occur). Further, FIG. 6 is a diagram showing the compensation characteristic created by the temperature compensated IC 30 in order to realize this temperature characteristic, and 610 represents the compensation characteristic curve.
This compensation characteristic curve 610 is synthesized with the temperature characteristic curve of the crystal resonator shown in FIG.
is obtained. The compensation characteristics of the IC are as follows: The temperature of the watch body is detected by the temperature detection circuit 303 in the IC 30 shown in FIG. It is obtained by converting into a symmetrical binary number at one of the switching temperature points that coincides with the peak temperature of the crystal resonator. This is used as input data for the logical frequency adjustment circuit section 302 (the compensation characteristics in the embodiment of FIG. 6 have the values shown in column a of Table 3).
It is assumed that the characteristic P of the electronic watch after temperature compensation is given by the following equation. P=P ₀ −J(J+1)・β・(△X) ² …(1) Here, P ₀ is the temperature characteristic of the uncompensated crystal oscillator circuit, and P ₀ = β(T−θ ₀ ) ² −r(T -θ ₀ ) ³ β: Secondary temperature coefficient (negative value) r: Tertiary temperature coefficient θ ₀ ; Zero temperature coefficient temperature of crystal resonator T: Temperature Also, J = [|T-X ₀ |]/△X (J = integer of 0, 1, 2...) △X; Temperature interval _of IC temperature measurement circuit section ) ² , then P=P ₀ +1/2J(J+1)△P...(2) The temperature characteristic realized by equation (2) is shown in Fig. 5, 510, and the first term of equation (2) is shown in Fig. 5, 20. The second term is 610 in FIG. △P is the minimum unit of compensation amount, and if the frequency of the crystal oscillator is 32.768KHz, and compensation is performed once every 10 seconds, the resolution is the number of 10 seconds in a day at 32.768KHz. Dividing by the frequency gives 0.263S/D. So △P=
If 0.263 and β=-2.85×10 ^-3 , △X is 6.8
Must be above ℃. The compensated temperature characteristic according to equation (1) has the following characteristics. First, the amount of compensation at the temperature where P becomes discontinuous is twice the delay of the uncompensated temperature characteristic J・β・(△X) ² , so the absolute value of the error before and after the point of discontinuity is are equal amounts,
When the temperature changes continuously, the errors cancel out before and after the point of discontinuity. Furthermore, the amount of compensation is the temperature difference |
It increases on both sides in proportion to T−X ₀ |. Due to the above characteristics, the carrying accuracy of the electronic watch is at room temperature (10~
30° C.), the time error is small, and an average temperature characteristic 511 (FIG. 5) can be realized due to temperature fluctuations, which is better. The uncompensated temperature range θ ₀ ±△X in Figure 5 is set at least △X = 6 to 10 so that the rate of the crystal resonator can be measured without special operations when measuring the rate of the electronic watch.
It is preferable that ΔX is wide, and on the other hand, it is considered that the smaller ΔX is, the higher the carrying accuracy will be. In order to satisfy both of these requirements, a compensation characteristic as shown in FIG. 7 700 is effective. This characteristic is expressed by the compensation formula (1): J=0 at temperature |T-θ ₀ |<n△X, J=n at T=θ ₀ ±n△X, |T-θ ₀ |>n△X (J=n+1, n
It can be obtained by giving +2...). Next, FIG. 8 shows an example of a specific circuit of the electronic timepiece shown in the block diagram of FIG. 3. Moreover, FIG. 9 is a time chart of the signals of the main parts in FIG. 8. The configuration of each part in Figure 8 is as follows: 80 is a crystal oscillation circuit;
81 and 82 are frequency dividing circuits, 830 and 831 are D-type flip-flops, 85 is a NOR circuit, 86 is a latch circuit, 87 is an R-S flip-flop, 88 is a switch circuit, 41 is a drive and rate measurement signal generation circuit section, 40 is a time display section, 43 is a drive buffer circuit, 42 is a switching circuit, 303 is a temperature measurement circuit section,
302 is a correction signal creation logic circuit section consisting of a full adder circuit, 31 is a setting terminal for rate adjustment, 89 is a system reset terminal, and 304 is a rate adjustment circuit section 84
is an AND circuit. Reference numeral 303 is the aforementioned temperature measurement circuit unit which outputs a binary temperature compensation signal C. However, in the reset state, C=0
Cleared to value. The temperature compensation signal C is sent to the switch circuit 88 periodically at the high level of CE, e.g.
The signal is inputted every second to a correction signal generation logic circuit section 302 consisting of a full adder. When CE is low level, 8
The output of 8 is held at a 0 (zero) value. In other words, when a reset signal is input from the system reset terminal 89 as a system reset switch, the temperature compensation signal C is prohibited from being supplied to the correction signal generation logic circuit section 302 based on this reset signal. A correction signal F consisting only of the rate adjustment signal D is output to the rate adjustment circuit section 304, and the temperature measurement circuit section 303 is brought into an uncompensated state. At this time, the rate adjustment setting terminal 31 operates to achieve this no-compensation state.
switch circuit 88, system reset terminal 89,
Correction signal creation logic circuit section 302 and temperature measurement circuit section 3
It is 03. This allows only logical rate adjustments to be made without being affected by the surrounding temperature environment. This has the effect of making it extremely easy to readjust the logical rate after the electronic watch is dropped while in use, or to adjust the logical rate at the time of shipping inspection of the electronic watch. be. The rate adjustment signal D inputted from the setting terminal 31 to 0302 is for logical frequency adjustment and is expressed in binary numbers as shown in Table 1. This time delay side is set as a two's complement value. For example, if the data setting is 5 bits, -1 is 11111, -3 is 11101, etc. The most significant bit on the lagging side is 1, and on the leading side it is 0. In this way, it is possible to adjust the delay or advance of the clock rate. 302 is composed of a 5-bit full adder, but as a result of the 5-bit full addition, the carry of F=C+D is ignored. The delay or advance of the clock rate is controlled by the output value 1 or 0 of _F4 . The output F ₀ to _{F 3} of 302 consisting of a full adder is inputted as a correction signal to the rate adjustment circuit section of 304, and 850R,
This is periodic initial setting data for a 4-bit presettable up counter consisting of an 830D flip-flop. The logical rate adjustment and temperature compensation are performed by the four-input AND circuit 90 detecting the binary 0 (zero) state of the D flip-flop 830 of the counter (signal), and generating the signal at a period of T _F. A preset signal for the 4-bit preset counter is obtained by ANDing with a signal that enables logical frequency adjustment. The preset is performed in half a cycle of the clock signal, and the state of each D flip-flop 830 of the preset counter changes from the 0 state.
Jump to the state specified by F ₀ to F ₄ . When the rate progresses, one increment pulse is generated from the AND and NAND circuits of 841 and 842, and the state jumps to the specified state. In the case of a delay, the preset counter does not increment and jumps to the states _F0 to _F4 . A truth table showing this situation is shown in Table 2. If temperature compensation is further added, F=C+D is preset. A truth table showing this situation is shown in Table 3b. FIG. 9 shows a time chart of signal waveforms at each location.
When the compensation amount PC of the watch realized by this circuit configuration is described by an equation, it becomes the following equation. PC = (C/fin・Tc)×86400 + (D/fin・T _F )×86400 (S/D) …(2) The first term in the above equation is the temperature compensation amount, and the second term is the logical rate adjustment amount. be. fin is the frequency of the input clock (signal) of the preset counter, T _C is the period for temperature compensation, and T _F is the period for logical frequency adjustment. As explained above, by using the temperature measurement circuit built into a single chip IC and the circuit configuration shown in Figure 8, temperature compensation and logic rate adjustment can be performed in the same circuit, so we can expect great benefits in the future.

【table】

【table】

【table】 [Brief explanation of the drawing]

FIG. 1 is a diagram showing the circuit configuration of an electronic timepiece using a time standard source having a conventional Chitavari capacitor. FIG. 2 is a diagram showing frequency versus temperature characteristics of the electronic timepiece of FIG. 1. Figure 3 is a block diagram showing the circuit configuration of the electronic timepiece according to the present invention, and Figure 4 is:
Figure a shows the motor drive signal output waveform of the electronic timepiece according to the present invention, and Figure b shows a circuit block diagram for creating the signal. FIG. 5 is a frequency versus temperature characteristic diagram realized by the electronic timepiece of FIG. 3. FIG. 6 shows a compensation characteristic curve created by the temperature compensation circuit section of the electronic timepiece shown in FIG.
FIG. 7 is a diagram showing another example of frequency versus temperature characteristics exhibited by the electronic timepiece according to the present invention. Figure 8 shows the third
1 is a diagram showing an example of a specific circuit of an electronic timepiece; FIG. FIG. 9 is a diagram showing signal waveforms of main parts of the circuit of FIG. 8. 13...Crystal oscillator, 303...Temperature measurement circuit section,
302...Logic circuit section for creating a compensation signal, 30
1... Oscillation, frequency division drive circuit section, 31... Setting terminal, 5... System reset switch, 510...
...Frequency-temperature characteristics, 20...Frequency-temperature characteristics of non-temperature compensated crystal oscillator, 80...Crystal oscillator, 83
0...D-type flip-flop circuit, 84...
AND circuit, 85...OR circuit, 86...Latch circuit, 87...S-R flip-flop circuit, 8
1, 82... Frequency divider circuit, 88... Switch circuit,
40... Time display section, 304... Rate adjustment circuit section.

Claims (1)

[Scope of utility model registration request] a crystal oscillation circuit 80, frequency division circuits 81 and 830 that divide the output of the crystal oscillation circuit, a time display section 40 that displays time based on the output of the frequency division circuit;
A rate adjustment circuit unit 304 that adjusts the rate based on a correction signal, a rate adjustment setting terminal 31 to which a rate adjustment signal that logically adjusts the rate, and a rate adjustment setting terminal 31 that measures temperature and compensates for the temperature characteristics of the crystal oscillation circuit. a temperature measurement circuit section 303 that forms a temperature compensation signal for
a correction signal creation logic circuit section 3 that adds the temperature compensation signal and the rate adjustment signal to create the correction signal and supplies the correction signal to the rate adjustment circuit section;
02. A system reset switch that selectively outputs a reset signal, by prohibiting the temperature compensation signal from being supplied to the correction signal generation logic circuit section based on the reset signal output from the system reset switch. Means 31, 88, 89, 302, 303 for outputting the correction signal consisting only of the rate adjustment signal to the rate adjustment circuit section and bringing the temperature measurement circuit section into an uncompensated state.
An electronic watch characterized by having.