JP6500550B2 - Timer correction device, timer correction method and timer correction program - Google Patents

Description

  The present invention relates to a timer correction device, a timer correction method, and a timer correction program.

  The function of the clock in the information device is used for basic operations to process information and various periodic processes in the operating system. In addition, this clock is used as a starting point to switch processes of file date and time management, multitasking and time sharing system. Furthermore, this clock is used to determine that the processing request has timed out due to a failure of the device or the like of a device such as a peripheral device. Therefore, it is required to keep the clock time accurate.

  For example, in Patent Document 1, in an information processing apparatus capable of changing the clock frequency of the system, the ratio of the pulse count value before switching the system clock frequency to the pulse count value after switching the frequency is obtained There has been described a technique for correcting a clock by correcting the count value after changing the clock frequency by multiplying this by a certain constant.

  In Patent Document 2, the first clock is counted, the number of clock pulses is measured, and when the input clock is changed from the first clock to the second clock, the number of pulses of the first clock and the second clock The threshold value of the timer counter is corrected based on the ratio of the number of pulses of the clock. Then, from the next timer interrupt, by using the corrected threshold value of the new timer counter, the frequency at which the timer interrupt occurs is made equal to that before the input clock change, and the timer interrupt occurrence frequency is the same as before the input clock switching. Techniques to make adjustments are described.

  In Patent Document 3, the period of a first clock that supplies a clock to a system is measured in advance using a second clock that is more accurate than the first clock, and the obtained measurement value is used. A technique for adjusting the time of a clock operated by a first clock is described.

  According to Patent Document 4, a timer that receives and operates an actual clock is converted into a virtual timer proportional to a predetermined clock conversion coefficient, and an application is executed by using the clock of the converted virtual timer to supply A technique is described that softly absorbs the time-varying effects of changes.

Unexamined-Japanese-Patent No. 08-292822 gazette JP, 2013-117785, A Japanese Patent Application Laid-Open No. 10-049251 Japanese Patent Application Publication No. 2007-034672

  The technology described in Patent Document 1 can set an appropriate software timer value each time the clock frequency is changed, but the count-up excess / shortage that occurs by increasing or decreasing the number of pulses in the process of changing the clock frequency, That is, it does not consider that time shifts. Therefore, in the technology of Patent Document 1, although the generation interval of the intelligent timer can be made equal to that before the clock frequency change by adjusting the timer value, there is no means for storing the accumulated value of the count excess and deficiency, and the generation of the intelligent timer There is no means to equalize the timing, i.e. the time, before the clock frequency switch. Therefore, the technique of Patent Document 1 has a problem that the timer generation timing can not be equal to that before changing the clock frequency.

  The technique described in Patent Document 2 can adjust the timer interrupt occurrence frequency to be the same as before input clock switching. At this time, the timer threshold increases when the input clock speed increases, and the timer threshold decreases when the input clock speed decreases. However, in the technique of Patent Document 2, although the timer interrupt frequency adjusts the timer interrupt occurrence frequency to the same frequency as before the clock switching by timer threshold correction, there is a problem that the timer interrupt occurrence timing does not coincide with the timer interrupt occurrence timing before switching the clock. is there.

  Although the techniques described in Patent Document 3 and Patent Document 4 describe techniques for increasing the accuracy of the clock cycle, there is a problem that the timer interrupt generation timings before and after switching the clock can not be matched. .

  An object of the present invention is to provide a timer correction device, a timer correction method and a timer correction program which solve the above-mentioned problems.

  Specifically, the main object of the present invention is to make the period of the pulse output from the timepiece disturbed by the change of the system clock frequency and the timing thereof coincide with a predetermined reference timing.

  According to one aspect of the present invention, there is provided a timer correction apparatus comprising: first clock oscillation means for outputting a clock having a reference frequency; and second clock oscillation means for outputting a frequency different from the first clock oscillation means. An input clock selection unit that selects one of the first clock and the second clock and outputs the selected clock to the timer generation unit; and an input clock measurement unit that measures the number of pulses counted by the reference clock And comparing the number of pulses in each cycle counted by the clock measurement unit and calculating the ratio of the number of pulses measured by the input clock measurement unit to the difference between the number of pulses measured by the input clock measurement unit. A pulse number ratio calculation unit to be calculated; a timer threshold correction unit to give a threshold of a condition under which the counter outputs an interrupt signal from the ratio of the pulse number and the difference; Counting the clock from the lock selector, and a timer generating unit which outputs the interrupt signal by the threshold.

  The input clock measurement unit receives the first clock, and pulses of the first clock received between the first interrupt signal output from the timer generation unit and the second interrupt signal that is the next cycle. The number is used as a first measurement value, and the measurement value after measuring the first measurement value is used as a second measurement value to pulse the first measurement value and the second measurement value. The clock excess / loss accumulating unit adds the first accumulated value obtained in the previous cycle to the difference between the first measured value and the second measured value. A second cumulative value is obtained, and the second cumulative value recursively calculated by substituting the second cumulative value into the first cumulative value by addition of the next cycle is used as the clock excess / shortage number. A timer threshold correction unit outputs the first measurement value, and the pulse number ratio calculation unit outputs the first measurement value. A second storage unit for storing the second measured value, determination information as to whether the first measured value matches the second measured value, the first measured value, and A determination unit that outputs a ratio to the second measurement value to a timer threshold value correction unit, the timer threshold value correction unit including the determination information from the determination unit of the pulse number ratio calculation unit; Information of the ratio is received, the threshold of the counter of the timer generation unit is calculated, the threshold is stored, and the threshold is output to the timer generation unit, the timer generation unit being a clock output by the input clock selection unit The count value is set to the threshold value output by the timer threshold value correction unit to count down the counter, and when the counter reaches 0, the timer generation unit generates the first interrupt signal and the first interrupt signal. With 2 interrupt signals Is output to the clock measuring unit and an external device.

  The timer correction method according to one aspect of the present invention oscillates a first clock which is a reference frequency, oscillates a second clock of a frequency different from the first clock, and receives the first clock. The number of pulses of the first clock received between the first interrupt signal and the second interrupt signal which is the next cycle is measured to be a first measured value, and the first measured value is measured. The first measured value and the second measured value are output to the pulse number ratio calculation unit as the second measured value after the measurement, and the first measured value and the second measured value are output. The second accumulated value is obtained by adding the first accumulated value obtained in the previous cycle to the difference between and the second accumulated value, and the second accumulated value is added to the first accumulated value by the addition of the next cycle. Outputting the second accumulated value recursively calculated by substitution, and outputting the first measured value and the second measured value The determination information as to whether they match and the ratio of the first measurement value to the second measurement value is output, the determination information and the information of the ratio are received, and the threshold value of the counter is calculated The threshold is stored, the threshold is output, the clock is output from the input clock selection unit, counting is performed, the count value is set as the threshold, the counter is counted down, and the timer becomes zero. The generation unit outputs the first interrupt signal and the second interrupt signal to the clock measurement unit and the external device.

  According to one aspect of the present invention, a timer correction program oscillates a first clock which is a reference frequency, oscillates a second clock of a frequency different from the first clock, and receives the first clock. The number of pulses of the first clock received between the first interrupt signal and the second interrupt signal which is the next cycle is measured to be a first measured value, and the first measured value is measured. The first measured value and the second measured value are output to the pulse number ratio calculation unit as the second measured value after the measurement, and the first measured value and the second measured value are output. The second accumulated value is obtained by adding the first accumulated value obtained in the previous cycle to the difference between and the second accumulated value, and the second accumulated value is added to the first accumulated value by the addition of the next cycle. Outputting the second accumulated value recursively calculated by substitution, and outputting the first measured value and the second measured value The determination information as to whether the measured values match or not and the ratio of the first measured value to the second measured value are output, the determination information and the information of the ratio are received, and the threshold value of the counter is calculated. Stores the threshold, outputs the threshold, counts with the clock output from the input clock selector, sets the count value as the threshold, counts down the counter, and the counter reaches 0. And causing the computer to execute a process of outputting the first interrupt signal and the second interrupt signal from the timer generation unit to the clock measurement unit and an external device.

  According to the present invention, when a plurality of clock oscillators having different frequencies are mounted and one of them is selected and supplied to the timer, the signal output by the timer is obtained even if the clock frequency is arbitrarily switched. The period of the timer generated by the reference clock and the timing at which the signal changes can be matched.

It is a block diagram of timer correction device 1 in a 1st embodiment of the present invention. It is a flowchart which shows operation | movement of the timer correction apparatus 1 of this invention. It is a timing chart figure of operation of timer amendment device 1 of the present invention. It is a timing chart figure of operation of timer amendment device 1 of the present invention. It is a figure which shows the calculation formula of the numerical value which prescribes | regulates the state of the timer correction apparatus 1 of this invention. It is a figure which shows the calculation formula of the numerical value which prescribes | regulates the state of the timer correction apparatus 1 of this invention.

First Embodiment
A first embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a diagram showing a timer correction device 1 according to a first embodiment of this invention.

  The timer correction device 1 includes a first clock oscillation unit 10, a second clock oscillation unit 11, a clock measurement unit 13, an input clock selection unit 12, a pulse number ratio calculation unit 14, and a clock excess / deficiency accumulation unit A timer threshold correction unit 16 and a timer generation unit 17 are provided.

  The pulse number ratio calculation unit 14 includes a first storage unit 3, a second storage unit 4, and a determination unit 5.

  The first clock oscillation unit 10 is connected to the clock measurement unit 13 and the input clock selection unit 12. The second clock oscillator 11 is connected to the input clock selector 12. The first clock oscillator 10 and the second clock oscillator 11 can be mounted with any number of two or more. Further, the frequencies of the first clock oscillator 10 and the second clock oscillator 11 may be variable.

  The input clock selection unit 12 selects either the pulse of the first clock oscillation unit 10 or the second clock oscillation unit 11 and supplies the pulse to the timer generation unit 17. In the initial state of the timer correction device 1, it is assumed that the first clock oscillation unit 10 is selected.

  The pulse number ratio calculation unit 14 and the clock excess / deficiency accumulation unit 15 are connected to the timer threshold correction unit 16. The pulse number ratio calculation unit 14 is connected to the clock excess / deficiency accumulation unit 15. The clock measurement unit 13 is connected to the pulse number ratio calculation unit 14.

  The timer threshold correction unit 16 is connected to the timer generation unit 17. The timer threshold correction unit 16 outputs the correction timer threshold 110 to the timer generation unit 17. The timer generation unit 17 counts the clock received from the input clock selection unit 12 and outputs an interrupt signal 100 when it is equal to a predetermined threshold. The interrupt signal 100 output from the timer generation unit 17 is supplied to the clock measurement unit 13 and an external device. The external device is an information processing device such as a computer. The present invention is not limited to the configuration of FIG.

  The operation of the timer correction device 1 will be described using the flowchart shown in FIG.

  The first clock oscillator 10 and the second clock oscillator 11 are activated by turning on the power or by the operation of the operator or the like to start oscillation at each frequency (S10).

  The signals of the first clock oscillator 10 and the second clock oscillator 11 are output to the input clock selector 12. The input clock selection unit 12 selects any one signal and supplies it to the timer generation unit 17 (S20).

  The clock measurement unit 13 starts measurement of the clock from the first clock oscillation unit 10 (S30).

  On the other hand, the timer generation unit 17 performs counting based on the clock selected by the input clock selection unit 12. The timer generation unit 17 outputs a timer interrupt signal 100 when the count number of the timer generation unit 17 reaches a preset timer threshold (S40).

  Here, in the timer correction device 1 according to the first embodiment of the present invention, the measured value of the number of pulses by the clock measurement unit 13 at the time of steady state after the initialization step performed after power on is taken as X0. . X 0 is stored in the first storage unit 3 provided in the pulse number ratio calculation unit 14. Further, after the observation of X0 is completed and X0 is stored in the first storage unit 3, the measured value of the number of pulses similarly measured by the clock measurement unit 13 is set as Xn. The second storage unit 4 stores Xn. Further, Xn is transmitted to the determination unit 5 and the clock excess / shortage unit 15, and is further transmitted from the clock excess / shortage unit 15 to the timer threshold correction unit 16. The argument n is an integer given to uniquely distinguish the state between the interrupt signal 100 and the interrupt signal 100 generated next. For example, when a certain point in time when the timer correction device is operating is defined as state 0, in this state, the measured value of the number of pulses of the clock measurement unit 13 is X0. Similarly, the measured value of the number of pulses of the clock measurement unit 13 when the operation of the timer correction device transitions from state 0 to state 1 is X1. Therefore, the states sequentially transition and the measured value in the state n becomes Xn.

  When the count number of the timer generation unit 17 reaches a preset threshold value, the timer generation unit 17 outputs the interrupt signal 100 and transmits it to the clock measurement unit 13 (S50).

  The numerical value Xn counted until the clock measurement unit 13 receives the interrupt signal 100 is read and output to the pulse number ratio calculation unit 14 (S60). The pulse number ratio calculation unit 16 stores the received Xn in the second storage unit 4.

  The determination unit 5 reads X0 from the first storage unit 3 and Xn from the second storage unit 4. Determination unit 5 outputs the determination result as to whether or not X0 = Xn to timer threshold value correction unit 16. The determination unit 5 calculates the ratio between X0 and Xn, and outputs the ratio to the timer threshold value correction unit 16 (S70).

  If X0 = Xn (S70 = Yes), the timer threshold correction unit 16 calculates the correction timer threshold 110 according to equation (2) (described later) for calculating the threshold (S80).

  If X0 ≠ Xn (S70 = No), the timer threshold correction unit 16 calculates the correction timer threshold 110 according to equation (1) (described later) for calculating the threshold (S90).

  The correction timer threshold 110 is used by the timer generation unit 17 to determine whether to issue the interrupt signal 100 and overwrites the timer threshold described above (S100).

  The clock excess / deficiency accumulation unit 15 calculates the difference between the numerical values of X0 and Xn, and temporarily stores the clock excess / deficiency cumulative value (referred to as An). The storage of An is for two generations, and An and the next state An + 1 are stored (S110).

  Thereafter, the flow returns to S30, and the flow is repeated from the operation of the clock measurement unit 13.

  Here, the calculation performed by the timer threshold correction unit 16 will be described.

  First, it is assumed that the timer correction device 1 operates and the timer generation unit 17 continuously outputs the interrupt signal 110. A period from when the interrupt signal 110 is output until the next interrupt signal 110 is output is referred to as a state. In this state, n (integer) is assigned as an identifier, and the n-th state is called a state n. Further, when the period of state n ends, the next operating state is referred to as state n + 1. The state numbers in the description of the present example indicate that the states are continuous, such as the state n, the next state n + 1, and the next state n + 2.

  Next, parameters necessary for calculation and the contents thereof will be described. First, there is X0, which is a reference value of the pulse number measurement value in the state 0, that is, the 0th state, and Xn, which is the state n, that is, the nth pulse number measurement value in the state. Here, the difference between X0 and each Xn (all from n = 1 to n) from the state 0 to the state Xn is respectively added to obtain an accumulated value. This accumulated value is assumed to be the clock excess / shortage number An. Further, there are two types of formulas for calculating the threshold value, and any one formula is selected depending on whether X0 matches Xn or not. The details of the equation will be described later. In the present description, Xn, An, and an argument n of Yn described later indicate that they are the respective values in the state n.

First, calculation in the case where the value of X0 and the value of Xn do not match will be described. This condition means that the cycle in which the interrupt signal 100 of state 0 is generated is different from the cycle in which the interrupt signal 100 is generated in the state n. Therefore, first, calculation of the correction timer threshold 110 is performed to make the periods coincide. Assuming that the value of the correction timer threshold 110 in the state n is Yn, and the value of the correction timer threshold 110 in the next state n + 1 is Yn + 1, Yn + 1 is calculated by the following equation (1).
Yn + 1 = Yn * X0 / Xn (1)
The count number of the timer generation unit 17 thereafter is corrected by the new threshold value. This equation (1) obtains the ratio of X0, which is the reference count number, to Xn, which is the count number in the state n, and divides the above ratio by the value of the correction timer threshold 110 in the state n. Then, by dividing the increase or decrease of the count number due to the change of the clock frequency by X0 which is the reference value, the count numbers will match. Therefore, finally, it is adjusted to X0 = Xn.

Further, the cumulative value An + 1 of the clock excess / deficiency number is calculated by the following equation (3).
An + 1 = An + X0-Xn (3)
Next, calculation in the case where X0 matches Xn will be described.

  This condition means that the cycle in which the interrupt signal 100 in the state 0 is generated matches the cycle in which the interrupt signal 100 is generated in the state n. However, as a result of changing the threshold value of the timer in order to make the periods coincide, there is a state in which the timing at which the interrupt signal 100 is output differs between state 0 and state n. That is a state in which the clock excess or deficiency number An is not zero. Therefore, in order to make the timing of the interrupt signal 100 output in the case of the state 0 coincide with the timing of the interrupt signal 100 of the state n, the correction timer threshold 110 is calculated.

Assuming that the value of the correction timer threshold 110 in the state n is Yn, and the value of the correction timer threshold 110 for the clock operation of the timer in the next state n + 1 is Yn + 1, Yn + 1 is calculated by the following equation (2).
Yn + 1 = Yn * (X0 + An) / Xn (2)
In this equation (2), after X0 = Xn, the number of excess or deficiency of clock An is added to X0 to correct the difference between the switching timing of X0 and the switching timing of Xn, thereby correcting the number of pulses. It is an equation that is performed to calculate a timing correction value taking into account the correction of the shifted timing after switching to Xn.

Further, the cumulative value An + 1 of the clock excess / deficiency number is calculated by the following equation (4).
An + 1 = An + X0-Xn (4)
Here, further, an operation example of the timer correction device 1 shown in FIG. 1 will be described with reference to timing charts of FIG. 3A and FIG. 3B and a numerical expression formula defining the state of the timer correction device 1 of FIG. This will be described more specifically using

  3A and 3B show the clock waveform of the first clock oscillator 10, the clock oscillation waveform of the second clock oscillator 11, the correction timer threshold 110, the number of excess and deficiency of clock pulses, and the timing at which the interrupt signal 100 is generated. The relationship between each of the timings of the interrupt signal 100 originally expected is shown in the figure.

  FIG. 4A and FIG. 4B show the formula for calculating the number of clock pulses (X0, Xn) and the number of clock excess / deficiency (An, An + 1) measured by the clock measurement unit 13, their values, and the correction timer threshold 110 (Yn, Yn + 1). The figure which calculates the formula which calculates, and its value. States 0 to 6 described in FIGS. 3A and 3B correspond to the described states 0 to 6 in FIGS. 4A and 4B, respectively.

  Next, with reference to FIG. 3A, FIG. 3B, FIG. 4A and FIG. 4B, the correction of the cycle of the interrupt signal 100 and the operation of matching the timing with the timing of the reference will be described in stages of explanation 1 to explanation 6.

  Here, the definition of the steady state of this example will be described. In the steady state, the timer correction device 1 is powered on, an initial value is set to the timer generation unit 17 and the clock measurement unit 13 and operation is started, and then the pulse measured by the clock measurement unit 13 It refers to a state in which the transitional fluctuation of the number converges and reaches a state in which specific values are continuously output.

(Description 1)
In the steady state, it is assumed that the clock of the low-speed first clock oscillator 10 is selected as the input clock of the timer generator 17 (FIG. 3A_state 0, FIG. 4A_state 0). At this time, the clock measurement unit 13 measures the number of pulses from the first clock oscillation unit 10 measured between the interrupt signal 100 output from the timer generation unit 17 and the interrupt signal 100 next, and the value thereof is X0. I assume. The count of the timer generation unit 17 is executed by the clock of the low-speed first clock oscillation unit 10 to output the interrupt signal 100, and the timer threshold correction unit 16 calculates the next correction timer threshold Yn (FIG. 1, FIG. 4A _ state 1). In the steady state (in this example, the state 0 and the state prior to the state 0 correspond), the pulse of the first clock oscillator 10 and the clock input to the timer generator 17 are the same, and the clock measurement unit 13 measures The number of clock pulses between the interrupt signal 100 and the next interrupt signal 100 does not change. Also, in the steady state, there is no excess or deficiency of clock, and the number A0 of excess or deficiency of clocks is zero. The correction timer threshold value Y1 in the next state 1 applies the above-mentioned equation (2) because the condition of X0 = Xn is satisfied. Therefore, Y1 = Y0 * (X0 + A0) / X0 = Y0 = 5 with respect to the correction timer threshold Y0 in the previous state 0, which is equal to the previous correction timer threshold. That is, in the steady state, the timer interrupt occurs at intervals of the first clock pulse number X0. In addition, the clock excess / deficiency accumulation unit 15 calculates the clock excess / deficiency number A1 to obtain A1 = A0 + X0−X0 = 0. The clock excess / deficiency accumulation unit 15 stores A1.

(Description 2)
The operation of state 1 will be described. The timer threshold value Y1 = 5 calculated in the above-mentioned state 0 is set as the threshold value of the timer generation unit 17, and the count is executed.

  It is assumed that the clock of the low speed first clock oscillating unit 10 is switched to the clock of the high speed second clock oscillating unit 11 until the timer interrupt signal 100 is generated (FIG. 3A_state 1, FIG. 4A_state 1). .

  Although the count speed of the timer generation unit 17 is increased by switching to the high speed second clock oscillation unit 11, the Y0 which is equal to that in the steady state is still applied to the correction timer threshold 110, so The correction timer interrupt signal 100 is generated in a short time (FIG. 3A_state 1 rear end portion, FIG. 4A_state 1).

  The number of clock pulses of the first clock oscillation unit 10 measured by the clock measurement unit 13 in the period of state 1 is X1. Since the frequency of the clock of the second clock 11 supplied to the timer generator 17 is higher than the clock frequency of the first clock 10, a timer interrupt occurs earlier than in the steady state. It is X1 <X0. Therefore, even after the input clock of timer generation unit 17 is switched to a high-speed clock, the timer generation in the next state 2 is performed to maintain the occurrence frequency of interrupt signal 100 of timer generation unit 17 the same as in the steady state. The correction timer threshold 110 for the unit 17 needs to be increased with respect to Y1, which is the correction timer threshold applied to the current state 1.

  Here, since the condition of X0 ≠ X1 (X0 = 5 and X1 = 4 with reference to state 1 of FIG. 3A) is satisfied, the correction timer of the next state 2 is applied by applying the above-mentioned equation (1) The threshold Y2 is calculated. The timer threshold value correction unit 16 obtains Y2 = Y1 * X0 / X1 ≒ 6.

  Also, although the clock pulse number of the first clock oscillator 10 to be measured during the occurrence of the timer interrupt signal 100 is X0, the clock pulse number actually measured is X1, so the timing at which the timer interrupt is generated There is a shift of X0-X1 compared to the steady state. Further, since X0XX1, the clock excess / loss accumulating unit 15 applies the above-mentioned equation (3) to calculate the clock excess / lack number A2 to obtain A2 = A1 + X0−X1 = 1. The clock excess / deficiency accumulation unit 15 stores A2.

(Description 3)
Next, state 2 will be described. It is assumed that the input clock remains supplied with the high-speed second clock (FIG. 3A_state 2 to state 3, FIG. 4A _state 2 to state 3). The interrupt signal 100 is generated based on the correction timer threshold value Y2, but the input clock of the timer generation unit 17 was switched to the clock of the second clock oscillation unit 11 in the middle last time. Since the operation is performed by the clock of the clock oscillation unit 11 of 2, the timer interrupt occurs at an interval shorter than the previous time (the rear end portion of FIG. 3A_state 2, FIG. 4A_state 2). At this time, the number of clock pulses measured by the clock measurement unit 13 in the period of state 2 is X2. Since the interrupt signal 100 is generated earlier than the previous one, X2 <X1 <X0. It is the condition of X0 で あ る X2. Therefore, the timer threshold correction unit 16 applies the above-mentioned equation (1) to calculate the correction timer threshold Y3 of the next state 3 to obtain Y3 = Y2 * X0 / X2 = 10. Thereby, if the clock input to timer generation unit 17 remains the clock output from second clock 11, the number of clock pulses from first clock oscillation unit 10 measured in the period of the next state 3 Is the same value as in steady state. Since the condition of X0 ≠ X2 is satisfied, the clock excess / deficiency part accumulation unit 15 applies the above-mentioned equation (3) to calculate the clock excess / deficiency number A3, and A3 = A2 + X0−X2 = 3 obtain. The clock excess / deficiency accumulation unit 15 stores A3.

(Description 4)
Also in the next state 3, it is assumed that the input clock remains supplied from the high-speed second clock 11 (FIG. 3A_state 3, FIG. 4A_state 3). Since the correction timer threshold value Y3 calculated in state 3 is larger than Y2 and there is no change in the input clock, a timer interrupt occurs at an interval longer than the previous time, and the interval becomes equal to that in steady state (FIG. Part of FIG. 4B _ state 3). At this time, the clock pulse number of the first clock oscillating unit 10 measured by the clock measuring unit 13 is X3. Since the constant and the interval at which the interrupt signal 100 is generated are equal, X3 = X0. Since the condition of X3 = X0 is satisfied, the above-mentioned equation (2) is applied to the calculation of the correction timer threshold value Y4. The timer threshold correction unit 16 calculates the correction timer threshold Y4 of the next state 4 to obtain Y4 = Y3 * (X0 + A3) / X3 = 16. Since X3 = X0, it can be said that Y4 = Y3 * (X0 + A3) / X0. Further, since the condition of X3 = X0 is satisfied, the above equation (4) is applied to the calculation of the clock excess / deficit number A4. The clock excess / deficiency accumulation unit 15 calculates the clock excess / deficiency number A4 to obtain A4 = A3 + X0−X3 = 3. The clock excess / deficiency accumulation unit 15 stores A4 (in this case, the number of excess / deficiency does not change).

(Description 5)
Also in the next state 4, it is assumed that the clock input to the timer generation unit 17 remains the clock output by the high-speed second clock 11 (FIG. 3B_state 4 and FIG. 4B_state 4). Since the correction timer threshold Y4 is larger than Y3 and there is no change in the input clock, a timer interrupt is generated at an interval longer than the previous time (a rear end portion of state 4 in FIG. 4B, state 4). At this time, the clock pulse number of the first clock oscillation unit 10 measured by the clock measurement unit 13 is X4. The frequency of the input clock has not changed since the previous time, and the correction timer threshold value corrected last time is X4 = X3 + A3 because it is increased by the number of clock excess / deficit. Since the condition of X4 ≠ X0 is satisfied, the above-mentioned equation (1) is applied to the calculation of the correction timer threshold value Y5. The timer threshold correction unit 16 calculates the correction timer threshold Y5 of the next state 5 to obtain Y5 = Y4 * X0 / X4 = 10. Since Y4 = Y3 * (X0 + A3) / X3 and X3 = X0 as described in (Description 4), the next correction timer threshold value Y5 is equal to the correction timer threshold value Y3 of the previous second. When the input clock is the clock of the second clock oscillation unit 11, the correction timer threshold value Y3 of the last two times is a value equal to the timer interrupt occurrence interval in the steady state. Further, since the condition of X4 ≠ X0 is satisfied, the above equation (3) is applied to the calculation of the clock excess / deficit number A5. The clock excess / deficiency accumulation unit 15 calculates the clock excess / deficiency number A5 to obtain A5 = A4 + X0−X4 = 0. The clock excess / deficiency accumulation unit 15 stores A5.

(Description 6)
Also in the period of the next state 5, it is assumed that the input clock remains the high-speed second clock (FIG. 3B_state 5; FIG. 4B_state 5). Since the correction timer threshold value Y5 corrected last time is smaller than Y4 and there is no change in the input clock, a timer interrupt is generated at an interval shorter than the previous time (last part of FIG. 3B_state 5, FIG. 4B_state 5). The number of clock pulses of the first clock oscillation unit 10 measured by the clock measurement unit 13 measured at this time is X5. Since there is no change in the input clock frequency, and the correction timer threshold value Y5 has a value equal to the correction timer threshold value Y3 of the previous second time, X5 = X3 = X0. Since the condition of X5 = X0 is satisfied, the above-mentioned equation (2) is applied to the calculation of the correction timer threshold value Y6. Although the timer threshold value correction unit 16 calculates the correction timer threshold value Y6 of the next state 6 by the equation Y6 = Y5 * (X0 + A5) / X5, since X5 = X0, Y5 = Y3, A5 = 0, the correction is performed. The timer threshold Y6 is equal to 10 and the correction timer threshold Y3. Therefore, as long as the input clock frequency is not changed, the timer interrupt occurrence interval is equal to the steady state timer interrupt occurrence interval. Further, since the condition of X5 = X0 is satisfied, the above-mentioned equation (4) is applied to the calculation of the clock excess / deficit number A6. The clock excess / deficiency accumulation unit 15 calculates the clock excess / deficiency number A6 to obtain A6 = A5 + X0−X5 = 0. The clock excess / deficiency accumulation unit 1 stores A6.

  As described above, the interval at which the interrupt signal 100 occurs after switching the input clock is equal to that before the input clock switching, and the timer interrupt generation timing after switching the input clock also matches the timing before the input clock switching. The same applies to changing the input clock from the high speed clock to the low speed clock.

  As described above, the timer correction device 1 according to the first embodiment of the present invention can match the period and the phase of the interrupt signal before switching even when switching to a clock having a different frequency. The reason is that in addition to the correction for adjusting the period, the correction for adjusting the phase can be performed.

DESCRIPTION OF SYMBOLS 1 timer correction device 3 first storage unit 4 second storage unit 5 determination unit 10 first clock oscillation unit 11 second clock oscillation unit 12 input clock selection unit 13 clock measurement unit 14 pulse number ratio calculation unit 15 clock Over / under accumulation unit 16 timer threshold correction unit 17 timer generation unit 100 interrupt signal 110 correction timer threshold

Claims (9)

First clock oscillation means for outputting a first clock as a reference;
Second clock oscillation means for outputting a second clock which becomes a reference different from the first clock oscillation means;
During operation of the apparatus, is switched to one of the clocks of the first clock and the second clock, the input clock selection unit for outputting the clock to the timer generator is switched,
The input clock measuring unit that measures the number of pulses counted by said clock,
The number of pulses of the clock to be counted during a period from when the input clock measurement unit receives an interrupt signal to when it receives a next interrupt signal before switching the clock and when the clock is switched A clock excess / deficiency accumulation unit that performs accumulation of excess / deficiency of the number of pulses by comparison
A pulse number ratio calculating unit for calculating a difference indicating the excess and deficiency with the pulse number ratio in each said period of said input clock measuring unit is measured,
A timer threshold correction section that gives a threshold condition for outputting said difference Toka et the interrupt signal from the previous SL ratio,
A timer generating unit have a counter for counting the clock from the input clock selection unit, and outputs the interrupt signal for each of the periods by said threshold,
Equipped with
The input clock measuring unit, the receive clock, chrysanthemum lock before received between the phase of the first interrupt signal and the second interrupt signal the next period the timer generating unit has output The first measurement value and the second measurement value are used as the first measurement value, and the measurement value of the next period after the first measurement value is measured as the second measurement value. outputs of the measurement value to the pulse count ratio calculation unit,
The clock deficiency accumulation unit, a difference between the first measurement and the second measurement value, obtains a second cumulative value by adding the first accumulated value obtained in the previous period, The second accumulated value recursively calculated by substituting the second accumulated value for the first accumulated value in the addition of the next period is output to the timer threshold value correction unit as a clock excess / shortage number. ,
The pulse number ratio calculating section further wherein prior Symbol the first measurement and the determination of whether information second measurement values match, the first measurement value and the second measured value determination unit for outputting the ratio of the timer threshold correction unit
It includes,
The timer threshold correction unit, from the front SL judgment unit receives information of the ratio between the determination information, and calculates the threshold value before asked counter stores the threshold value, outputs the threshold to the timer generating unit And
The timer generating unit, the counter to set the count value of said counter to said threshold timer threshold correction unit is outputted, by counting down at the clock, when the count value becomes 0, the the timer generating unit, and outputs a first interrupt signal and the second interrupt signal to said input clock measuring unit,
Timer correction device. More Sofutoue A, from among a plurality of calculation formulas for determining the pre-Symbol ratio, timer correction apparatus according to 請 Motomeko 1 you calculated by selecting any one of the formulas. The second clock oscillating means is more programs, timer correction apparatus according to claim 1 or請 Motomeko 2 was characterized by arbitrarily changing the frequency. A first clock reference that Do is oscillated,
Oscillating a second clock which is a reference different from the first clock;
During operation of the own device, the clock is switched to any one of the first clock and the second clock, and is output to a timer generation unit having a counter that counts the switched clock.
Receiving said clock, a first interrupt signal and the first measured value by measuring the number of pulses of chrysanthemum prelocked received on the period of the second interrupt signal the next cycle, the the measurement value of the next period after measuring the first measurement as a second measurement value, Outputs and said second measured value and the first measured value,
The difference between the first measurement and the second measurement value, obtains a second cumulative value by adding the first accumulated value obtained in the previous period, in addition of the next said period, Substituting the second accumulated value for the first accumulated value to output the second accumulated value calculated recursively;
Outputting determination information as to whether or not the first measurement value matches the second measurement value, and a ratio of the first measurement value to the second measurement value;
It receives information of the ratio between the determination information, and stores the threshold value to calculate the threshold value of the counter, and outputs the threshold value,
The counter sets the count value of the counter to the threshold value which is the output, by counting down at the clock, when the count value becomes 0, from the timer generator, said first interrupt signal and to output the said second interrupt signal, the timer correction method. From among the plurality of total formula for obtaining the previous SL ratio, timer correction method according to 請 Motomeko 4 select any one of the formulas. Timer correction method according to claim 4 or請 Motomeko 5 was characterized by arbitrarily changing the frequency of said second clock. A first clock reference that Do is oscillated,
Oscillating a second clock which is a reference different from the first clock;
During operation of the own device, the clock is switched to any one of the first clock and the second clock, and is output to a timer generation unit having a counter that counts the switched clock.
Receiving said clock, a first measurement by measuring the number of pulses before Chrysanthemum lock received during the first interrupt signal and the second interrupt signal the next cycle, the first the measurement value of the next period after measuring the first measurement value as a second measurement value, Outputs said first measurement and said second measurement,
The difference between the first measurement and the second measurement value, obtains a second cumulative value by adding the first accumulated value obtained in the previous period, in addition of the next said period, Substituting the second accumulated value for the first accumulated value to output the second accumulated value calculated recursively;
Outputting determination information as to whether or not the first measurement value matches the second measurement value, and a ratio of the first measurement value to the second measurement value;
It receives information of the ratio between the determination information, and stores the threshold value to calculate the threshold value of the counter, and outputs the threshold value,
Said counter, by counting down at the clock to set the count value of the counter to the threshold value which is the output, when the count value becomes 0, the timer generating unit, the first interrupt signal and timer correction program for executing a process of outputting the second interrupt signal to the computer. From among the plurality of total formula for obtaining the previous SL ratio, timer correction program according to claim 7 to perform the process of selecting any one of the formulas. Timer correction program according to claim 7 or請 Motomeko 8 performs processing to arbitrarily change the frequency of the second clock.

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