JP2016066760A - Evaluation method of soi substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide evaluation method by which a stable result of measurement of an interface state density can be obtained even when an SOI layer is an ultra-thin SOI substrate.SOLUTION: A method for evaluating an SOI substrate by Pseudo-MOSFET method concerning the interface property of an SOI layer and a BOX layer of the SOI substrate after execution of HF processing on the SOI substrate comprises the steps of: forming a source electrode and a drain electrode on a surface of the SOI substrate, and a gate electrode on the backside of the SOI substrate; and measuring a drain current with voltages applied across the source and drain electrodes, and to the gate electrode respectively. In the drain current measuring step, in a subthreshold region where the drain current changes largely, the gate voltage applied to the gate electrode is raised at predetermined intervals, and the interface state density of the SOI substrate is measured in a length of time after HF processing in each interval, during which a quantity of change in drain current value never becomes negative.SELECTED DRAWING: Figure 6

Description

  The present invention relates to a method for evaluating characteristics between an SOI layer and a BOX layer of a semiconductor substrate having an SOI structure.

  As an evaluation method for a semiconductor silicon wafer having an SOI structure, a Pseudo-MOSFET evaluation method has been reported. In this evaluation method, as shown in FIG. 8, in an SOI substrate composed of an SOI layer 11, a BOX layer 12, and a base wafer 13, a needle is directly brought into contact with the surface of the SOI layer 11 as an electrode for evaluating as an FET (non-non-conductive). Patent Document 1) or a mercury electrode is brought into contact, and these are referred to as Source (source) and Drain (drain). Then, as the gate electrode, the back surface of the wafer is vacuum-adsorbed to the conductor 14 or a needle is brought into contact therewith. Among these, in the Pseudo-MOSFET evaluation method using a mercury electrode, H. J. et al. A detailed report has been made by Hovel (Non-Patent Document 2). Electron mobility and interface state density are obtained by measuring the gate voltage applied to the positive side, immediately before the mercury electrode is brought into contact with the silicon wafer. Next, the wafer is subjected to HF treatment (pretreatment).

As for the HF processing, for example, a result studied in Patent Document 1 is disclosed. According to this, it is said that the measurement can be stabilized by introducing N ₂ into an environment in which a natural oxide film is not formed after HF treatment, specifically, by introducing N ₂ into a measuring apparatus and maintaining a non-oxidizing atmosphere.

  As described above, the Pseudo-MOSFET evaluation method is a method for evaluating the interface between the SOI layer and the BOX layer, but is also strongly influenced by the surface of the SOI layer. This is also discussed in the above-mentioned Non-Patent Documents 1 and 2, and further detailed examination is carried out in Non-Patent Document 3 below. That is, the interface state density on the surface of the SOI layer affects the IV characteristics and changes the IV curve.

  The SOI substrate treated in Non-Patent Document 3 has an SOI layer thickness of 190 nm and a BOX layer thickness of 390 nm. In recent years, a device is manufactured with the SOI layer fully depleted. Attempts have been made (FDSOI (Fully Depleted Silicon-On-Insulator)), and the trend toward thinner SOI layers continues. Since this Pseudo-MOSFET evaluation method is very strongly affected by the surface of the SOI layer as described above, there is a concern that the surface of the SOI layer is more strongly affected by the thinning of the SOI layer.

JP 2007-42942 A

S. Cristoloveanu, et. al. "A Review of the Pseudo-MOS Transistor in SOI Wafers: Operation, Parameter Extraction, and Applications" IEEE Trans. Electron Dev, 47, 1018 (2000). H. J. et al. Hovel, “Si film electrical charac- terization in SOI substrates by HgFET technologies”, Solid-State Electronics, 47, 1311 (2003). J. et al. Y. Choi and D.C. K. Schroder, “Mercury Pseudo-MOSFET (HgFET) drain current dependency on surface treatment”, Electrochemical Society Proceedings Volume 2005-03, 301 (2005).

  The present invention has been made in view of the above-described problems, and introduced an index for determining whether or not the conditions from the pretreatment to the start of the drain current measurement are appropriate. To provide an evaluation method by which a measurement result of a stable interface state density can be obtained even if the SOI layer is an ultra-thin SOI substrate by measuring the drain current under conditions after pretreatment along the index. Objective.

  In order to achieve the above object, the present invention is a method for evaluating interface characteristics between an SOI layer and a BOX layer of an SOI substrate by a Pseudo-MOSFET method after performing HF processing on the SOI substrate, A source electrode and a drain electrode are formed on the front surface, a gate electrode is formed on the back surface of the SOI substrate, and the drain current is measured when a voltage is applied between the source electrode and the drain electrode and between the gate electrode and the gate electrode. In the sub-threshold region in which the change of the drain current value is increased at every predetermined interval in the subthreshold region where the change of the drain current value at each increased interval does not become negative. A method for evaluating an SOI substrate, comprising measuring an interface state density of the SOI substrate within a later time.

  As described above, the gate voltage applied to the gate electrode is increased at every predetermined interval, and the amount of change in the drain current value at each increased interval does not become negative within the time after the HF treatment, By measuring the interface state density of the SOI substrate, the noise of the measured drain current is extremely reduced, and even if the SOI layer is an ultra-thin SOI substrate, accurate and stable interface state density measurement results can be obtained. Can be obtained.

At this time, the thickness of the SOI layer is preferably 20 nm or less, and the time from the HF treatment to the measurement of the drain current is preferably within 30 seconds.
By setting the conditions after such pretreatment, an accurate and stable measurement result of the interface state density can be obtained even on an extremely thin SOI substrate having an SOI layer thickness of 20 nm or less.

At this time, the interval at which the applied gate voltage is increased is preferably at least two intervals per [V].
By setting such an interval for increasing the applied gate voltage, an accurate measurement result of the interface state density can be obtained.

  Here, the subthreshold region is a region where the drain current changes exponentially with respect to the applied gate voltage, and is an important range for determining Vth in an actual device.

  In the following, when the gate voltage applied to the gate electrode is increased at predetermined intervals in the subthreshold region, the amount of change in the drain current value at each increased interval is referred to as an index α. Represented by

  As described above, according to the present invention, an accurate, stable, and reliable interface state density can be measured by the Pseudo-MOSFET method even in an SOI substrate with an extremely thin SOI layer.

It is a schematic diagram of the cross section of the SOI substrate for demonstrating this invention. It is a figure which shows the typical example of IV curve. It is a figure which shows the relationship between the thickness of an SOI layer, and an interface state density. It is a figure which shows IV curve in case the thickness of an SOI layer is 12 nm. It is a figure which shows the relationship between the time from the pretreatment to the measurement of the drain current and the frequency at which the index α becomes negative when the thickness of the SOI layer is 12 nm. It is a figure which shows the relationship between the time from the HF process to the measurement of drain current, and the thickness of the SOI layer where the index α is not negative. It is a figure which shows the relationship between the thickness of SOI layer, and the frequency by which the parameter | index (alpha) became negative when the time from HF process to the measurement of drain current is 60 second. It is the schematic diagram of the cross section of the SOI substrate for demonstrating the conventional Pseudo-MOSFET evaluation method.

Hereinafter, although an embodiment of the present invention is described in detail with reference to figures, the present invention is not limited to this.
FIG. 1 is a schematic view showing a cross section of an SOI substrate. A method for measuring drain current and interface state density according to the present invention will be described below with reference to FIG. The voltage applied to the gate electrode in which the BOX layer 2 is regarded as a gate oxide film, the electrode in which mercury is in contact with the surface of the SOI layer 1 is formed as a source and drain, and the conductor layer 4 is vacuum-adsorbed on the base wafer 3. The inversion layer is formed at the SOI / BOX interface. From the magnitude of the drain current flowing through the inversion layer from the source to the drain, the SOI / BOX interface characteristics such as the interface state density are obtained. This interface state density can be obtained from the slope (S) of the IV characteristic of a region where an inversion layer is formed, that is, a region called a subthreshold region. In FIG. 1, Dit represents the interface state density, Ψ represents the work function, and E represents the electric field strength.

FIG. 2 is a diagram showing a typical IV curve, where the horizontal axis represents the applied gate voltage and the vertical axis represents the drain current. Moreover, the following formula (1) shows the formula for obtaining the interface state density. Dit is the interface state density. SSL (Subthreshold Slope) is defined as a change in voltage (V _G ) when the current (I _D ) increases by an order of magnitude in the IV curve as shown in FIG. C _OX represents the capacity of the BOX layer, and C _Si represents the capacity of the SOI layer. However, as shown in FIG. 1, the interface exists not only at the SOI / BOX interface (Dit ₁ ) but also at the SOI layer surface (Dit ₂ ). (Formula (2)). C _Si , C _BOX , and C ₁ are capacitances at the SOI layer, BOX layer, and SOI / BOX interface, respectively. This term is sufficient when the SOI layer is sufficiently thick. However, when the SOI layer becomes thinner, C ₂ must be considered as an influence of the SOI surface.

  FIG. 3 shows the influence of the thickness of the SOI layer. The horizontal axis indicates the thickness of the SOI layer, and the vertical axis indicates the interface state density. It can be seen that the interface state density increases as the SOI layer becomes thinner. In particular, it can be seen that the interface state density is increased from an ultrathin SOI having a thickness of less than 50 nm and is strongly influenced by the surface of the SOI layer.

  Such thinning not only increases the interface state density, but also tends to disturb the IV curve as shown in FIG. FIG. 4 shows an IV curve when the time from the HF treatment to the measurement of the drain current (leaving time) is changed from 30 seconds to 60 seconds every 10 seconds. The thickness of the SOI layer is 12 nm. After the HF treatment, it is apparent that the surface of the SOI layer changes with time (detachment of ions terminated at the surface), affects the IV curve during measurement, and inhibits stable measurement.

  The characteristic of the abnormality in the IV characteristic is that the drain current greatly fluctuates without increasing at a constant rate. That is, there is a case where the fluctuation becomes large and the drain current that should be monotonously increased becomes negative (decreases) as the applied gate voltage increases. This is noise, and it has been shown by theoretical calculations and experiments that it is particularly remarkable in ultrathin SOI (Non-Patent Documents 2 and 3). In order to measure the interface state density with high reliability, it is indispensable to eliminate this disturbance (rattle), and for that purpose, the conditions related to the surface state of the SOI layer are very important. When the time from the HF treatment to the drain current measurement shown in FIG. 4 is 30 seconds, the IV curve is not disturbed and stable measurement is possible.

  The subthreshold region is a region where the drain current changes exponentially greatly with respect to the applied gate voltage in FIG. As described above, the interface state density is calculated from the slope of the IV curve in the subthreshold region. That is, the larger the change amount of the drain current with respect to the change amount of the applied gate voltage, the lower the interface state density. Conversely, when the change amount of the drain current is small, that is, the inclination is small, the interface state density is growing.

  In the subthreshold region, when the gate voltage applied to the gate electrode is increased at predetermined intervals, the amount of change in the drain current value at each increased interval is represented by an index α. The fact that α is negative indicates that the drain current value decreases as the applied gate voltage increases. The cause of this is so-called noise such as measurement system noise or the influence of the interface of the SOI surface, which does not occur originally. Since the interface state density is obtained from the slope of the IV curve, if such a decrease in drain current is observed, the calculation of the interface state density is adversely affected. In the example of FIG. 4, if the time from the HF treatment to the measurement of the drain current is 30 seconds, the IV curve has a clean slope in the subthreshold region, and the amount of change in the measured drain current value may be negative. Absent. On the other hand, when the time after the HF processing becomes longer, the IV curve is disturbed and the number of negative changes increases.

  FIG. 5 shows the frequency with which the amount of change α in the drain current value at each interval of the applied gate voltage in the subthreshold region when the SOI layer thickness is 12 nm becomes negative, and the time from HF treatment to measurement of the drain current. Indicates the relationship of time. The horizontal axis represents the standing time from HF pretreatment to drain current measurement. It can be seen that the frequency with which the drain current variation α in each interval of the applied gate voltage becomes negative increases as the standing time after the pretreatment increases.

  In this case, with respect to the interval for increasing the applied date voltage, it is preferable to set the interval to 2 or more per 1 [V] in consideration of the accuracy in obtaining the interface state. If the number of intervals per 1 [V] is increased, there is a problem that more measurement time is required. Therefore, 10 intervals or less per 1 [V] is preferable, and 4 intervals per 1 [V] is appropriate. is there.

  Hereinafter, the present invention will be described in detail as an example of an embodiment with reference to the drawings, but the present invention is not limited thereto.

(Example)
A plurality of SOI substrates having a diameter of 300 mm were prepared. The thickness of the SOI layer was 12, 20, 40, 50, and 60 nm. Before these SOI substrates are measured by the Pseudo-MOSFET method using a mercury probe, pretreatment with 1% HF is performed for 1 minute, and the standing time after HF treatment is 15, 30, 40, 50, It was measured as 60 seconds.
In FIG. 6, the horizontal axis represents the time (seconds) from the HF treatment to the drain current measurement, and the vertical axis represents the thickness of the SOI layer in which the change amount α of the drain current at each interval of the applied gate voltage does not become negative. It is the figure which showed the relationship between both. If the time from the HF treatment to the measurement of the drain current is within 30 seconds, the amount of change α in the drain current at each interval of the applied gate voltage becomes negative even if the SOI layer is as thin as 20 nm. I found out that there was nothing. Then, in the thickness of the SOI layer of the SOI substrate for measuring the interface state density, the drain current is measured within the time after the HF treatment in which α is not negative, thereby obtaining an accurate and stable interface state. Density can be measured.

(Comparative example)
An SOI substrate similar to that of the example was prepared, the same HF treatment was performed, and the time from the HF treatment to the drain current measurement was set to 60 seconds. FIG. 7 shows the relationship between the thickness of the SOI layer and the frequency with which the drain current change amount α becomes negative at each interval of the applied gate voltage. It can be seen that when the thickness of the SOI layer is less than 40 nm, the frequency at which the drain current change amount α at each interval of the applied gate voltage becomes negative increases, that is, the IV curve is disturbed. As a result, when the thickness of the SOI layer is less than 40 nm, it is difficult to accurately and stably measure the interface state density.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.

DESCRIPTION OF SYMBOLS 1 ... SOI layer, 2 ... BOX layer, 3 ... Base wafer, 4 ... Conductor layer,
DESCRIPTION OF SYMBOLS 11 ... SOI layer, 12 ... BOX layer, 13 ... Base wafer, 14 ... Conductor layer.

Claims (3)

  A method for evaluating interface characteristics between an SOI layer and a BOX layer of an SOI substrate by a Pseudo-MOSFET method after performing an HF process on the SOI substrate, wherein a source electrode and a drain electrode are provided on a surface of the SOI substrate, and the SOI substrate In the subthreshold region where the drain current greatly changes when a drain current is measured by applying a voltage between the source electrode and the drain electrode and between the source electrode and the drain electrode and measuring the drain current. The gate voltage applied to the SOI substrate is increased at predetermined intervals, and the amount of change in the drain current value at each increased interval does not become negative. A method for evaluating an SOI substrate, comprising measuring unit density.   2. The method for evaluating an SOI substrate according to claim 1, wherein a thickness of the SOI layer is 20 nm or less, and a time from the HF treatment to the measurement of the drain current is within 30 seconds.   3. The method for evaluating an SOI substrate according to claim 1, wherein an interval for increasing the applied gate voltage is two or more intervals per 1 [V]. 4.

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