JP2016063648A - Drive device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a switching element drive device which reduces wasteful current consumption and a noise, when the switching element is not necessary to be driven on/off.SOLUTION: A charge pump circuit 30 generates a voltage which is higher than the peak height of a periodic pulse signal oscillated by an oscillation circuit 20. The oscillation circuit 20 includes resistors 22, 23, a capacitor 24 and switches 25, 26. The resistance value of the resistor 23 is set to be greater than the resistance value of the resistor 22. Also, the switches 25 and 26 are configured in such a manner that either one is switched on by a drive signal from the outside. By this, the combination of the resistors 22, 23 of the oscillation circuit 20 with the capacitor 24 is switched.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a drive device that drives a switching element.

  Conventionally, a switching element is used for a converter that converts a voltage and a switch circuit that opens and closes an electric circuit. The switching element may be driven with a voltage higher than a voltage that is turned on / off by the switching element. In this case, a voltage source that supplies a high voltage is required. For example, Patent Document 1 describes a high-side drive circuit including a charge pump circuit that generates a high voltage based on a pulse signal oscillated by an oscillation circuit.

JP 2007-214647 A

  However, the technique described in Patent Document 1 has a problem that the charge pump circuit operates even when the switching element does not need to be turned on / off, and wasteful current consumption and noise are generated.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide a switching element driving device capable of reducing wasteful current consumption and noise.

  A driving device according to the present invention is a driving device including a driving circuit that drives a switching element at a voltage higher than a voltage that is turned on / off by the switching element, and a generation circuit that generates a voltage to be supplied to the driving circuit. The generation circuit includes an oscillation circuit that periodically oscillates a pulse signal and a capacitor that is charged and discharged according to a change in the signal level of the periodic pulse signal oscillated by the oscillation circuit. By superimposing the periodic pulse signal on, a voltage higher than the pulse height of the periodic pulse signal is generated, and when the drive circuit does not drive the switching element, the oscillation period of the oscillation circuit And a stop means for stopping the oscillation of the oscillation circuit.

  According to the present invention, the capacitor is charged / discharged in accordance with the change in the signal level of the periodic pulse signal oscillated by the oscillation circuit, and the high voltage is generated by superimposing the pulse signal on the charge voltage of the capacitor. A voltage is supplied to the drive circuit of the switching element. When the drive circuit does not need to drive the switching element, the oscillation cycle of the oscillation circuit is extended or the oscillation of the oscillation circuit is stopped. Thereby, useless current consumption and noise of the generation circuit are reduced.

  In the driving device according to the present invention, the oscillation circuit oscillates the pulse signal at a cycle according to a time constant by a combination of a resistor and a capacitor, and the extension means switches a plurality of the combinations. The time constant is made large.

  According to the present invention, by changing the combination of the resistor and the capacitor, the operating cycle of the oscillation circuit is extended, so that the consumption current and noise of the generation circuit are reduced.

  The drive device according to the present invention is characterized in that the stopping means turns off power supply to the oscillation circuit.

  According to the present invention, the oscillation of the oscillation circuit is stopped by stopping the supply of power to the oscillation circuit. Thereby, useless current consumption and noise of the generation circuit are reduced.

  According to the present invention, it is possible to reduce unnecessary current consumption and noise of the generation circuit by extending the oscillation cycle of the oscillation circuit. Further, by stopping the oscillation of the oscillation circuit, it is possible to reduce unnecessary current consumption and noise of the generation circuit.

1 is a block diagram showing a schematic configuration of a drive device according to Embodiment 1. FIG. It is a circuit diagram which shows the connection structure of an oscillation circuit and a charge pump circuit. It is a circuit diagram which shows the connection structure of a bootstrap circuit. It is a circuit diagram which shows the connection structure of a bootstrap circuit. It is a circuit diagram which shows the connection structure of the charge pump circuit which concerns on a modification. FIG. 4 is a block diagram illustrating a schematic configuration of a drive device according to a second embodiment.

Hereinafter, a switching element driving apparatus according to the present invention will be described in detail with reference to the drawings illustrating embodiments thereof.
(Embodiment 1)
FIG. 1 is a block diagram showing a schematic configuration of the driving apparatus according to the first embodiment. The driving device drives the FETs 10 and 11 as switching elements on / off. The FETs 10 and 11 constitute a bridge circuit, the FET 10 is arranged on the high side, and the FET 11 is arranged on the low side. The drain of the FET 10 is connected to the battery 12, and the source is connected to the drain of the FET 11 and one end of the load 13. The source of the FET 11 and the other end of the load 13 are connected to the ground potential. The FETs 10 and 11 may constitute either a half bridge circuit or a full bridge circuit.

  The driving device includes a generation circuit 14 and a bootstrap circuit 40 (corresponding to a driving circuit). The generation circuit 14 generates a voltage to be supplied to the bootstrap circuit 40. The generation circuit 14 includes an oscillation circuit 20 and a charge pump circuit 30 connected to the oscillation circuit 20. The charge pump circuit 30 is connected to the bootstrap circuit 40 through diodes 50 and 51 separately. The bootstrap circuit 40 is connected to the gates of the FETs 10 and 11. The oscillation circuit 20 is supplied with power from Vcc (5 V). The charge pump circuit 30 and the bootstrap circuit 40 are supplied with power from the battery 12.

  When the FET 10 is off and the FET 11 is on for a short period, the capacitor 42 cannot be sufficiently charged to a voltage that can drive the FET 10 as will be described later, and the FET 10 cannot be turned on. Therefore, the oscillation circuit 20 and the charge pump circuit 30 Thus, an insufficient voltage is superimposed on the bootstrap circuit 40. That is, the generation circuit 14 generates a voltage to be supplied to the bootstrap circuit 40.

  FIG. 2 is a circuit diagram showing a connection configuration of the oscillation circuit 20 and the charge pump circuit 30. The oscillation circuit 20 includes a Schmitt trigger circuit 21, resistors 22 and 23 and capacitors 24 each having one end connected to the input terminal of the Schmitt trigger circuit 21, and one end connected to the other ends of the resistors 22 and 23. Switches 25 and 26. The other ends of the switches 25 and 26 are connected to the output terminal of the Schmitt trigger circuit 21. The other end of the capacitor 24 is connected to the ground potential.

  In the first embodiment, the resistance value of the resistor 23 is set larger than the resistance value of the resistor 22. One of the switches 25 and 26 is turned on by a drive signal from the CPU 15 arranged outside the drive device.

  The charge pump circuit 30 includes a dead time circuit 31, and a pnp transistor 34 and an npn transistor 35 having bases connected to the dead time circuit 31, respectively. Transistors 34 and 35 are totem pole connected. The emitter of the transistor 34 is connected to the battery 12, and the emitter of the transistor 35 is connected to the ground potential. The charge pump circuit 30 includes a capacitor 33 having one end connected to the collectors of the transistors 34 and 35 and a resistor 32 having one end connected to the other end of the capacitor 33. The other end of the resistor 32 is connected between the diodes 50 and 51.

  An output terminal of the Schmitt trigger circuit 21 included in the oscillation circuit 20 is connected to a dead time circuit 31 included in the charge pump circuit 30.

  3A and 3B are circuit diagrams showing a connection configuration of the bootstrap circuit 40. FIG. FIG. 3A corresponds to the case where the FET 10 is off and the FET 11 is on. FIG. 3B corresponds to the case where the FET 10 is on and the FET 11 is off. A PWM signal is input from the PWM circuit 60, and on / off of the FETs 10 and 11 is controlled. The operation of the PWM circuit 60 is controlled by the CPU 15. The bootstrap circuit 40 includes a diode 41 having an anode connected to the battery 12, a capacitor 42 having one end connected to the cathode of the diode 41, a resistor 43 having one end connected to the other end of the capacitor 42, and a c-contact type. Switches 44 and 45. The other end of the resistor 43 is connected to the connection point of the FETs 10 and 11.

The common terminal of the switch 44 is connected to the gate of the FET 10, the normally open terminal is connected to the connection point of the diode 41 and the capacitor 42, and the normally closed terminal is connected to the connection point of the capacitor 42 and the resistor 43.
The common terminal of the switch 45 is connected to the gate of the FET 11, the normally closed terminal is connected to the battery 12, and the normally open terminal is connected to the ground potential. In each of the switches 44 and 45, the connection destination of the common terminal is switched by the PWM signal from the PWM circuit 60.

  The diode 50 has a cathode connected to one end of the capacitor 42. The anode of the diode 51 is connected to the source of the FET 10.

  The diode 50 prevents a current from flowing backward from the bootstrap circuit 40 to the charge pump circuit 30. The diodes 50 and 51 clamp the source potential of the FET 10 to the potential at one end of the capacitor 42.

  Hereinafter, the operation of the driving apparatus according to the first embodiment will be described. In the oscillation circuit 20 shown in FIG. 2, when the voltage of the capacitor 24, that is, the voltage of the input terminal of the Schmitt trigger circuit 21 is lower than the threshold value, the voltage of the output terminal of the Schmitt trigger circuit 21 becomes high level, and the capacitor 24 becomes the resistor 22. Or it is charged via 23. After that, when the capacitor 24 is charged and the voltage of the input terminal of the Schmitt trigger circuit 21 becomes higher than the threshold value, the voltage of the output terminal of the Schmitt trigger circuit 21 becomes low level, and the charging voltage of the capacitor 24 becomes the resistor 22 or 23. It is discharged through. That is, the oscillation frequency of the oscillation circuit 20 changes to low / high depending on the time constant between the capacitor 24 and the resistor 22 or 23.

  In the first embodiment, since the resistance value of the resistor 23 is larger than the resistance value of the resistor 22, the oscillation frequency is higher when the switch 26 is on than when the switch 25 is on. Becomes lower. Thereby, less energy is consumed by oscillation and less noise is generated.

  In the charge pump circuit 30, the pulse signal generated by the oscillation circuit 20 is input to the dead time circuit 31. The dead time circuit 31 provides a delay time to the pulse signal and prevents the transistors 34 and 35 from being simultaneously turned on to cause a through current to flow. Thereby, the transistors 34 and 35 are alternately turned on and off, and the capacitor 33 is charged and discharged. The current that charges and discharges the capacitor 33 is limited by the resistor 32.

  In the bootstrap circuit 40, when the FET 10 is turned off and the FET 11 is turned on, as shown in FIG. 3A, the switches 44 and 45 have a common terminal and a normally closed terminal connected to each other. As a result, the voltage between the source and the gate of the FET 10 becomes 0, and the FET 10 is turned off. Further, the voltage of the battery 12 is applied between the source and gate of the FET 11 via the switch 45, and the FET 11 is turned on. The capacitor 42 is charged via the diode 41, the resistor 43, and the FET 11 with the voltage of the battery 12.

  On the other hand, when the FET 10 is turned on and the FET 11 is turned off, the switches 44 and 45 are connected to the common terminal and the normally open terminal as shown in FIG. 3B. Thereby, the charging voltage of the capacitor 42 is applied between the source and the gate of the FET 10, and the FET 10 is turned on. Further, the FET 11 is turned off because the voltage between the source and the gate becomes zero.

  When the duty of the PWM signal from the PWM circuit 60 is large, that is, when the FET 10 is off and the FET 11 is on for a short period, the capacitor 42 is not sufficiently charged. For this reason, the voltage applied between the source and gate of the FET 10 during the ON period of the FET 10 decreases, and the FET 10 is not completely turned on. Therefore, the voltage applied between the gate and source of the FET 10 is raised by the capacitor 42 connected in parallel to the capacitor 33 charged by the charge pump circuit 30 and charged by the bootstrap circuit 40. As a result, the FET 10 can be reliably turned on even when the duty of the PWM signal is large.

  With the above configuration, the bootstrap circuit 40 charges and discharges the capacitor 42 according to the on / off period of the FETs 10 and 11, and the charge pump circuit 30 charges and discharges the capacitor 33 according to the timing of the oscillation frequency of the oscillation circuit 20. . When the charging voltage of the capacitor 42 is insufficient, the voltages between the gates and the sources of the FETs 10 and 11 are raised by the capacitors 33 and 42 connected in parallel to drive the FETs 10 and 11.

  That is, the capacitor 33 is charged / discharged according to a change in the signal level of the periodic pulse signal oscillated by the oscillation circuit 20, and a high voltage is generated by superimposing the pulse signal on the charging voltage of the capacitor 33. Is supplied to the bootstrap circuit 40 that drives the FETs 10 and 11.

  When there is no need to drive the FETs 10 and 11, it is possible to reduce unnecessary current consumption and noise of the oscillation circuit 20 and the charge pump circuit 30 by extending the oscillation cycle of the oscillation circuit 20. Further, since the oscillation circuit 20 is not stopped, the rise of the oscillation circuit 20 and the charge pump circuit 30 is not delayed when the bridge circuit is driven again.

  By changing the combination of the resistors 22 and 23 and the capacitor 24, the operation cycle of the oscillation circuit 20 is extended, so that unnecessary current consumption and noise of the oscillation circuit 20 and the charge pump circuit 30 can be reduced.

  In the first embodiment, the oscillation circuit 20 includes the resistors 22 and 23 and the capacitor 24. However, the oscillation circuit 20 includes either the resistor 22 or 23, and other than the capacitor 24. It is good also as a structure which has another capacitor | condenser in this. Further, the oscillation circuit 20 may be configured to have three or more capacitors, and these capacitors may be switched by a switch so that the period of the pulse signal oscillated by the oscillation circuit 20 can be changed in three or more stages. Furthermore, the drive device may be configured by a storage element such as a capacitor instead of the battery 12.

(Modification)
FIG. 4 is a circuit diagram showing a connection configuration of a charge pump circuit according to a modification. In the modification, the drive device is configured by a charge pump circuit 70 instead of the charge pump circuit 30. The charge pump circuit 70 includes an inverting amplifier 71, a diode 72 having an anode connected to the input terminal of the inverting amplifier 71, and a capacitor 73 connected between the cathode of the diode 72 and the output terminal of the inverting amplifier 71. . Further, the charge pump circuit 70 includes a diode 74 having an anode connected to the cathode of the diode 72 and a capacitor 75 connected between the cathode of the diode 74 and the ground potential.

  An output terminal of the inverting amplifier circuit 21 included in the oscillation circuit 20 is connected to an input terminal of an inverting amplifier 71 included in the charge pump circuit 70.

  In the charge pump circuit 70, when the voltage at the input terminal of the inverting amplifier 71 is high level, the voltage at the output terminal of the inverting amplifier 71 is low level, so that the capacitor 73 is connected to the input / output of the inverting amplifier 71 via the diode 72. It is charged by the voltage difference.

  When the voltage at the input terminal of the inverting amplifier 71 is at a low level, the voltage at the output terminal of the inverting amplifier 71 is at a high level. Therefore, a voltage obtained by adding the output voltage of the inverting amplifier 71 and the charging voltage of the capacitor 73 to the diode 74 is obtained. The capacitor 75 is charged by being applied. That is, when the forward voltage drop in the diodes 72 and 74 is ignored, the capacitor 75 is charged with a voltage corresponding to the sum of the output voltages of the inverting amplifier 71 and the capacitor 73.

  Even when the charge pump circuit 70 is used, when the charging voltage of the capacitor 42 is insufficient as described above, the voltage between the gates and the sources of the FETs 10 and 11 is increased by the capacitor 42 and the capacitor 73 connected in parallel. FETs 10 and 11 can be driven.

(Embodiment 2)
FIG. 5 is a block diagram showing a schematic configuration of the driving apparatus according to the second embodiment. About the structure similar to Embodiment 1, the same code | symbol is attached | subjected and the detailed description is abbreviate | omitted.

In addition to the configuration of the first embodiment, the drive device according to the second embodiment includes a switching circuit 80 connected between Vcc and the oscillation circuit 20. The switching circuit 80 turns on / off the power supply from Vcc to the oscillation circuit 20 in accordance with a drive signal from the CPU 15.
When the bridge circuit described above is driven by the charge pump circuit 30 and the bootstrap circuit 40, the switching circuit 80 turns on the power supply to the oscillation circuit 20. When the bridge circuit is not driven, the switching circuit 80 turns off the power supply to the oscillation circuit 20 and stops the oscillation circuit 20.

  As in the first embodiment, the bootstrap circuit 40 charges and discharges the capacitor 42 according to the on / off period of the FETs 10 and 11, and the charge pump circuit 30 sets the capacitor 33 according to the timing of the oscillation frequency of the oscillation circuit 20. Charge and discharge. When the charging voltage of the capacitor 42 is insufficient, the voltages between the gates and the sources of the FETs 10 and 11 are raised by the capacitors 33 and 42 connected in parallel to drive the FETs 10 and 11.

That is, the capacitor 33 is charged / discharged according to a change in the signal level of the periodic pulse signal oscillated by the oscillation circuit 20, and a high voltage is generated by superimposing the pulse signal on the charging voltage of the capacitor 33. Is supplied to the bootstrap circuit 40 that drives the FETs 10 and 11.
When the FETs 10 and 11 do not need to be driven, useless current consumption and noise of the oscillation circuit 20 and the charge pump circuit 30 can be reduced by stopping the oscillation of the oscillation circuit 20.

  By stopping the supply of Vcc operating power to the oscillation circuit 20, the oscillation of the oscillation circuit 20 is stopped. Thereby, useless current consumption and noise of the oscillation circuit 20 and the charge pump circuit 30 are reduced.

  The embodiment disclosed this time is to be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the meanings described above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims. That is, embodiments obtained by combining technical means appropriately changed within the scope of the claims are also included in the technical scope of the present invention.

10, 11 FET
14 Generation Circuit 20 Oscillation Circuit 22, 23 Resistor 24 Capacitor 25, 26 Switch 30 Charge Pump Circuit 33, 73 Capacitor 40 Bootstrap Circuit 80 Switching Circuit

Claims (3)

In a driving device comprising: a driving circuit that drives a switching element at a voltage higher than a voltage that is turned on / off by the switching element; and a generation circuit that generates a voltage to be supplied to the driving circuit.
The generation circuit includes an oscillation circuit that periodically oscillates a pulse signal and a capacitor that is charged and discharged according to a change in the signal level of the periodic pulse signal oscillated by the oscillation circuit. A voltage higher than the pulse height of the periodic pulse signal is generated by superimposing the periodic pulse signal,
A drive device comprising: extension means for extending an oscillation cycle of the oscillation circuit or stop means for stopping oscillation of the oscillation circuit when the drive circuit does not drive the switching element. The oscillation circuit oscillates the pulse signal at a period according to a time constant by a combination of a resistor and a capacitor,
The driving device according to claim 1, wherein the extension means switches a plurality of the combinations so that the time constant increases. The driving apparatus according to claim 1, wherein the stopping unit is configured to turn off power supply to the oscillation circuit.

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