JP2009095214A - Dc-dc converter circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a technique for suppressing a surge voltage that is generated at the start of a DC-DC converter. <P>SOLUTION: A voltage-reducing DC-DC converter includes a high-side transistor, a low-side transistor functioning as a synchronous rectifier, and a control circuit. The high-side transistor consists of a high-side transistor Q1 and a high-side transistor Q3 reverse in polarity to the high-side transistor Q1, which are connected in parallel. The control circuit has a boost trap circuit which obtains a voltage higher than an input voltage to turn on the high-side transistor Q1 with sufficient current, a drive circuit 103 for driving the high-side transistor Q1, a drive circuit 102 for driving the high-side transistor Q3, and a drive circuit 104 for driving the load-side transistor Q2. At the start of the DC-DC converter, the control circuit carries out control to turn off the high-side transistor Q1, turn on the high-side transistor Q3, and turn off the load-side transistor Q2. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a DC-DC converter circuit.

  As an example of a DC-DC converter circuit, a step-down DC-DC converter circuit is widely used in industrial equipment. FIG. 5 shows a typical configuration example of a step-down DC-DC converter circuit. The DC-DC converter circuit shown in FIG. 5 includes a high side transistor Q1 and a low side transistor Q2 as switching elements. The high-side transistor Q1 and the low-side transistor Q2 are MOSFETs (Metal Oxide Field Effect Transistors), and the time during which the drain D and source S of the high-side transistor Q1 are in a conductive state (hereinafter referred to as ON) The input voltage V1 supplied from the input voltage source Vdc is stepped down by controlling the ratio with respect to the disconnection time (hereinafter referred to as OFF) to obtain the output voltage V2, and this output voltage V2 is The voltage is supplied from both ends of the output smoothing capacitor C to both ends of the load (Load). The low-side transistor Q2 functions as a so-called flywheel diode, and acts to release the magnetic energy stored in the inductor L when the high-side transistor Q1 is turned off.

  As shown in FIG. 5, each of the high-side transistor Q1 and the low-side transistor Q2 is a control signal that controls each gate G from a control circuit IC that forms a control circuit in the form of an integrated circuit (IC). Controlled by. The control signal supplied to the gate G of the high-side transistor Q1 is denoted by reference sign H-Drive. Here, in order to turn on the high-side transistor Q1, it is necessary to apply a voltage higher than a threshold value between the gate G and the source S of the high-side transistor Q1, and therefore, a bootstrap circuit is generally used. Is. Further, a signal for turning on the low side transistor Q2 is supplied to the gate G of the low side transistor Q2 from the control circuit IC in synchronization with the turning off of the high side transistor Q1. A control signal supplied to the gate G of the low-side transistor Q2 is denoted by a symbol L-Drive. Thus, since the low side transistor Q2 is turned on in synchronization with the high side transistor Q1 and has the same function as the flywheel diode, the DC-DC converter circuit including the low side transistor Q2 is a synchronous rectification DC- Also referred to as a DC converter circuit.

  In FIG. 5, the bootstrap circuit includes an input voltage source 100 that generates a voltage Vcc disposed inside a control circuit IC (DriverIC) 20, a bootstrap diode Db disposed outside the control circuit IC20, and a bootstrap capacitor Cboot. Is configured as a main component. As shown in FIG. 5, the negative terminal of the bootstrap capacitor Cboot is connected to the source S of the high side transistor Q1. In this control circuit IC, when the low-side transistor Q2 is turned on, the current from the input voltage source 100 arranged in the control circuit IC20 flows through a path of → bootstrap diode Db → bootstrap capacitor Cboot → low-side transistor Q2. The charge is stored in the bootstrap capacitor Cboot. Here, before the low-side transistor Q2 is turned off, the capacitance value of the bootstrap capacitor Cboot is set so that the voltage VB that is substantially equal to the voltage Vcc is generated at both ends of the bootstrap capacitor Cboot. The voltage applied to the drive circuit 103 for driving the high side transistor Q1 can be a voltage higher than the voltage of the source S of the high side transistor Q1 by Vcc. In this way, even when there is no power source that generates a voltage equal to or higher than the input voltage V1 with the ground terminal (ground), the gate G of the high side transistor Q1 is sufficient to turn on the high side transistor Q1. A voltage that is higher than the voltage of the source S by the voltage VB can be supplied.

  In the DC-DC converter having the configuration shown in FIG. 5 described above, since the charge of the bootstrap capacitor Cboot is zero at the time of start-up, the low-side transistor Q2 is first turned on to accumulate the charge in the bootstrap capacitor Cboot. There is a need. 6 drives the signal H-Drive and the low-side transistor Q21 output from the drive circuit 103 for driving the high-side transistor Q1, which are arranged in the control circuit IC when the DC-DC converter of FIG. 5 is started. Each of the signals L-Drive output from the drive circuit 104 is illustrated. In FIG. 6, the horizontal axis is a time axis indicating time (Time), and the origin of the horizontal axis to which the activation code is attached indicates the time of activation. The upper portion (denoted as ON) of the H-Drive waveform on the sheet is in a state where the high-side transistor Q1 is turned on, and the lower portion (denoted as OFF) of the waveform of the H-Drive waveform is turned off. The upper portion of the waveform of the L-Drive waveform (denoted as ON) is the state where the low-side transistor Q2 is turned on, and the lower portion of the waveform of L-Drive waveform (denoted as OFF) is the low side. This shows a state in which the transistor Q2 is turned off.

  7 and 8 show that in the conventional control technique, after the DC-DC converter is stopped, the converter is turned on again before the voltage of the output smoothing capacitor C is discharged to 0 V (volt). It is a figure for demonstrating the phenomenon which arises when it starts. FIG. 7 is a diagram for explaining a phenomenon at the time of starting the circuit shown in FIG. In the conventional circuit, since the low-side transistor Q2 is first turned on as described above, the charge remaining in the output smoothing capacitor C flows as shown by current Id in FIG. 7, and the current Id flows. Magnetic energy is stored in the inductor L. Next, at the moment when the low-side transistor Q2 is turned off, the energy stored in the inductor L acts to be converted into a counter electromotive force, and the voltage Vds between the drain D and the source S of the low-side transistor Q2 is changed. Generates a surge voltage.

  FIG. 8 is a diagram showing the phenomenon at the time of starting the circuit shown in FIG. 5 with reference to the voltage waveform of the signal L-Drive from the drive circuit 104 and the voltage waveform between the drain D and the source S of the low-side transistor Q2. It is. In the voltage waveform of the signal L-Drive from the drive circuit 104, “ON” indicates that the low-side transistor Q2 is turned on, and “OFF” indicates that the described portion indicates that the low-side transistor Q2 is OFF in the voltage waveform of the signal L-Drive. Is shown. As shown by the waveform of the voltage Vds between the drain D and the source S of the low side transistor Q2, a surge voltage is generated immediately after the low side transistor Q2 is turned off, and an excessive voltage is applied to the low side transistor Q2 due to the surge voltage. In some cases, the low side transistor Q2 may break down.

FIG. 9 is a circuit for solving the problem that a surge voltage is generated immediately after the low-side transistor Q2 is turned off. The discharge discharges the charge accumulated in the output smoothing capacitor C after the operation of the DC-DC converter is stopped. Measures such as adding a circuit 30 are taken. That is, when the output voltage V2 falls below a predetermined voltage value determined by the Zener diode 303, the transistor 301 is turned off. As a result, the transistor 302 is turned on and accumulated in the output smoothing capacitor C through the resistor 304. Discharges charges rapidly.
Japanese Patent Laid-Open No. 11-146637 JP 2004-32875 A

  However, such additional countermeasures for the discharge circuit have problems such as an increase in the number of parts and the cost of the parts, and the surge voltage suppression effect is not sufficient depending on the sequence of such a countermeasure circuit. .

  An object of the present invention is to solve the above-described problems and to provide a technique for suppressing a surge voltage without increasing the number of parts and the cost of parts.

In order to obtain a predetermined output voltage, the DC-DC converter of the present invention is synchronized with the operation of the high side transistor whose on and off are controlled by its control terminal and the on and off of the high side transistor. DC- that includes a low-side transistor that is controlled on and off by its control terminal and functions as a synchronous rectifier, and a control circuit that controls the high-side transistor and the low-side transistor, and steps down an input voltage from an input voltage source In the DC converter, the high-side transistor includes a first high-side transistor having a first control terminal, and a second high-side transistor having a second control terminal having a polarity opposite to that of the first high-side transistor. Are formed by connecting the high side transistors in parallel,
The control circuit includes a bootstrap circuit for obtaining a voltage higher than the input voltage;
A first drive circuit that is supplied with a voltage higher than the input voltage from the bootstrap circuit and supplies a first control signal to the first control terminal, and a second control to the second control terminal A second drive circuit for supplying a signal, and a third drive circuit for supplying a third control signal to a third control terminal of the low-side transistor, and supplying power from the input voltage source And the first control signal and the low-side transistor so that the first high-side transistor is turned off, the second high-side transistor is turned on, and the low-side transistor is turned off. A second control signal and the third control signal are supplied.

  The DC-DC converter of the present invention is a so-called synchronous rectification type DC-DC converter having a synchronous rectifier and stepping down an input voltage to obtain an output voltage. In this DC-DC converter, a so-called high side transistor is formed by connecting a first high side transistor and a second high side transistor in parallel. Since the first high-side transistor has a first control terminal and the second high-side transistor has a second control terminal, the high-side transistor can be controlled with two types of control signals. . Here, the first high-side transistor and the second high-side transistor are transistors having opposite polarities. The control circuit has a bootstrap circuit for obtaining a voltage higher than the input voltage from the input voltage source, and a voltage higher than the input voltage is supplied to the first drive circuit. The first drive circuit can sufficiently turn on the first high-side transistor by supplying the first control signal to the first control terminal. On the other hand, a second control signal is supplied from the second drive circuit to the second control terminal of the second high-side transistor. However, since the second transistor has a reverse polarity, it is less than the input voltage. Can be sufficiently turned on at a voltage of. Further, the third control signal is supplied from the third drive circuit to the third control terminal of the low-side transistor, so that the low-side transistor can function as a synchronous rectifier. Further, when the low-side transistor is turned on / off, a voltage higher than the input voltage can be generated in the bootstrap circuit. Then, at the time of start-up, which is the time to start supplying power from the input voltage source, the first high-side transistor is turned off, the second high-side transistor is turned on, and the low-side transistor is turned off. By supplying the first control signal, the second control signal, and the third control signal, it is possible to start the DC-DC converter and to prevent occurrence of a surge voltage.

  ADVANTAGE OF THE INVENTION According to this invention, the technique of the DC-DC converter which suppresses a surge voltage can be provided, without increasing a number of parts and the expense of components.

  Hereinafter, the power supply apparatus according to the embodiment will be described with reference to the drawings.

  FIG. 1 shows a step-down DC-DC converter according to an embodiment. The DC-DC converter shown in FIG. 1 includes a first high-side transistor Q1 configured by an N-channel FET, a low-side transistor Q2 configured by an N-channel FET, and a second high-side configured by a P-channel FET. It has a side transistor Q3. The first high side transistor Q1 and the second high side transistor Q3 are connected in parallel.

  The step-down DC-DC converter according to the embodiment includes a control circuit IC (Driver IC) 10, which includes a first drive circuit 103 for driving the first high-side transistor Q 1, a second drive circuit 103. A second drive circuit 102 for driving the high-side transistor Q3 and a third drive circuit 104 for driving the low-side transistor Q2, and a first control signal from the first drive circuit 103. The gate G (first control terminal) of the first high-side transistor Q1 is driven by the signal H1-Drive that is, and the second control signal from the second drive circuit 102 is the second control signal H2-Drive. The gate G (second control terminal) of the high side transistor Q3 is driven, and the third drive circuit is driven. The gate G of the third control signal at a signal L-Drive by low-side transistor Q2 (third control terminal) is adapted to be driven from the 104.

  FIG. 2 illustrates each of the signal H1-Drive, the signal L-Drive, and the signal H2-Drive. The horizontal axis in FIG. 2 indicates the time axis, and the time with code activation indicates the time when the DC-DC converter is activated. Here, the activation refers to a state immediately after the moment when a switch is provided in series with the input voltage source Vdc and this switch is turned on (referred to as power-on). The sign on and the sign off described in FIG. 2 indicate that the signal H1-Drive is a gate voltage at which the first high-side transistor Q1 is turned on or off, and the signal L-Drive is the low side. The gate voltage indicates that the transistor Q2 is turned on or off, and the signal H2-Drive indicates that the gate voltage is turned on or off by the second high-side transistor Q3.

  Immediately after startup, as can be seen from FIG. 2, the signal H2-Drive is at a low level, that is, the second high-side transistor Q3 is turned on. The signal L-Drive is at a low level, that is, the low-side transistor Q2 is turned off. In such a state where the second high-side transistor Q3 is on and the low-side transistor Q2 is off, even if charge is accumulated in the output smoothing capacitor C, the output side smoothing capacitor C and the low-side transistor Q2 As shown in FIG. Then, as shown in FIG. 8, a harmful surge voltage is prevented from being generated by the action of the counter electromotive force of the inductor L. First, when the second high-side transistor Q3 is turned on, the voltage V2 can be raised and the DC-DC converter can be activated.

  As shown in FIG. 2, in the steady state after activation, the signal H1-Drive and the signal H2-Drive are complementary signals in which the low level and the high level are reversed, and the first high-side transistor Q1 The second high-side transistor Q3 repeats the operation of turning on simultaneously and turning off simultaneously. Here, the magnitude of the current shunted to the first high-side transistor Q1 and the second high-side transistor Q3 is the value of the on-resistance between the drain D and the source S of the first high-side transistor Q1, and the first This corresponds to the ratio between the on-resistance value of the source S and the drain D of the second high-side transistor Q3. The main role of the second high-side transistor Q3 is to prevent the generation of a surge voltage at the time of start-up. First, the voltage V2 is raised by turning on the second high-side transistor Q3. Since the DC-DC converter is started up, in order to allow the current to mainly flow through the first high-side transistor Q1 during steady operation, the on-resistance is within a range in which the generation of a surge voltage can be prevented. Compared to the first high-side transistor Q1, it is possible to reduce the component cost by making it larger and smaller (small in chip area).

  As can be seen from the waveform diagram shown in FIG. 2, when the first high-side transistor Q1 and the second high-side transistor Q3 are turned off, the low-side transistor Q2 is turned on and functions as a synchronous rectifier. The voltage across the output smoothing capacitor C, that is, the output voltage V2 supplied to the load is input to the pulse width modulation (PWM) circuit 101, and the first voltage is set so that the output voltage V2 becomes a predetermined constant voltage. Controls the ratio of the on and off times of the high side transistor Q1 and the second high side transistor Q3.

  In this way, first, the second high-side transistor Q3 is turned on, whereby the voltage V2 is raised and the DC-DC converter is activated, but the low-side transistor Q2 is turned off at the time of activation. Therefore, the above-described surge voltage is not generated. When the low-side transistor Q2 is turned on, the bootstrap circuit operates to add the approximate voltage VB to the input voltage V1 above the threshold voltage to the gate G of the first high-side transistor Q1, which is an N-channel MOSFET. A voltage is applied to sufficiently turn on the first high-side transistor Q1. Note that the second high-side transistor Q3, which is a P-channel MOSFET, can naturally be sufficiently turned on at a voltage lower than the input voltage V1, so that a bootstrap circuit is not required. Here, the reason why the first high-side transistor Q1 is an N-channel MOSFET is that when the circuit is configured with discrete components by matching the polarities of the first high-side transistor Q1 and the low-side transistor Q2, the number of components is reduced. This is because, when the power MOSFET is formed inside the IC, the same process is adopted, so that the process can be simplified and the on-resistance can be reduced.

  FIG. 3 illustrates another embodiment. In the DC-DC converter shown in FIG. 3, a control circuit IC11 is used instead of the control circuit IC10 shown in FIG. The basic configuration of the control circuit IC11 is the same as that of the control circuit IC10, except that the soft start block S / S105 for soft start is arranged. Each of the third drive circuit 102, the first drive circuit 103, and the second drive circuit 104 is controlled via the soft start block S / S105.

  FIG. 4 shows waveforms of respective parts at the time of starting the circuit shown in FIG. The basic characteristics of each of the signal H1-Drive, the signal L-Drive, and the signal H2-Drive shown in FIG. 4 are the same as those shown in FIG. 2, and immediately after activation, the signal H2-Drive is It is not different in that the low level, that is, the second high-side transistor Q3 is turned on, and the signal L-Drive is low level, that is, the low-side transistor Q2 is turned off. However, the soft start block S / S 105 sets the time ratio (pulse width) for turning on the second high-side transistor Q3 from the time when the DC-DC converter is activated until the time when the soft start is finished. In response to the control, the current is gradually increased so that an excessive current does not flow to each transistor. In addition, as shown in FIG. 4, the drain current of the second high-side transistor Q3 is switched on / off only during the soft start period (in FIG. 4, the period from the start to the soft start end time). And after the soft start end time (predetermined time after activation), it is turned off.

  Here, the role of the soft start block S / S 105 will be briefly described. In the case where the soft start block S / S105 is not provided, when a voltage is supplied to the control circuit IC10 after startup, the PWM circuit 101 starts operation and the output voltage V2 is lower than a predetermined voltage. Operates so as to turn on the first high-side transistor Q1 and the second high-side transistor Q3 for a long time, and an excessive current flows in the first high-side transistor Q1 and the second high-side transistor Q3. This increases the burden on the components of the DC-DC converter. Therefore, the soft start block S / S 105 generates a predetermined time-series pulse and forcibly performs a soft start that gradually raises the output voltage V2, thereby overloading the components of the DC-DC converter. It does not occur.

  As described above, since the second high-side transistor Q3 is turned off after the soft-start end time, power loss generated in the second high-side transistor Q3 can be reduced, so that the second high-side transistor Q3 can reduce the component cost by using a smaller element than the first high-side transistor Q1. Furthermore, by incorporating the second high-side transistor Q3 in the control circuit IC11, the number of parts can be further reduced.

  Further, as shown in FIG. 4, the signal H1-Drive is a signal having a polarity different from that of the signal H2-Drive except during the soft start period except immediately after the start, but during the soft start period, The signal H1-Drive may be set to a low level so that a current flows only through the second high-side transistor Q3.

  In the description of the above-described embodiment, the case where all of the first high-side transistor Q1, the second high-side transistor Q3, and the low-side transistor Q2 are configured by MOSFETs has been described. However, the first high-side transistor Q1 In the case where all or at least one of the second high-side transistor Q3 and the low-side transistor Q2 is a bipolar transistor, that is, the N-channel MOSFET is an NPN transistor and the P-channel MOSFET is a PNP transistor. Even in the case of replacement, the same effect can be obtained by operating in the same manner as the above-described embodiment. That is, even when the first high-side transistor Q1 is replaced with a bipolar transistor, in order to ensure sufficient conduction between the collector and emitter of the bipolar transistor, the same as when a voltage is supplied to the gate drive circuit of the MOSFET. In addition, the voltage obtained by the bootstrap circuit is applied between the base and the emitter to sufficiently saturate the NPN transistor and turn it on, so that the bootstrap circuit also works effectively. is there.

  In the above-described embodiment, the case where the input voltage and the output voltage supplied to the load are positive (plus) voltage has been described. However, the input voltage source voltage is negative, and the first high side A P-channel FET or PNP transistor is used as the transistor and the low-side transistor, an N-channel FET or NPN transistor is used as the second high-side transistor, and the bootstrap circuit of the control circuit IC generates a negative voltage. Even when the supplied voltage is a negative (minus) voltage, the same operation and effect can be obtained. In this case, the step-down DC-DC converter means that the negative voltage is converted into a negative voltage having a smaller absolute value.

1 shows a step-down DC-DC converter according to an embodiment. Each of the signal H1-Drive, the signal L-Drive, and the signal H2-Drive is illustrated. It is a figure which shows another embodiment. It is a figure which shows each part waveform at the time of starting of the circuit shown in FIG. It is a figure which shows the general structural example of a step-down DC-DC converter circuit. It is a figure which shows the signal of each part at the time of starting of the DC-DC converter of FIG. It is a figure explaining the phenomenon at the time of starting of the circuit shown in FIG. It is a figure which shows the phenomenon at the time of starting of the circuit shown in FIG. 5 with reference to the voltage waveform between the drain and source | sauce of a low side transistor. This is a circuit for preventing the occurrence of a surge voltage of the low-side transistor.

Explanation of symbols

  10, 11, 20 Control circuit IC, 30 Discharge circuit, 100 Input voltage source, 101 PWM circuit, 102, 103, 104 Drive circuit, 301, 302 Transistor, 303 Zener diode, 304 Resistor C Output smoothing capacitor, Cboot Bootstrap capacitor , D drain, Db bootstrap diode, G gate, L inductor, Q1, Q3 high side transistor, Q2 low side transistor, S source, 105 soft start block S / S

Claims (4)

In order to obtain a predetermined output voltage, a high-side transistor whose on / off is controlled by its control terminal, and on / off by its control terminal in synchronization with the on / off operation of the high-side transistor. A DC-DC converter comprising a low-side transistor that is controlled and functions as a synchronous rectifier, and a control circuit that controls the high-side transistor and the low-side transistor, and that steps down an input voltage from an input voltage source,
The high side transistor is
A first high-side transistor having a first control terminal and a second high-side transistor having a polarity opposite to that of the first high-side transistor and having a second control terminal are connected in parallel. And
The control circuit includes:
A bootstrap circuit for obtaining a voltage higher than the input voltage;
A first drive circuit that is supplied with a voltage higher than the input voltage from the bootstrap circuit and supplies a first control signal to the first control terminal;
A second drive circuit for supplying a second control signal to the second control terminal;
A third drive circuit for supplying a third control signal to a third control terminal of the low-side transistor,
At start-up, which is the time to start supplying power from the input voltage source,
Turning off the first high-side transistor, turning on the second high-side transistor, and turning off the low-side transistor;
A DC-DC converter characterized by supplying the first control signal, the second control signal, and the third control signal.   2. The DC-DC converter according to claim 1, wherein a ratio of a time during which the second high-side transistor is turned on is increased as time elapses.   2. The DC-DC converter according to claim 1, wherein the second high-side transistor is turned off after a predetermined time after starting. Both the input voltage and the output voltage are positive voltages,
The first high-side transistor and the low-side transistor are N-channel MOSFETs or NPN transistors;
2. The DC-DC converter according to claim 1, wherein the low-side transistor is a P-channel MOSFET or a PNP transistor.

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