JP2016059089A - Power conversion apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make, when necessary, gate resistance be variable to improve efficiency of a power conversion apparatus and improve performance of the power conversion apparatus.SOLUTION: A power conversion apparatus comprises: a semiconductor device including a plurality of power semiconductor elements constituting an inverter circuit for converting DC voltage to AC voltage; a voltage smoothing capacitor for smoothing voltage applied to the semiconductor device; a driver circuit for driving the power semiconductor elements; a current sensor for detecting AC current output from the semiconductor device; and a voltage sensor for measuring voltage applied to the voltage smoothing capacitor. The driver circuit selects switching speed of the power semiconductor elements on the basis of a result obtained by comparing a value calculated using a value of the DC voltage sensor and a value of the current sensor with a predetermined threshold.SELECTED DRAWING: Figure 6

Description

  The present invention relates to a power conversion device, and more particularly to a power conversion device used in a vehicle.

  FIG. 1 shows a configuration of a power conversion device for driving a motor, which is an example of a power conversion device. Reference numeral 900 denotes a motor, 200 denotes a power converter used for driving the motor, 901 denotes a high voltage battery, and 902 denotes a contactor for controlling connection between the inverter device and the battery 16.

  In the power conversion device 200, a host controller (not shown) gives a command for driving a motor such as a torque and a rotation command to the controller 100a, and the controller 100a gives a PWM signal corresponding to the command to the driver circuit 100b. The driver circuit 100b performs switching control of the power semiconductor device 300 in accordance with the PWM signal, and converts a DC voltage (DC voltage) from the high voltage battery 901 into an AC voltage (AC voltage) for driving the motor 900. It has a function.

  Here, reference numeral 500 denotes a voltage smoothing capacitor that smoothes the applied voltage that fluctuates during power conversion. Reference numeral 20 denotes a current sensor. In the case of the power conversion device 200 for driving a motor, in order to control the torque of the motor 900, the current between the output terminal of the semiconductor device 300 and the output terminal of the power conversion device 200 is controlled in order to control the motor current proportional to the torque. The sensor 20 is mounted and current feedback control is performed.

  Next, details of switching of the semiconductor device 300 will be described with reference to FIGS.

  FIG. 2 is a diagram illustrating a power semiconductor having a Harbridge connection configuration for one phase in the inverter device. In FIG. 2, TP1 is an upper arm power semiconductor element, DP1 is an upper arm diode connected in parallel with the upper arm power semiconductor element TP1, TN1 is a lower arm power semiconductor element, and DN1 is a lower arm diode. .

  An output terminal is provided between the upper arm power semiconductor element TP1 and the lower arm power semiconductor element TN1, and is connected to the motor 900. Lp, Ln are wiring inductances from the voltage smoothing capacitor 500 to the semiconductor device 300, and Lm 1, Lm 2, Lm 3, Lm 4 are inductance components in the semiconductor device 300. When a current change occurs in the semiconductor device 300, the wiring inductance and the inductance component generate a voltage in a direction that hinders the direction of the current, and is applied to the upper arm power semiconductor element TP1 and the lower arm power semiconductor element TN1. These inductances are designed to be as low as possible.

  Next, an off operation at the time of switching of the upper arm power semiconductor element TP1 or the lower arm power semiconductor element TN1 will be described with reference to FIG. An IGBT is used as an example of the upper arm power semiconductor element TP1 or the lower arm power semiconductor element TN1.

  Vge is an IGBT gate-emitter voltage (hereinafter referred to as gate voltage), Ic is a collector current, and Vce is a collector-emitter voltage. When an off signal is input to the driver circuit 100b from the controller 100a shown in FIG. 1, the driver circuit 100b enters an operation of turning off the gate of the IGBT. When the gate voltage decreases, Vce increases. When the voltage increases to the voltage HVDC applied to the voltage smoothing capacitor 500 (see FIG. 2), the collector current Ic starts to decrease. At that time, a surge voltage is generated in proportion to the decreasing rate of the collector current Ic, and this surge voltage is applied to the IGBT.

  Since the surge voltage is also affected by the inductance component of the main circuit as described above, it is obtained by dVs = L x dIc / dt.

  Here, since the turn-off surge voltage dVs normally generated in the IGBT tends to increase as the current increases, it can be easily obtained from dVs = Ax (Ic). Therefore, the peak voltage applied to the IGBT can be obtained by (Equation 1).

(Equation 1) Vcep = HVDC + dVs = HVDC + A1 × (Ic)
When the DC voltage HVDC is high and the output current Ic is large, the surge voltage applied to the IGBT is also high.

  More specifically, in a specific event, when the contactor 902 is opened at the time of motor regeneration and the internal voltage of the power converter 200 becomes high, or because the phase of the motor 900 is short-circuited, the output current increases more rapidly than the normal control current. In such a case, the peak voltage applied to the IGBT becomes high, which may exceed the breakdown voltage of the IGBT.

  For such problems, an overvoltage detection circuit is provided to stop the switching operation of the semiconductor device when the voltage HVDC inside the power conversion device becomes high, or a predetermined current value is monitored by monitoring the output of the current sensor. There is a method of detecting the above and stopping the switching operation.

  But with these methods. When the voltage or current reaches a predetermined level, the power converter is stopped, so it stops due to sensor noise, etc., so that the robustness is low and the safety of the power converter is considered. When the value is lowered, the normal operating conditions are narrowed, and there is a problem that the performance of the power converter cannot be sufficiently exhibited.

  Therefore, in Patent Document 1 (Japanese Patent Laid-Open No. 2009-232529), the output current of the power conversion device is monitored, and when the output current is high, a gate resistance switching signal is transmitted from the controller side to the gate drive circuit, A method has been proposed in which the surge voltage is reduced by changing the gate resistance to reduce the switching speed, and the inverter is energized without stopping even when the current value is high.

JP 2009-232529 A

  However, in the method of Patent Document 1, when the current value exceeds a predetermined value, the gate resistance is varied to reduce the switching speed. For example, even if the voltage HVDC is low and the output current value is large, it is applied to the power semiconductor element. Even in a state where the peak voltage is low and there is no particular problem with the withstand voltage, the gate resistance is varied to lower the switching speed.

  Therefore, there is a problem that the loss of the power semiconductor element increases, the efficiency of the entire inverter is lowered, and the performance of the power conversion device cannot be fully exhibited.

  An object of the present invention is to solve the above-mentioned problems and to increase the efficiency of the power conversion device and to improve the performance of the power conversion device by changing the gate resistance when necessary.

  In order to solve the above problems, a power conversion device according to the present invention includes a semiconductor device having a plurality of power semiconductor elements constituting an inverter circuit that converts a DC voltage into an AC voltage, and a voltage applied to the semiconductor device. Voltage smoothing capacitor for smoothing, driver circuit for driving the power semiconductor element, current sensor for detecting an alternating current output from the semiconductor device, and voltage sensor for measuring a voltage applied to the voltage smoothing capacitor And the driver circuit selects a switching speed of the power semiconductor element based on a result of comparing a value calculated using the value of the DC voltage sensor and the value of the current sensor with a predetermined threshold value. .

  According to the present invention, since the switching speed can be varied under the condition that the surge voltage is truly increased, a larger output current can be applied with a higher input voltage, and the performance of the power conversion device is sufficient. It becomes possible to put out.

It is a block diagram of the system for motor drive. It is a circuit diagram explaining the main circuit and wiring inductance for 1 phase. It is a figure explaining the surge voltage which generate | occur | produces at the time of switching off. It is a circuit block diagram explaining the invention which concerns on Example 1 of this invention. It is a flowchart explaining the function which concerns on Example 1 of this invention. It is a timing chart figure explaining the function concerning Example 1 of the present invention. It is a figure explaining the effect of the function which concerns on Example 1 of this invention. It is a circuit diagram explaining the invention which concerns on Example 2 of this invention. It is a timing chart figure explaining the invention which concerns on Example 2 of this invention. It is a circuit diagram explaining the invention which concerns on Example 3 of this invention. It is a timing chart figure explaining the invention which concerns on Example 3 of this invention.

  Next, a power converter according to an embodiment of the present invention will be described in detail with reference to the drawings.

  FIG. 4 is a circuit block diagram showing Embodiment 1 of the present invention.

  In FIG. 4, reference numeral 10 denotes a DC voltage sensor that measures a DC input voltage applied to the voltage smoothing capacitor 500 inside the power converter 200, measures the value of the voltage HVDC, and outputs a voltage of V-hvdc.

  Reference numeral 20 denotes a current sensor that measures the output current of the power converter 200, measures the value of the output current Io, and outputs a voltage of V-io. Reference numeral 30 denotes a switching speed selection unit that selects a switching speed when switching the power semiconductor element based on the values of the voltage sensor 10 and the current sensor 20, and is performed by software processing in the microcomputer in this embodiment.

  Reference numeral 40 denotes an isolator that insulates an input signal from an output signal, and uses a photocoupler, a transformer, or the like. Reference numeral 50 denotes a driver circuit for driving the power semiconductor element in accordance with a drive signal command from the controller 100a as shown in FIG. 1 (corresponding to the drive circuit 100b in FIG. 1).

  Reference numeral 60 denotes a switching speed changing unit that is mounted in the driver circuit 50 and receives a switching speed switching signal from the switching speed selecting unit 30 and performs a process for changing the switching speed. TR3 is an on-buffer FET, Ron is an on-gate resistor, TR1 and TR2 are off-buffer FETs, and Roff1 and Roff2 are off-gate resistors.

  TP1 is an upper arm power semiconductor element for one arm out of the six arms constituting the three-phase inverter circuit, and DP1 is an upper arm diode requiring reflux that is connected in parallel with the upper arm power semiconductor element TP1.

  Normally, the switching speed changing unit 60 drives both TR1 and TR2 at the time of turn-off, but when a switching signal is received from the switching speed selection unit 30, either the TR1 or TR2 FET is always turned off. Thus, the gate-off resistance is equivalently increased, and the switching speed at the turn-off is lowered.

  Next, processing in the switching speed selection unit 30 will be described using the follow chart of FIG.

  First, the output voltage V-hvdc of the voltage sensor 10 is read by an A / D converter and converted into internal data HVDC '(S100). Next, the output voltage V-io of the current sensor 20 is read and converted into internal data Io '(S101). Next, Io 'is multiplied by a predetermined value A1 and added to HVDC' to obtain a peak voltage value Vcep 'of TP1 (S102).

  Next, it is confirmed whether or not the peak voltage value Vcep 'exceeds a predetermined voltage Vth, and if it exceeds, a signal for reducing the switching speed is transmitted to the switching speed changing unit 60 (S103).

  Here, A1xIo ′ is a value that correlates with the surge voltage as described above, and since the normal surge voltage Vs and Io do not have a simple proportional relationship, a formula with Io ′ as a variable, or Io ′ Is obtained by referring to a map having as a variable.

  The threshold voltage Vth is set to a voltage that correlates with the breakdown voltage of the power semiconductor element or a value lower than that.

  The polarity of Io ′ is positive in the direction in which a current is passed through the arm. For example, in the case of the switching speed selection unit 30 for the upper arm, when the current flows through the upper arm power semiconductor element TP1, the level is set to the + side. In the case of the switching speed selection unit 30 for the lower arm, the current sensor output V-io is converted to Io ′ so that it becomes a positive side level when a current flows through the lower arm power semiconductor element TN1.

  Next, changes in internal data in the switching speed selection unit 30 during inverter operation will be described with reference to FIG. In FIG. 6, the horizontal axis represents time, and the vertical axis represents the value of internal data in the switching speed unit 30.

  A section t1a indicates a normal operation section. In the section t1a, since the voltage HVDC and the output current Io are in the normal operation range, HVDC ′ and A1xIo ′ are also equal to or lower than Vth, and the switching speed selection unit 30 selects the normal operation.

  Next, the section t2a is a current increase section. When the period t2a is entered, Io increases and reaches the maximum current level at the normal time. However, since the voltage HVDC remains low, the value of Vcep ′ is equal to or lower than Vth, and the switching speed selection unit 30 selects the normal operation. Yes.

  Next, a section t3a is a current and voltage increase section. When the period t3a is entered, the voltage HVDC rises as the voltage HVDC rises, and Vcep '= HVDC' + A1 × Io 'exceeds the threshold value Vth. Therefore, the switching speed selector 30 changes the output Vsel to change the switching speed. The change unit 60 is instructed to change the switching speed to the high resistance side. When Vcep ′ falls below the threshold value Vth, the switching speed selection unit 30 again selects the normal switching speed.

    Next, the effect of Example 1 is demonstrated using FIG. In FIG. 7, the diagram on the left side shows the internal data before the switching speed change and the Vce actual waveform at the time of turn-off, and the diagram on the right side shows the internal data after the change of the switching speed and the Vce actual waveform at the time of turn-off.

  First, since the voltages HVDC and Io are low and Vcep ′ is equal to or lower than the threshold value Vth, the switching speed is a normal state before the switching speed is changed.

  Next, in the figure on the right, both voltages HVDC and Io rise, and Vcep ′ exceeds the threshold value Vth, so that the switching speed is changed to the low speed side, and the actual peak value of Vce is less than the breakdown voltage of the power semiconductor element. It can be in a possible state.

  As described above, the voltage HVDC and the output current Io are measured, both values are calculated in the switching speed selection unit 30, and compared with the threshold value Vth of the internal data correlated with the voltage tolerance of the power semiconductor element, and the switching speed is switched. Thus, when the voltage HVDC is low and only Io is large, the peak voltage of Vce is low, so that normal operation can be continued. Only when both of the voltages HVDC and Io exceed the normal level, the switching speed selector 30 issues a command to the switching speed changer 60 in a direction to decrease the switching speed, so that the surge voltage is truly increased. Since the switching speed can be varied only under the conditions, a larger output current can be supplied with a higher input voltage, and the performance of the power conversion device can be sufficiently exerted.

Next, Embodiment 2 according to the present invention will be described with reference to FIG.
FIG. 8 is a circuit diagram showing the configuration of the switching selection means in the second embodiment. In FIG.
V-hvdc is the output voltage of the voltage sensor 10. V-io is an output voltage of the current sensor 20 and has a value that is ½ of the power supply voltage Vcc used for the current sensor 20. The power supply voltage Vcc is the voltage of the high voltage battery 901. V-io outputs an output having an amplitude proportional to the output current centered on Vcc / 2. Further, it is set so that when a current flows through the upper arm power semiconductor element TP1, it becomes a level on the + side of Vcc / 2.

  OP1 is an inverting differential amplifier having a predetermined gain B1 in which V-hvdc is input to the negative phase input and a predetermined voltage value V1 is input to the positive phase input. As the predetermined voltage value V1, the output value of the DC voltage sensor when the maximum current can be normally applied is used. The predetermined gain B1 is such that the output of the differential amplifier OP1 is when the peak voltage applied to the upper arm power semiconductor element TP1 when the maximum current is applied is a DC voltage at a level exceeding the withstand voltage of the upper arm power semiconductor element TP1. The output value of the current sensor 20 is set to be equal to or lower.

  OP2 is an inverting differential amplifier in which V-io is input to the negative phase input and a value output from the current sensor 20 when the output current is zero amperes is input to the positive phase input. It is provided to invert the output around Vcc / 2 so that the output of the current sensor 20 becomes a positive side output from Vcc / 2 when the lower arm is energized.

  CP1 is a comparator that inputs the output value of the differential amplifier OP1 to the negative phase input and V-io to the positive phase input. The output is connected to the switching speed changing unit 60 of the upper arm via the isolator 40. The

  CP2 is a comparator that inputs the output value of the differential amplifier OP1 to the negative phase input and the output of the differential amplifier OP2 to the positive phase input. The output is supplied to the switching speed changing unit 60 of the lower arm via the isolator 40. Connected.

  Next, the operation of the switching selection unit according to the second embodiment will be described with reference to FIG. FIG. 9 is a diagram showing the operation of the switching selection means for the upper arm. The horizontal axis is time, and the vertical axis is the voltage of each part of the circuit.

  The section t1b is a normal operation section. In the section t1b, since the voltage HVDC is in the normal operation range, the output voltage V-hvdc of the voltage sensor 10 is also in the normal range V1. Therefore, the output voltage Vth1 of the differential amplifier OP1 is a value equal to or higher than V1. V1 is set higher than the value of V-io in the normal state because the output value of the voltage sensor 10 when the maximum current can be supplied in the normal state is used. Therefore, the switching speed selection unit 60 maintains a normal state.

  Next, a section t2b is a current increase section. When the section t2b is entered, the output current increases. However, since the voltage is at a normal level with direct current, the switching speed selector 60 maintains the normal state without exceeding Vth1.

  Next, a section t3b is an increasing section of current and voltage. In interval t3b, when the voltage HVDC rises and V-hvdc exceeds V1 and becomes V1OV, the differential amplifier OP1 is an inverting feedback amplifier, so the output voltage Vth1 of the differential amplifier OP1 is lower than V1, V1-B1x (V1-V1Vth). Then, since the voltage value V-io of the current sensor 20 exceeds Vth1, the output of the comparator CP1 is inverted, and the switching speed selection unit 60 changes the output signal in the direction of decreasing the switching speed.

  The operation of the switching speed selection unit 60 of the upper arm has been described above. In the case of the lower arm, the differential amplifier OP2 is prepared so that the polarity of the current sensor output V-io becomes + when the lower arm is energized. The other features are the same as those described in FIG. A comparator with hysteresis may be used as the comparator CP1 or the comparator CP2.

  According to the configuration of the second embodiment, the voltage HVDC and the output current Io are measured, and the switching speed is switched by the high-speed switching speed selection unit 30 using an analog circuit, so that the voltage HVDC is low and only Io is large. In this case, since the peak voltage of Vce is low, normal operation is continued. Only when both the voltages HVDC and Io are higher than the normal level, the switching speed selection unit 30 issues a command to the switching speed changing unit 60 in a direction to lower the switching speed. Therefore, the switching speed can be varied only, so that a larger output current can be supplied with a higher input voltage, and the performance of the power conversion device can be sufficiently exerted.

  Next, Embodiment 3 according to the present invention will be described with reference to FIG. FIG. 10 is a circuit diagram illustrating a configuration of a switching selection unit according to the third embodiment.

  In FIG. 10, V-hvdc is the output voltage of the voltage sensor 10. V-io is an output voltage of the current sensor 20 and outputs an output having a value half the power supply voltage Vcc used for the current sensor 20 and an amplitude proportional to the output current centered on Vcc / 2. Further, when the current flows through the upper arm power semiconductor element TP1, the level is set to the + side.

  CP10 is a comparator in which V-io is inputted to the positive phase input and a predetermined voltage value V2 is inputted to the negative phase input, and its output is connected to the switching speed changing unit 60 of the upper arm through the isolator 40. The Here, the predetermined voltage value 2 is set to a value higher than the value output by the current sensor 20 when the power conversion device 200 energizes the normal maximum current.

  OP11 is an inverting differential amplifier in which V-io is input to the negative phase input and the value output from the output current sensor when the output current is zero ampere is input to the positive phase input. It is prepared to invert the output around Vcc / 2 so that the output of 20 becomes a + side output from Vcc / 2.

  CP11 is a comparator in which the output of OP11 is input to the positive phase input and the predetermined voltage V2 is input to the negative phase input, and is connected to the switching speed changing unit 60 of the lower arm through the isolator 40. CP12 is a comparator that inputs V-hvdc to the negative phase input and a predetermined voltage V3 to the positive phase input. The predetermined voltage 3 has a peak voltage applied to the power semiconductor element at the time of the overcurrent. The DC voltage sensor value when exceeding the value is set.

  TR10 is an FET having the gate connected to the output of CP12 and the drain terminal connected to the outputs of CP10 and CP11.

  Next, the operation of the switching selection unit according to the third embodiment will be described with reference to FIG. FIG. 11 is a diagram showing the operation of the switching selection means for the upper arm. The horizontal axis is time, and the vertical axis is the voltage of each part of the circuit.

  The section t1c is a normal operation section. Since the voltage HVDC is within the normal operating range, the output voltage V-hvdc of the voltage sensor 10 is also within the normal range V3. The output of the comparator CP10 becomes L level, and the switching speed selection unit 60 maintains the normal operation state.

  A section t2c is a current increase section. When entering the section t2c, the output current increases, the output of V-io exceeds the threshold value V2, and the output of CP10 tends to be inverted to the + side. However, since the DC voltage is low and V-hvdc remains at V3 or lower, CP12 outputs H level, TR10 is kept on, and the switching speed selector 60 maintains the normal operation state.

  A section t3c is a current and voltage increase section. In interval t3c, when voltage HVDC rises and V-hvdc exceeds V3, the output of CP12 is inverted to L level and TR10 is turned off. Then, the output of the CP 10 that has been lowered to the L level changes to the H side so far, and the switching speed selection unit 60 changes in a direction to decrease the switching speed.

  According to the configuration of the third embodiment described above, when the voltage HVDC and the output current Io are measured and the switching speed is switched by a high-speed switching selection unit using an analog circuit, the voltage HVDC is low and only Io is large. Since the peak voltage of Vce is low, normal operation is continued. Only when both the voltages HVDC and Io are higher than the normal level, the switching speed selection unit 30 issues a command to the switching speed changing unit 60 in a direction to lower the switching speed. Therefore, the switching speed can be varied only, so that a larger output current can be applied with a higher input voltage, and the performance of the power conversion device 200 can be sufficiently achieved.

  The configuration and operation of the first to third embodiments have been described above. In the first embodiment, the process of FIG. 5 is an example of a means for realizing the operation of FIG. There is no problem even if this processing method is used.

  In the second embodiment, the circuit in FIG. 8 is an example of a means for realizing the operation in FIG. 9, and there is no problem even if another circuit configuration is used as long as the operation in FIG. 9 can be realized.

  In the third embodiment, the circuit of FIG. 10 is an example of a means for realizing the operation of FIG. 11. If the operation of FIG. 11 can be realized, there is no problem even if another circuit configuration is used.

  Further, in Examples 1 to 3, the voltage sensor 10 corresponds to the voltage sensor 10 by measuring and calculating the voltage between P and the output terminal in the case of the upper arm, and the output terminal to the N side voltage in the case of the lower arm. It may be used as information.

  Further, as the current sensor 20, a power semiconductor element with an emitter sense having a terminal for shunting and outputting a part of the current flowing through the power semiconductor element is measured and calculated by the sense resistor Rs. A means used as information corresponding to the sensor 20 may be used.

  It can also be used for power converters used in vehicles, industrial power converters, and the like.

DESCRIPTION OF SYMBOLS 10 ... Voltage sensor, 20 ... Current sensor, 30 ... Switching speed selection part, 40 ... Isolator, 50 ... Driver circuit, 60 ... Switching speed change part, 100a ... Controller, 100b ... Driver circuit, 200 ... Power converter, 300 ... Semiconductor device, 500 ... voltage smoothing capacitor, 900 ... motor, 901 ... high voltage battery, 902 ... contactor, C1 ... voltage smoothing capacitor, HVDC ... high voltage power supply voltage, DP1 ... upper arm diode, DN1 ... lower arm diode, Lp ... Wiring inductance, Ln ... Wiring inductance, Lm1 ... Inductance component, Lm2 ... Inductance component, Lm3 ... Inductance component, Lm4 ... Inductance component, OP1 ... Differential amplifier, OP2 ... Differential amplifier, OP11 ... Differential amplifier, CP1 ... Comparator , CP2 ... comparator, P10 ... comparator, CP11 ... comparator, TR1 ... off buffer FET, TR2 ... off buffer FET, TR3 ... on buffer FET, TP1 ... upper arm power semiconductor element, TN1 ... lower arm power semiconductor element, Ron ... on Gate resistance, Roff1 ... off gate resistance, Roff2 ... off gate resistance

Claims (7)

A semiconductor device having a plurality of power semiconductor elements constituting an inverter circuit for converting a DC voltage into an AC voltage;
A voltage smoothing capacitor for smoothing a voltage applied to the semiconductor device;
A driver circuit for driving the power semiconductor element;
A current sensor for detecting an alternating current output from the semiconductor device;
A voltage sensor for measuring a voltage applied to the voltage smoothing capacitor,
The power conversion device, wherein the driver circuit selects a switching speed of the power semiconductor element based on a result of comparing a value calculated using the value of the DC voltage sensor and the value of the current sensor with a predetermined threshold. The power conversion device according to claim 1,
A controller for transmitting a signal to the driver circuit and controlling the power semiconductor element;
The controller adds a value obtained by multiplying the value of the voltage sensor by a predetermined value to a value obtained by multiplying the value of the current sensor by a predetermined coefficient, and when the added value exceeds the threshold, the power The power converter device which has a switching speed selection part which outputs the command which reduces the switching speed of a semiconductor element. The power conversion device according to claim 2,
The predetermined coefficient multiplied by the value of the current sensor is a value corresponding to a surge voltage in which the multiplication result is in the same voltage range as the value of the voltage sensor, and the added value is applied to the power semiconductor element. The power conversion device is applied with a value corresponding to a peak voltage, and the threshold value is a value corresponding to a withstand voltage of the power semiconductor element. The power conversion device according to claim 1,
The driver circuit is
A first inverting feedback amplifier in which a predetermined first voltage value is input to a positive phase input and an output voltage value of the voltage sensor is input to a negative phase input, and a predetermined gain is set;
A first comparator having the output of the first inverting feedback amplifier as a negative phase input and the output value of the output current sensor as a positive phase input;
A second inverting feedback amplifier for inverting and inputting the output value of the current sensor and having an output voltage value when the current of the current sensor is zero as a positive phase input;
A second comparator having an output of the first inverting feedback amplifier as a negative phase input and an output of the second inverting feedback amplifier as a positive phase input;
Further, the driver circuit selects a switching speed of the power semiconductor element based on the results of the first comparator and the second comparator. The power conversion device according to claim 4,
The predetermined first voltage value is set to the same level as the output value of the voltage sensor when the power conversion device is capable of energizing a maximum current during normal time,
The predetermined gain is such that when the peak voltage applied to the power semiconductor element at the time of maximum current application is a DC voltage at a level exceeding the withstand voltage of the power semiconductor element, the output of the first inverting feedback amplifier is: The power converter set so that it may become below the output value of the said current sensor. The power conversion device according to claim 1,
The driver circuit is
A first comparator that inputs an output value of the current sensor to a positive phase input and a predetermined first voltage value to a negative phase input;
An inverting amplifier that inputs an output voltage value when the current of the current sensor is zero to a positive phase input and an output value of the current sensor to a negative phase input;
A second comparator that inputs the output of the inverting amplifier to a positive phase input and inputs the predetermined first voltage value to a negative phase input;
A third comparator for inputting the output value of the voltage sensor to a positive phase input and having a predetermined second voltage value for a negative phase input;
FET having the output of the comparator 3 as a gate input;
A power converter for connecting a drain terminal of the FET to outputs of the first comparator and the second comparator. The power conversion device according to claim 6, wherein
The predetermined first voltage is set to a current output level that cannot be energized when the DC voltage is high,
The power conversion device, wherein the predetermined second voltage is set to a value lower than an output value of the voltage sensor in which a voltage applied to the power semiconductor element exceeds a tolerance when the current is out of the normal maximum current.