JP2015228078A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2015228078A5 JP2015228078A5 JP2014112746A JP2014112746A JP2015228078A5 JP 2015228078 A5 JP2015228078 A5 JP 2015228078A5 JP 2014112746 A JP2014112746 A JP 2014112746A JP 2014112746 A JP2014112746 A JP 2014112746A JP 2015228078 A5 JP2015228078 A5 JP 2015228078A5
- Authority
- JP
- Japan
- Prior art keywords
- die
- specified
- power supply
- terminal
- processing apparatus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims 17
- 230000010365 information processing Effects 0.000 claims 17
- 238000011156 evaluation Methods 0.000 claims 13
- 238000000034 method Methods 0.000 claims 2
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014112746A JP6433159B2 (ja) | 2014-05-30 | 2014-05-30 | 情報処理装置、方法及びプログラム |
| US14/722,549 US10339257B2 (en) | 2014-05-30 | 2015-05-27 | Information processing apparatus, method, and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014112746A JP6433159B2 (ja) | 2014-05-30 | 2014-05-30 | 情報処理装置、方法及びプログラム |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2015228078A JP2015228078A (ja) | 2015-12-17 |
| JP2015228078A5 true JP2015228078A5 (enExample) | 2017-06-29 |
| JP6433159B2 JP6433159B2 (ja) | 2018-12-05 |
Family
ID=54702084
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2014112746A Active JP6433159B2 (ja) | 2014-05-30 | 2014-05-30 | 情報処理装置、方法及びプログラム |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US10339257B2 (enExample) |
| JP (1) | JP6433159B2 (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6645114B2 (ja) * | 2015-10-16 | 2020-02-12 | 富士通株式会社 | 設計支援プログラム、情報処理装置、および設計支援方法 |
| KR102116038B1 (ko) * | 2017-02-02 | 2020-05-27 | 주식회사 엘지화학 | 접지 커패시터 선정 장치 및 방법 |
| US10783307B1 (en) * | 2018-12-12 | 2020-09-22 | Cadence Design Systems, Inc. | System and method for power-grid aware simulation of an IC-package schematic |
| WO2023188051A1 (ja) | 2022-03-30 | 2023-10-05 | 三菱電機株式会社 | プリント基板の設計支援システム、設計支援方法、プログラム、及び記録媒体 |
| JPWO2024195666A1 (enExample) * | 2023-03-20 | 2024-09-26 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3183340B2 (ja) * | 1998-09-29 | 2001-07-09 | 日本電気株式会社 | パスコンの有効性チェック方法および装置 |
| US6405357B1 (en) * | 2000-05-02 | 2002-06-11 | Advanced Semiconductor Engineering, Inc. | Method for positioning bond pads in a semiconductor die |
| JP2002016337A (ja) | 2000-06-29 | 2002-01-18 | Sony Corp | プリント基板の配線構造チェックシステム |
| JP4612543B2 (ja) * | 2003-06-16 | 2011-01-12 | 日本電気株式会社 | プリント回路配線基板設計支援装置及びプリント回路基板設計方法並びにそのプログラム |
| US7464348B1 (en) * | 2005-09-30 | 2008-12-09 | Cadence Design Systems, Inc. | Method and system for mapping source elements to destination elements as interconnect routing assignments |
| JP5253244B2 (ja) * | 2009-03-12 | 2013-07-31 | キヤノン株式会社 | プリント基板設計支援プログラム、方法及び装置 |
-
2014
- 2014-05-30 JP JP2014112746A patent/JP6433159B2/ja active Active
-
2015
- 2015-05-27 US US14/722,549 patent/US10339257B2/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2015228078A5 (enExample) | ||
| JP2013198262A5 (enExample) | ||
| EP3675316A4 (en) | CHARGE CONTROL PROCESS AND APPARATUS, ELECTRONIC DEVICE AND COMPUTER READABLE INFORMATION MEDIA | |
| BR112016005614A8 (pt) | chip de monitoramento de unidade substituível de cliente(crum), dispositivo de formação de imagem, método de verificação de unidade de consumível de um dispositivo de formação de imagem, dispositivo de servidor, e método de comunicação de um chip de monitoramento de unidade substituível de cliente(crum) | |
| EP2753061A3 (en) | Method for obtaining image data and electronic device for processing method thereof | |
| MX2021006067A (es) | Conjunto de circuitos logicos. | |
| JP2013035539A5 (enExample) | ||
| WO2014122538A3 (en) | Apparatus for adjusting image capture settings | |
| SG11201701593XA (en) | A structure and implementation method for implementing an embedded serial data test loopback, residing directly under the device under test within a printed circuit board | |
| EP3674883A4 (en) | MULTIPLICATION CIRCUIT, CHIP SYSTEM AND ELECTRONIC DEVICE | |
| EP3787243A4 (en) | PROCESS AND APPARATUS FOR PROCESSING DATA PACKAGES, DATA MEDIA AND ELECTRONIC DEVICE | |
| JP2015513345A5 (enExample) | ||
| EP3617934A4 (en) | IMAGE RECOGNITION PROCESS AND DEVICE, ELECTRONIC APPARATUS AND COMPUTER READABLE INFORMATION MEDIA | |
| WO2018075388A3 (en) | ENHANCED LOGISTIC MANAGEMENT SYSTEM | |
| EP2773061A3 (en) | A method and an apparatus for deriving secret information from a series of response values and a method and an apparatus for providing helper data allowing to derive a secret information | |
| EP3761476A4 (en) | ELECTRONIC DEVICE CHARGING CIRCUIT AND METHOD, DEVICE AND STORAGE MEDIA | |
| JP2018089936A5 (enExample) | ||
| EP2804109A3 (en) | Computer system, server module, and storage module | |
| EP4600799A3 (en) | Information processing apparatus, information processing method, and program | |
| WO2013158788A3 (en) | Devices for indicating a physical layer error | |
| JP2015099999A5 (enExample) | ||
| TW201614254A (en) | Testing apparatus | |
| RU2014150690A (ru) | Устройство проверки маркировки, содержащее модуль детектирования и обработки для детектирования маркировки | |
| EP2749992A3 (en) | Information processing device, information processing method and computer program to determine a mood | |
| EP2618254A3 (en) | Random number generating device |