JP2015204451A - Multilayer ceramic capacitor and method of manufacturing the same and its mounting board - Google Patents

Multilayer ceramic capacitor and method of manufacturing the same and its mounting board Download PDF

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JP2015204451A
JP2015204451A JP2014127904A JP2014127904A JP2015204451A JP 2015204451 A JP2015204451 A JP 2015204451A JP 2014127904 A JP2014127904 A JP 2014127904A JP 2014127904 A JP2014127904 A JP 2014127904A JP 2015204451 A JP2015204451 A JP 2015204451A
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electrodes
ceramic
multilayer ceramic
mounting
ceramic capacitor
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パク・フン・キル
Heung Kil Park
パク・ミン・チョル
Mn-Chol Park
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サムソン エレクトロ−メカニックス カンパニーリミテッド.
Samsung Electro-Mechanics Co Ltd
サムソン エレクトロ−メカニックス カンパニーリミテッド.
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Priority to KR1020140044165A priority patent/KR20150118385A/en
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Abstract

PROBLEM TO BE SOLVED: To provide a multilayer ceramic capacitor in which acoustic noise can be reduced effectively.SOLUTION: A multilayer ceramic capacitor includes a ceramic body 110 where a plurality of dielectric layers are laminated in the thickness direction, a plurality of first and second internal electrodes 121, 122 arranged to be exposed alternately to both end faces of the ceramic body 110 via the dielectric layer, in the ceramic body 110, first and second outer electrodes 131, 132 formed to cover the opposite ends of the ceramic body 110, an insulating layer 140 formed on the peripheral surface of the ceramic body 110, and the peripheral surface of the first and second outer electrodes 131, 132, and first and second bump electrodes 151, 152 formed, respectively, on the mounting surface where the first and second outer electrodes 131, 132 are exposed.

Description

  The present invention relates to a multilayer ceramic capacitor, a manufacturing method thereof, and a mounting substrate thereof.

  Multi-layered ceramic capacitor (MLCC), which is one of multilayer chip electronic components, is used in various electronic devices due to its small size, high capacity, and easy mounting. be able to.

  For example, the multilayer ceramic capacitor includes a video device such as a liquid crystal display (LCD) and a plasma display panel (PDP), a computer, a personal digital assistant (PDA), and a personal digital assistant (PDA). It can be used as a chip-type capacitor that is mounted on a substrate of various electronic products such as a mobile phone and serves to charge or discharge electricity.

  Such a multilayer ceramic capacitor can have a structure in which a plurality of dielectric layers and internal electrodes having different polarities are alternately stacked between the dielectric layers.

  At this time, since the dielectric layer has piezoelectricity, when a DC or AC voltage is applied to the multilayer ceramic capacitor, a piezoelectric phenomenon occurs between the plurality of internal electrodes, and the volume of the ceramic body is increased according to the frequency. There is a possibility of generating periodic vibrations while expanding and contracting.

  Such vibration is transmitted to the substrate through the external electrode of the multilayer ceramic capacitor and the solder connecting the external electrode and the substrate, and the entire substrate becomes an acoustic reflection surface, and generates a vibration sound as noise.

  The vibration sound corresponds to an audible frequency in the range of 20 to 20,000 Hz that gives an unpleasant feeling to a person, and the vibrating sound that gives an unpleasant feeling to the person is referred to as acoustic noise.

  The solder for connecting the external electrode and the substrate is formed to be inclined at a certain height along the surface of the external electrode on both side surfaces or both end surfaces of the ceramic body.

  At this time, as the volume and height of the solder increase, vibrations of the multilayer ceramic capacitor are more easily transmitted to the substrate, and the magnitude of the generated acoustic noise is increased.

Korean Registered Patent No. 1058697

  In recent electronic devices, there is a possibility that acoustic noise generated from such a multilayer ceramic capacitor appears more remarkably as the noise of components decreases.

  In this technical field, a new method capable of effectively reducing the acoustic noise generated from the multilayer ceramic capacitor has been demanded.

  According to an aspect of the present invention, a ceramic body in which a plurality of dielectric layers are stacked in a thickness direction, and the ceramic body are alternately exposed at both end faces of the ceramic body through the dielectric layer. A plurality of arranged first and second internal electrodes, first and second external electrodes formed to cover both ends of the ceramic body, a peripheral surface of the ceramic body, and the first and second Provided is a multilayer ceramic capacitor including an insulating layer formed on a peripheral surface of an external electrode, and first and second bump electrodes formed on a mounting surface from which the first and second external electrodes are exposed. To do.

  Another aspect of the present invention includes a substrate having first and second electrode pads on an upper portion thereof, and a multilayer ceramic capacitor disposed on the substrate, wherein the multilayer ceramic capacitor has a plurality of dielectric layers having a thickness. A plurality of first and second internal electrodes disposed in the ceramic body in such a manner as to be alternately exposed at both end faces of the ceramic body through the dielectric layer in the ceramic body; First and second external electrodes formed to cover both ends of the main body, a peripheral surface of the ceramic main body, an insulating layer formed on the peripheral surfaces of the first and second external electrodes, and the first and second Provided is a multilayer ceramic capacitor mounting substrate including first and second bump electrodes formed on a mounting surface from which a second external electrode is exposed.

  In one aspect of the present invention, the first and second bump electrodes include first and second nickel (Ni) plating layers formed on mounting surfaces from which the first and second external electrodes are exposed, and the first and second bump electrodes, respectively. And first and second tin (Sn) plating layers formed on the first and second nickel plating layers, respectively.

  In one aspect of the present invention, the first and second bump electrodes include first and second copper (Cu) plating layers respectively formed on mounting surfaces from which the first and second external electrodes are exposed, and the first and second bump electrodes. First and second nickel (Ni) plating layers formed on the first and second copper plating layers, respectively, and first and second tin (Sn) formed on the first and second nickel plating layers, respectively. A plating layer.

  In one aspect of the present invention, the first and second bump electrodes may have a thickness of 50 μm or more.

  In one aspect of the present invention, the first and second external electrodes are formed on both end faces of the ceramic body, and are connected to the first and second internal electrodes, respectively. First and second terminal portions formed to extend from the first and second connection portions to a part of the mounting surface of the ceramic body, respectively, and the first and second bump electrodes are the first and second bump electrodes. Each may be formed on the first and second terminal portions.

  In some embodiments of the present invention, the insulating layer may be an epoxy resist.

  According to still another aspect of the present invention, a plurality of ceramic sheets on which first and second internal electrodes are respectively formed are alternately arranged so that the first and second internal electrodes are opposed to each other with the ceramic sheet interposed therebetween. And laminating and pressing to form a laminated body, and cutting and firing the laminated body into regions corresponding to one capacitor, and the first and second internal electrodes are alternately formed on both end faces of the ceramic body. Providing an exposed ceramic body; forming first and second external electrodes at both ends of the ceramic body so as to be electrically connected to the first and second internal electrodes; and Forming an insulating layer on the peripheral surface and the peripheral surfaces of the first and second external electrodes; and plating the mounting surface on which the first and second external electrodes are exposed to form the first and second bump electrodes. Forming stage and To provide a method of manufacturing a multilayer ceramic capacitor comprising a.

  In one aspect of the present invention, the first and second bump electrodes can be formed by electroplating nickel and electroplating tin on the mounting surface where the first and second external electrodes are exposed.

  In one aspect of the present invention, the first and second bump electrodes are formed by electroplating copper, electroplating nickel, and electroplating tin on the mounting surface where the first and second external electrodes are exposed. Can be formed.

  In one aspect of the present invention, the first and second bump electrodes can be formed with a thickness of 50 μm or more.

  In one aspect of the present invention, the insulating layer may be formed by applying and curing an insulating resin on the peripheral surface of the ceramic body and the peripheral surfaces of the first and second external electrodes.

  In some embodiments of the present invention, the insulating resin may be an epoxy resist.

  According to one aspect of the present invention, by forming a bump electrode on the mounting surface of the external electrode, the bump electrode absorbs vibration transmitted from the external electrode to the substrate when the multilayer ceramic capacitor is mounted on the substrate. Thus, there is an effect that acoustic noise can be reduced.

1 is a perspective view schematically illustrating a multilayer ceramic capacitor according to an embodiment of the present invention with a mounting surface facing upward. It is sectional drawing along the A-A 'line of FIG. It is the perspective view which showed the manufacturing method of the multilayer ceramic capacitor by one Embodiment of this invention in order. It is the perspective view which showed the manufacturing method of the multilayer ceramic capacitor by one Embodiment of this invention in order. It is the perspective view which showed the manufacturing method of the multilayer ceramic capacitor by one Embodiment of this invention in order. 1 is a cross-sectional side view schematically illustrating a multilayer ceramic capacitor mounting substrate according to an embodiment of the present invention;

  Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, the embodiments of the present invention can be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below. In addition, the embodiments of the present invention are provided to more fully explain the present invention to those skilled in the art. Accordingly, the shape and size of elements in the drawings may be exaggerated for a clearer description.

  FIG. 1 is a perspective view schematically illustrating a multilayer ceramic capacitor according to an embodiment of the present invention with a mounting surface facing upward, and FIG. 2 is a cross-sectional view taken along line AA ′ of FIG. is there.

  Referring to FIGS. 1 and 2, the multilayer ceramic capacitor 100 according to the present embodiment includes a ceramic body 110, a plurality of first and second internal electrodes 121 and 122, first and second external electrodes 131 and 132, The insulating layer 140 includes first and second bump electrodes 151 and 152.

  The ceramic body 110 is formed by laminating a plurality of dielectric layers 111 in the thickness direction and then firing.

  At this time, the ceramic body 110 can be integrated so that the boundary between the adjacent dielectric layers 111 cannot be confirmed.

  The ceramic body 110 may have a hexahedral shape, but the present invention is not limited to this.

  In the present embodiment, for convenience of explanation, in the ceramic body 110, the top and bottom surfaces in the thickness direction facing the top and bottom where the dielectric layer 111 is laminated are the top and bottom surfaces, of which the first and second bump electrodes 151 and 152 are formed. The mounting surfaces are connected to the upper and lower surfaces, the opposing lengthwise surfaces are defined as both end surfaces, and the widthwise surfaces facing each other while perpendicularly intersecting the both end surfaces are defined as both side surfaces.

  In addition, the ceramic body 110 is not particularly limited in its dimensions, but can be configured to have a size of, for example, 1.0 mm × 0.5 mm to form the high-capacity multilayer ceramic capacitor 100.

  In addition, cover layers 112 and 113 having a predetermined thickness may be formed on the upper and lower surfaces of the outermost surface of the ceramic body 110 as necessary.

  The thickness of one layer of the dielectric layer 111 can be arbitrarily changed according to the capacity design of the multilayer ceramic capacitor 100, and the thickness of one layer of the dielectric layer 111 is about 1.0 μm after firing. However, the present invention is not limited to this.

The dielectric layer 111 can include a ceramic material having a high dielectric constant. For example, BaTiO 3 based ceramic powder can be included, but the present invention is not limited to this.

The BaTiO 3 -based ceramic powder is not limited thereto, but, for example, (Ba 1-x Ca x ) TiO 3 , Ba (Ti 1-y Ca y ) in which Ca, Zr, etc. are partly dissolved in BaTiO 3. O 3 , (Ba 1-x Ca x ) (Ti 1-y Zr y ) O 3, Ba (Ti 1-y Zr y ) O 3, or the like.

  In addition to the ceramic powder, a ceramic additive, an organic solvent, a plasticizer, a binder, a dispersant, and the like can be further added to the dielectric layer 111.

  As the ceramic additive, for example, transition metal oxides or carbides, rare earth elements, magnesium (Mg), aluminum (Al), or the like can be used.

  The first and second internal electrodes 121 and 122 are formed and stacked on the ceramic sheet forming the dielectric layer 111, and then alternately fired into the ceramic body 110 via the single dielectric layer 111 by firing. Be placed.

  The first and second internal electrodes 121 and 122 are a pair of electrodes having different polarities, and are disposed so as to face each other in the stacking direction of the dielectric layer 111, and the dielectric disposed therebetween. It can be electrically isolated by the layer 111.

  One end of each of the first and second internal electrodes 121 and 122 is exposed at both end faces of the ceramic body 110.

  As described above, the ends of the first and second internal electrodes 121 and 122 that are alternately exposed on both end faces of the ceramic body 110 are connected to the first and second external electrodes 131 and 132 on the both end faces of the ceramic body 110, respectively. And can be electrically connected.

  At this time, the first and second internal electrodes 121 and 122 are formed of a conductive metal, and for example, a material such as nickel (Ni) or an alloy of nickel (Ni) can be used. It is not limited.

  With the above configuration, when a predetermined voltage is applied to the first and second external electrodes 131 and 132, electric charges are accumulated between the first and second internal electrodes 121 and 122 facing each other.

  Here, the capacitance of the multilayer ceramic capacitor 100 is proportional to the areas of the first and second internal electrodes 121 and 122 that overlap in the stacking direction of the dielectric layer 111.

  The first and second external electrodes 131 and 132 are for external electrodes containing copper (Cu) in order to provide high reliability such as excellent heat cycle resistance and moisture resistance while having good electrical characteristics. Although the conductive paste can be formed by baking, the present invention is not limited to this.

  The first and second external electrodes 131 and 132 may include first and second connection portions 131a and 132a and first and second terminal portions 131b and 132b.

  The first and second connection portions 131a and 132a are respectively formed on both end surfaces of the ceramic body 110, and are connected to and electrically connected to the end portions where the first and second internal electrodes 121 and 122 are exposed.

  The first and second terminal portions 131b and 132b are formed to extend from the first and second connection portions 131a and 132a to a part of the mounting surface of the ceramic body 110, respectively.

  The first and second terminal portions 131b and 132b are external electrode mounting surfaces, and the first and second bump electrodes 151 and 152 are formed on the first and second terminal portions 131b and 132b.

  In addition, the first and second external electrodes 131 and 132 may be formed in a vertical direction by further forming terminal portions on the upper surface of the ceramic body 110 so as to face the first and second terminal portions 131b and 132b. A symmetrical chip can be constructed.

  As described above, if the terminal portion is configured in a vertically symmetrical structure on the upper and lower surfaces of the ceramic body 110, there is an advantage that when the multilayer ceramic capacitor 100 is mounted on a substrate or the like, the vertical direction need not be divided.

  Meanwhile, the insulating layer 140 may be made of a material such as a nonconductive insulating resin. For example, although it can consist of epoxy, a phenol type thermosetting resin, a polypropylene, an acrylic type thermoplastic resin, etc., this invention is not limited to this.

  When the multilayer ceramic capacitor 100 is mounted on the substrate, the insulating layer 140 has a peripheral surface of the ceramic body 110 excluding the first and second bump electrodes 151 and 152, and the first and second external electrodes 131 and 132. It can play the role which suppresses that solder is formed in the peripheral surface of.

  Further, when a plurality of chips are mounted on a narrow substrate, even if the mounted chips come into contact with each other, it is possible to prevent the occurrence of a short circuit and increase the circuit stability of the entire product.

  The first and second bump electrodes 151 and 152 may be formed by performing electroplating on the first and second terminal portions 131b and 132b of the first and second external electrodes 131 and 132.

  At this time, the first and second bump electrodes 151 and 152 preferably have a thickness of 50 μm or more.

  Table 1 below shows acoustic noise depending on the thicknesses of the first and second bump electrodes.

  Here, the size of the used multilayer ceramic capacitor is length × width × thickness of 1.0 mm × 0.5 mm × 0.5 mm, and the acoustic noise due to each sample is DC 4V, AC 1 Vrms @ 4Khz. Measured in

  Referring to Table 1 above, it can be seen that the acoustic noise is as high as 33 dB in the case of the multilayer ceramic capacitor of Sample 1 having no bump electrode.

  On the other hand, in the case of the multilayer ceramic capacitors of Samples 2 to 6 including the bump electrodes according to the present embodiment, it was confirmed that the acoustic noise was less than 32 dB compared to Sample 1.

  In particular, in the case of Samples 4 to 6 in which the bump electrodes were formed to be 50 μm or more, the effect that the acoustic noise was remarkably reduced by 13 dB or more compared to Sample 1 could be obtained.

  Meanwhile, the first and second bump electrodes 151 and 152 are, for example, first and second nickel formed on the first and second terminal portions 131b and 132b of the first and second external electrodes 131 and 132, respectively. (Ni) plating layers and first and second tin (Sn) plating layers formed on the first and second nickel plating layers, respectively.

  In addition, as another example, the first and second bump electrodes 151 and 152 may be first and second electrodes formed on the first and second terminal portions 131b and 132b of the first and second external electrodes 131 and 132, respectively. Two copper (Cu) plating layers, first and second nickel (Ni) plating layers formed on the first and second copper plating layers, respectively, and first and second nickel plating layers, respectively. First and second tin (Sn) plating layers.

  According to the present embodiment, as described above, since the bump electrode is formed by plating, there is an advantage that it is easy to adjust the thickness of the bump electrode.

  3a to 3c are perspective views sequentially illustrating a method for manufacturing a multilayer ceramic capacitor according to an embodiment of the present invention.

  Hereinafter, a method for manufacturing a multilayer ceramic capacitor according to an embodiment of the present invention will be described with reference to FIGS. 3A to 3C.

  First, a plurality of ceramic sheets are provided.

  The ceramic sheet is for forming the dielectric layer 111 of the ceramic body 110.

  The ceramic sheet may be formed by mixing a ceramic powder, a polymer, and a solvent to produce a slurry, and manufacturing the slurry into a sheet having a thickness of several μm by a method such as a doctor blade. it can.

  Next, the first and second internal electrodes 121 and 122 are formed by printing a conductive paste with a predetermined thickness on at least one surface of each ceramic sheet.

  At this time, the first and second internal electrodes 121 and 122 are formed such that the end portions thereof are exposed at both opposing end surfaces of the ceramic sheet.

  As a method for printing the conductive paste, a screen printing method or a gravure printing method can be used, but the present invention is not limited to this.

  Next, the plurality of ceramic sheets on which the first and second internal electrodes 121 and 122 are formed are alternately laminated so that the end portions thereof are exposed at both end faces of the laminate.

  Thereafter, the plurality of laminated ceramic sheets are pressurized from the lamination direction, and the plurality of ceramic sheets and the first and second internal electrodes 121 and 122 formed on the ceramic sheets are pressure-bonded to form a laminated body.

  Next, the laminate is cut into regions corresponding to one capacitor to form a chip.

  Next, the chip-formed laminate is fired at a high temperature to complete the ceramic body 110 in which the plurality of first and second internal electrodes 121 and 122 are alternately exposed on both end faces of the ceramic body 110. Let

  Thereafter, a conductive paste including copper (Cu) is applied to both ends of the ceramic body 110 so that the first and second internal electrodes 121 and 122 can be electrically connected to the exposed portions. As shown in FIG. 3A, the first and second external electrodes 131 and 132 formed to extend from both end faces of the ceramic body 110 to a part of the mounting surface are formed.

  Next, as shown in FIG. 3b, the ceramic body except for the first and second terminal portions 131b and 132b formed on the mounting surface of the ceramic body 110 among the first and second external electrodes 131 and 132. An insulating layer 140 is formed on the peripheral surface of 110 and the peripheral surfaces of the first and second external electrodes 131 and 132.

  At this time, the insulating layer 140 may be formed by applying an insulating resin to the ceramic body 110 and the first and second connection portions 131a and 132a of the first and second external electrodes 131 and 132 and curing them.

  As the insulating resin, a material such as an epoxy resist can be used, but the present invention is not limited to this.

  Next, as shown in FIG. 3c, the first and second bump electrodes 151 are electroplated on the first and second terminal portions 131b and 132b where the first and second external electrodes 131 and 132 are exposed. , 152 are formed.

  The first and second bump electrodes 151 and 152 are preferably formed with a thickness of 50 μm or more, but the present invention is not limited to this.

  Further, as an example, the first and second bump electrodes 151 and 152 may be formed by electroplating nickel on the first and second terminal portions 131b and 132b from which the first and second external electrodes 131 and 132 are exposed. Can be formed by electroplating.

  As another example, the first and second bump electrodes 151 and 152 may be formed by electroplating copper on the first and second terminal portions 131b and 132b where the first and second external electrodes 131 and 132 are exposed. It can be formed by electroplating nickel and electroplating tin.

  FIG. 4 is a side sectional view schematically showing a multilayer ceramic capacitor mounting substrate according to an embodiment of the present invention.

  Referring to FIG. 4, the mounting substrate 200 of the multilayer ceramic capacitor 100 according to the present embodiment includes a substrate 210 on which the multilayer ceramic capacitor 100 is mounted, and first and second electrode pads formed so as to be separated from the upper surface of the substrate 210. 221 and 222.

  In the multilayer ceramic capacitor 100, the first and second bump electrodes 151 and 152 formed on the lower surface, which is the mounting surface of the ceramic body 110, are in contact with the first and second electrode pads 221 and 222 of the substrate 210, respectively. In the state of being placed in the position, the substrate 210 can be joined and electrically connected by the solders 231 and 232.

  At this time, the first and second bump electrodes 151 and 152 are formed on the surfaces of the first and second bump electrodes 151 and 152 when the surface is plated with tin and the multilayer ceramic capacitor 100 is mounted on the substrate 210. The tin component can be melted and bonded to the first and second electrode pads 221 and 222.

  On the other hand, if necessary, for example, when the mounting surface of the substrate 210 is not flat, the first and second bump electrodes 151 and 152 use the solder 231 and 232 to form the first and second electrode pads 221 and 222, respectively. Can also be joined.

  In this manner, with the multilayer ceramic capacitor 100 mounted on the printed circuit board 210, voltages having different polarities are applied to the first and second external electrodes 131 and 132 formed at both ends of the multilayer ceramic capacitor 100. The ceramic body 110 repeatedly expands and contracts in the thickness direction due to the inverse piezoelectric effect of the dielectric layer 111, and both ends of the first and second external electrodes 131 and 132 have Poisson effect ( The poison effect causes the ceramic body 110 to contract and expand.

  Such contraction and expansion generate vibrations. The vibration is transmitted from the first and second external electrodes 131 and 132 to the substrate 210, and sound is emitted from the substrate 210 to be acoustic noise.

  According to the present embodiment, by absorbing the piezoelectric vibration transmitted to the substrate by the first and second external electrodes 131 and 132 of the multilayer ceramic capacitor 100 using the elasticity of the first and second bump electrodes 151 and 152, Acoustic noise can be reduced.

  In the multilayer ceramic capacitor mounting substrate 200 according to the present embodiment, the insulating layer 140 is formed on the peripheral surface of the ceramic main body 110 and the peripheral surfaces of the first and second external electrodes 131 and 132, and the ceramic main body 110 has the first structure. The second bump electrodes 151 and 152 are spaced apart from the first and second electrode pads 221 and 222 of the substrate 210 by a predetermined distance.

  According to the present embodiment, when using the solders 231 and 232, unlike the conventional multilayer ceramic capacitor, the solders 231 and 232 are connected to the ceramic body 110, the first and second external electrodes 131 and 132 of the multilayer ceramic capacitor 100, Are not in contact with each other, and can be formed so as to be limited to a minimum height such that they are formed only on the mounting surface of the first and second bump electrodes 151 and 152 and the peripheral surface thereof.

  Therefore, in the multilayer ceramic capacitor 100 of the present embodiment, the heights of the solders 231 and 232 are minimized, and the elastic force of the first and second bump electrodes 151 and 152 acts efficiently, so that the multilayer ceramic capacitor 100 By reducing the vibration generated from the capacitor 100 from being transmitted to the substrate 210, acoustic noise can be reduced.

  On the other hand, recently, with the downsizing and thinning of electronic products, the substrate has been reduced and high-density mounting of electronic components has been demanded.

  In particular, the need for high-density mounting has further increased for general-purpose passive components in that a large mounting amount consumes a large mounting area.

  According to this embodiment, the mounting surface of the external electrode can be formed on one surface in the thickness direction where the ceramic body is less displaced and vibration is not easily transmitted, thereby reducing the area of the mounting portion.

  In addition, the bump electrode allows solder to be avoided on the peripheral surface of the external electrode, and even if solder is used, the volume of the land pattern (land pattern) formed on the substrate is reduced by minimizing its volume. By doing so, it is possible to enable high-density mounting without damaging the mechanical strength such as the fixing strength of the external electrode.

  Note that even if a plurality of multilayer ceramic capacitors are mounted on a substrate at a narrow pitch, a solder bridge for connecting the multilayer ceramic capacitors does not occur, so that the reliability of the components can be improved. There is an effect that can be done.

  Although the embodiment of the present invention has been described in detail above, the scope of the right of the present invention is not limited to this, and various modifications and modifications can be made without departing from the technical idea of the present invention described in the claims. It will be apparent to those of ordinary skill in the art that variations are possible.

100 Multilayer Ceramic Capacitor 110 Ceramic Body 111 Dielectric Layers 112 and 113 Cover Layers 121 and 122 First and Second Internal Electrodes 131 and 132 First and Second External Electrodes 140 Insulating Layers 151 and 152 First and Second Bump Electrodes 200 Mounting substrate 210 Substrate 221, 222 First and second electrode pads 231, 232 Solder

Claims (18)

  1. A ceramic body in which a plurality of dielectric layers are laminated in the thickness direction;
    In the ceramic body, a plurality of first and second internal electrodes arranged to be alternately exposed on both end faces of the ceramic body through the dielectric layer,
    First and second external electrodes formed to cover both ends of the ceramic body;
    An insulating layer formed on the peripheral surface of the ceramic body and the peripheral surfaces of the first and second external electrodes;
    A multilayer ceramic capacitor comprising: first and second bump electrodes formed on mounting surfaces from which the first and second external electrodes are exposed.
  2.   The first and second bump electrodes include first and second nickel (Ni) plating layers formed on mounting surfaces from which the first and second external electrodes are exposed, and the first and second nickel plating layers, respectively. The multilayer ceramic capacitor of claim 1, further comprising first and second tin (Sn) plating layers formed thereon.
  3.   The first and second bump electrodes include first and second copper (Cu) plating layers formed on mounting surfaces from which the first and second external electrodes are exposed, and the first and second copper plating layers, respectively. First and second nickel (Ni) plating layers respectively formed thereon, and first and second tin (Sn) plating layers respectively formed on the first and second nickel plating layers. The multilayer ceramic capacitor according to claim 1.
  4.   The multilayer ceramic capacitor of claim 1, wherein the first and second bump electrodes have a thickness of 50 μm or more.
  5. The first and second external electrodes are formed on both end surfaces of the ceramic body, and are connected to the first and second internal electrodes, respectively, and the first and second connection portions. First and second terminal portions formed so as to extend to a part of the mounting surface of the ceramic main body, respectively,
    The multilayer ceramic capacitor of claim 1, wherein the first and second bump electrodes are formed on the first and second terminal portions, respectively.
  6.   The multilayer ceramic capacitor of claim 1, wherein the insulating layer is an epoxy resist.
  7. A plurality of ceramic sheets each having first and second internal electrodes formed thereon are alternately stacked and pressed so that the first and second internal electrodes are arranged to face each other with the ceramic sheet interposed therebetween. Providing a stage;
    Cutting and firing the multilayer body into regions corresponding to one capacitor, and providing a ceramic body in which the first and second internal electrodes are alternately exposed on both end faces of the ceramic body; and
    Forming first and second external electrodes at both ends of the ceramic body to be electrically connected to the first and second internal electrodes;
    Forming an insulating layer on the peripheral surface of the ceramic body and the peripheral surfaces of the first and second external electrodes;
    Forming a first bump electrode and a second bump electrode by plating the mounting surface from which the first and second external electrodes are exposed.
  8.   The multilayer ceramic capacitor according to claim 7, wherein the first and second bump electrodes are formed by electroplating nickel and electroplating tin on a mounting surface where the first and second external electrodes are exposed. Production method.
  9.   The first and second bump electrodes are formed by electroplating copper, electroplating nickel, and electroplating tin on a mounting surface from which the first and second external electrodes are exposed. The manufacturing method of the multilayer ceramic capacitor of description.
  10.   The method of manufacturing a multilayer ceramic capacitor according to claim 7, wherein the first and second bump electrodes are formed with a thickness of 50 μm or more.
  11.   The method for manufacturing a multilayer ceramic capacitor according to claim 7, wherein the insulating layer is formed by applying and curing an insulating resin on a peripheral surface of the ceramic body and the peripheral surfaces of the first and second external electrodes.
  12.   The method of claim 11, wherein the insulating resin is an epoxy resist.
  13. A substrate having first and second electrode pads on top;
    A multilayer ceramic capacitor installed on the substrate,
    The multilayer ceramic capacitor is disposed in a ceramic body in which a plurality of dielectric layers are laminated in a thickness direction, and is alternately exposed on both end faces of the ceramic body through the dielectric layer in the ceramic body. A plurality of first and second internal electrodes, first and second external electrodes formed to cover both ends of the ceramic body, a peripheral surface of the ceramic body, and a periphery of the first and second external electrodes A mounting substrate for a multilayer ceramic capacitor, comprising: an insulating layer formed on a surface; and first and second bump electrodes formed on a mounting surface from which the first and second external electrodes are exposed.
  14.   The first and second bump electrodes include first and second nickel (Ni) plating layers formed on mounting surfaces from which the first and second external electrodes are exposed, and the first and second nickel plating layers, respectively. The multilayer ceramic capacitor mounting substrate according to claim 13, further comprising first and second tin (Sn) plating layers respectively formed thereon.
  15.   The first and second bump electrodes include first and second copper (Cu) plating layers formed on mounting surfaces from which the first and second external electrodes are exposed, and the first and second copper plating layers, respectively. First and second nickel (Ni) plating layers respectively formed thereon, and first and second tin (Sn) plating layers respectively formed on the first and second nickel plating layers. The multilayer ceramic capacitor mounting substrate according to claim 13.
  16.   The multilayer ceramic capacitor mounting substrate according to claim 13, wherein the first and second bump electrodes have a thickness of 50 μm or more.
  17. The first and second external electrodes are formed on both end surfaces of the ceramic body, and are connected to the first and second internal electrodes, respectively, and the first and second connection portions. First and second terminal portions formed so as to extend to a part of the mounting surface of the ceramic main body, respectively,
    The multilayer ceramic capacitor mounting substrate according to claim 13, wherein the first and second bump electrodes are formed on the first and second terminal portions, respectively.
  18.   The multilayer ceramic capacitor mounting substrate of claim 13, wherein the insulating layer is an epoxy resist.
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016111280A (en) * 2014-12-10 2016-06-20 東光株式会社 Electronic component and manufacturing method thereof
JP2017175038A (en) * 2016-03-25 2017-09-28 太陽誘電株式会社 Laminated ceramic capacitor
JP2017175037A (en) * 2016-03-25 2017-09-28 太陽誘電株式会社 Laminated ceramic capacitor
JP2017175039A (en) * 2016-03-25 2017-09-28 太陽誘電株式会社 Laminated ceramic capacitor
KR20180028237A (en) * 2016-09-08 2018-03-16 삼성전기주식회사 Multilayer ceramic electronic component and manufacturing method thereof
US10879005B2 (en) 2014-12-10 2020-12-29 Murata Manufacturing Co., Ltd. Electronic component and method of manufacturing same

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180057105A (en) 2016-11-21 2018-05-30 삼성전기주식회사 Capacitor and method of fabricating the same
KR101891085B1 (en) 2016-11-23 2018-08-23 삼성전기주식회사 Capacitor and method of fabricating the same
KR102059441B1 (en) 2017-01-02 2019-12-27 삼성전기주식회사 Capacitor Component
US10347425B2 (en) 2017-05-04 2019-07-09 Samsung Electro-Mechanics Co., Ltd. Multilayer electronic component and board having the same
KR101992450B1 (en) * 2017-08-23 2019-06-25 삼성전기주식회사 Capacitor Component and Method of Manufacturing the Same
KR102057905B1 (en) * 2017-08-31 2019-12-20 삼성전기주식회사 Electronic component and board having the same mounted thereon
KR20190036346A (en) * 2017-09-27 2019-04-04 삼성전기주식회사 Electronic component and board having the same mounted thereon
KR20190038974A (en) 2017-10-02 2019-04-10 삼성전기주식회사 Electronic component and board having the same mounted thereon

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0684687A (en) * 1992-08-31 1994-03-25 Toshiba Corp Ceramic chip component and mounting structure therefor
JP2009094224A (en) * 2007-10-05 2009-04-30 Fujitsu Ltd Circuit substrate, semiconductor device and method of manufacturing semiconductor device
JP2010135623A (en) * 2008-12-05 2010-06-17 Fdk Module System Technology Corp Sounding suppressing method in circuit device, and circuit device provided with sounding suppressing function
JP2013058558A (en) * 2011-09-07 2013-03-28 Tdk Corp Electronic component

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09205005A (en) * 1996-01-24 1997-08-05 Matsushita Electric Ind Co Ltd Electronic component and manufacture thereof
CN201556528U (en) * 2009-09-22 2010-08-18 广东风华高新科技股份有限公司 Multilayer ceramic capacitor
JP2012033652A (en) * 2010-07-29 2012-02-16 Tdk Corp Ceramic capacitor
JP5776583B2 (en) * 2011-03-18 2015-09-09 株式会社村田製作所 multilayer ceramic capacitor
CN103050278B (en) * 2012-12-20 2016-07-06 广东风华高新科技股份有限公司 Multilayer ceramic capacitor and preparation method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0684687A (en) * 1992-08-31 1994-03-25 Toshiba Corp Ceramic chip component and mounting structure therefor
JP2009094224A (en) * 2007-10-05 2009-04-30 Fujitsu Ltd Circuit substrate, semiconductor device and method of manufacturing semiconductor device
JP2010135623A (en) * 2008-12-05 2010-06-17 Fdk Module System Technology Corp Sounding suppressing method in circuit device, and circuit device provided with sounding suppressing function
JP2013058558A (en) * 2011-09-07 2013-03-28 Tdk Corp Electronic component

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016111280A (en) * 2014-12-10 2016-06-20 東光株式会社 Electronic component and manufacturing method thereof
US10879005B2 (en) 2014-12-10 2020-12-29 Murata Manufacturing Co., Ltd. Electronic component and method of manufacturing same
JP2017175038A (en) * 2016-03-25 2017-09-28 太陽誘電株式会社 Laminated ceramic capacitor
JP2017175037A (en) * 2016-03-25 2017-09-28 太陽誘電株式会社 Laminated ceramic capacitor
JP2017175039A (en) * 2016-03-25 2017-09-28 太陽誘電株式会社 Laminated ceramic capacitor
US10153090B2 (en) 2016-03-25 2018-12-11 Taiyo Yuden Co., Ltd. Multilayer ceramic capacitor having external electrodes provided on bottom face and conductor and cover layers provided on front and rear faces
US10297388B2 (en) 2016-03-25 2019-05-21 Taiyo Yuden Co., Ltd. Multilayer ceramic capacitor
KR101883061B1 (en) * 2016-09-08 2018-07-27 삼성전기주식회사 Multilayer ceramic electronic component and manufacturing method thereof
US10347427B2 (en) 2016-09-08 2019-07-09 Samsung Electro-Mechanics Co., Ltd. Multilayer ceramic electronic component including external electrodes having extended band portions on one surface of body of multilayer ceramic electronic component
US10804037B2 (en) 2016-09-08 2020-10-13 Samsung Electro-Mechanics Co., Ltd. Method of manufacturing multilayer ceramic electronic component
KR20180028237A (en) * 2016-09-08 2018-03-16 삼성전기주식회사 Multilayer ceramic electronic component and manufacturing method thereof

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