JP2015179816A - Circuit board for probe card and probe card including the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a circuit board for a probe card which inhibits wiring from rupturing even when stress occurs between an organic insulation layer forming a top layer and an organic insulation layer located below the top layer.SOLUTION: A circuit board for a probe card includes: a lamination body which is provided on a ceramic substrate 1 through a resin adhesion layer 2 and is formed by laminating multiple organic insulation layers 31a through adhesion layers 31b; wiring conductor layers 32 respectively provided on lower surfaces of the organic insulation layers 31a; and through conductors 33 provided in a thickness direction of the organic insulation layer 31a. Through conductors 33 include: first through conductors 331 which electrically connect the upper and lower wiring conductor layers 32 with each other; and second through conductors 332 which are provided from an upper surface of the lamination body 3 to the multiple organic insulation layers 31a located below the upper surface and are electrically connected with the wiring conductor layers 32.

Description

  The present invention relates to a probe card circuit board used for, for example, a semiconductor device inspection apparatus and the like and a probe card including the same.

  In recent years, along with downsizing and increasing the density of electronic devices, not only semiconductor elements used in electronic devices, but also packages or wiring boards on which the semiconductor elements are mounted, or electrical inspection of semiconductor elements The probe card is also required to have finer wiring and higher density. The probe card is also required to have excellent flatness in order to improve the connectivity of the semiconductor element with the wafer terminal, for example.

  In the probe card circuit board, fine pattern processing is possible, and as a substrate with excellent flatness and high frequency characteristics, a plurality of thin film conductors and resin insulation layers are formed on a ceramic substrate flattened by polishing. There is a so-called build-up type wiring board in which a multilayer wiring portion is formed (see, for example, Patent Document 1).

  In addition, a wiring board that improves the connection reliability by preparing a laminated body of a resin insulating layer and a wiring layer separately from the ceramic board and bonding the laminated body to the ceramic board has been put into practical use. (For example, see Patent Document 2).

JP 2004-214586 A JP 2009-075059 A

  In the conventional circuit board for probe cards, the wiring conductor layer and the through conductor behave according to the respective organic insulating layers and adhesive layers (hereinafter referred to as organic insulating layers, etc.). Thus, the position of the joint portion between the wiring conductor layer and the through conductor substantially coincides with the position where the stress increases between the layers. As a result, the wiring density is increased. For example, when the minimum diameter of the through conductor is 20 (μm), the absolute value of the connection strength at the junction is reduced. The connection reliability of the joint portion is likely to be lowered due to the stress. Therefore, this thermal stress affects the connection reliability at the joint.

  The present invention has been made in view of the above problems, and its purpose is to suppress the breakage of the wiring conductor layer and the through conductor even if thermal stress is generated between different organic insulating layers and the like. An object of the present invention is to provide a probe card circuit board and the like that can be used.

A circuit board for a probe card according to one aspect of the present invention includes a ceramic substrate and a laminate formed by laminating a plurality of organic insulating layers on the ceramic substrate with a resin adhesive layer interposed therebetween. A wiring conductor layer provided on the lower surface of the organic insulating layer, and a through conductor provided in the thickness direction of the organic insulating layer and electrically connected to the wiring conductor layer. The penetrating conductor includes a first penetrating conductor penetrating one organic insulating layer and one adhesive layer, and a plurality penetrating the plurality of organic insulating layers and at least one adhesive layer. The through-conductor is included.

  A probe card according to another aspect of the present invention uses the probe card circuit board of the present invention having the above-described configuration.

  According to the circuit board for a probe card or the like according to one aspect of the present invention, even if stress is generated between different organic insulating layers, for example, between the uppermost organic insulating layer and the lower organic insulating layer, Wiring breakage can be suppressed.

It is sectional drawing which shows an example of the circuit board for probe cards of the 1st Embodiment of this invention. (A) is sectional drawing which expands and shows the principal part A of the circuit board for probe cards shown in FIG. 1, (b) is sectional drawing which shows the modification of (a). (A)-(d) is sectional drawing for demonstrating the manufacturing method (process 1) of the circuit board for probe cards of the 1st Embodiment of this invention. (A)-(c) is sectional drawing for demonstrating the manufacturing method (process 3 and process 4) of the circuit board for probe cards of this invention. (A), (b) is sectional drawing for demonstrating the manufacturing method (process 5 and process 6) of the circuit board for probe cards of this invention. It is sectional drawing which shows an example of the circuit board for probe cards of the 2nd Embodiment of this invention. (A) is sectional drawing which expands and shows the principal part B of the circuit board for probe cards shown in FIG. 6, (b) is sectional drawing which shows the modification of (a). (A)-(d) is sectional drawing for demonstrating the manufacturing method (process 1) of the circuit board for probe cards of the 2nd Embodiment of this invention.

  Hereinafter, a probe card circuit board and a probe card according to embodiments of the present invention will be described with reference to the drawings. Note that the drawings used in the following description are schematic, and the dimensional ratios and the like on the drawings do not necessarily match the actual ones. For convenience of explanation, the probe card circuit board and the probe card define an orthogonal coordinate system XYZ, and use the term “upper surface” or “lower surface” as appropriate with the positive side in the Z direction as the upper side.

  In the description of the embodiments and the like, components that are the same as or similar to those already described may be assigned the same reference numerals and descriptions thereof may be omitted. In the following description, an example in which the second through conductor is formed downward from the upper surface of the multilayer body will be described as the first embodiment, and the entire second through conductor is the multilayer body. An example located inside is described as a second embodiment.

<Embodiment 1>
A probe card circuit board and a probe card according to a first embodiment (referred to as Embodiment 1) of the present invention will be described below with reference to FIGS.

As shown in FIG. 1, the probe card circuit board according to the first embodiment is formed by laminating a plurality of organic insulating layers 31a provided on the ceramic substrate 1 with the resin adhesive layer 2 interposed therebetween via the adhesive layer 31b. The laminated body 3, the wiring conductor layer 32 provided on the lower surface of the organic insulating layer 31a, and the through conductors 33 provided in the thickness direction of the organic insulating layer 31a are provided. The first through conductor 331 that electrically connects the wiring conductor layers 32 is electrically connected to the wiring conductor layer 32 provided from the upper surface of the multilayer body 3 to the plurality of organic insulating layers 31a below. And a second through conductor 332.

  The ceramic substrate 1 includes a plurality of ceramic insulating layers 11, a ceramic surface wiring 14 formed on the surface (upper and lower surfaces) of the ceramic insulating layer 11, a ceramic wiring conductor layer 12 formed inside the ceramic insulating layer 11, and a ceramic penetration. And a conductor 13.

    The ceramic substrate 1 also has a function of ensuring the overall rigidity of the probe card circuit board. The stacked body 3 has a fine wiring pattern in which the terminal 34 on the upper surface of the uppermost organic insulating layer 31a corresponds to an electrode of a semiconductor element or the like. The probe card circuit board can be manufactured by providing the laminate 3 on the highly rigid ceramic substrate 1. The terminal 34 has a probe formed on the upper surface, for example, and is provided on the surface of the through conductor 33.

  As shown in FIG. 1, the ceramic surface wiring 14 is provided on the upper surface of the uppermost ceramic insulating layer 11 and on the lower surface of the lowermost ceramic insulating layer 11.

  Further, the ceramic wiring conductor layer 12 is provided between the ceramic insulating layers 11, and the ceramic through conductor 13 is provided through the ceramic insulating layer 11 in the vertical direction (thickness direction).

  Thus, the ceramic surface wiring 14 is formed on the lower surface of the ceramic substrate 1 and is for electrically connecting the probe card circuit board and the external circuit. The ceramic wiring conductor layer 12 and the ceramic through conductor 13 formed inside are for electrically connecting the ceramic surface wiring 14 on the upper surface of the ceramic substrate 1 and the ceramic surface wiring 14 on the lower surface.

  As shown in FIG. 1, ceramic surface wiring 14 is formed on the upper surface of the ceramic substrate 1, and the ceramic surface wiring 14 is electrically connected to the connection through conductor 22 of the resin adhesive layer 2. In the ceramic substrate 1, the upper surface ceramic surface wiring 14 and the lower surface ceramic surface wiring 14 are electrically connected via a plurality of ceramic through conductors 13 and a plurality of ceramic wiring conductor layers 12.

In the ceramic substrate 1, the ceramic insulating layer 11 includes an aluminum oxide (alumina: Al ₂ O ₃ ) sintered body, an aluminum nitride (AlN) sintered body, a silicon carbide (SiC) sintered body, and a mullite sintered body. Or a ceramic material such as glass ceramics.

  The ceramic surface wiring 14 is made of, for example, a metal material such as tungsten (W), molybdenum (Mo), manganese (Mn), or copper (Cu), or an alloy material of these metal materials. The ceramic wiring conductor layer 12 is made of, for example, a metal material such as tungsten (W), molybdenum (Mo), manganese (Mn), or copper (Cu), or an alloy material of these metal materials. The ceramic through conductor 13 is made of, for example, a metal material such as tungsten (W), molybdenum (Mo), manganese (Mn), or copper (Cu), or an alloy material of these metal materials. The ceramic surface wiring 14 is not formed simultaneously with the ceramic wiring conductor layer 12 and the ceramic through conductor 13, but is connected to the ceramic through conductor 13 using a thin film forming method after polishing both surfaces of the fired ceramic substrate 1. You may form so that it may do.

As shown in FIG. 1, the ceramic substrate 1 is formed in the same shape and size as the laminate 3 in a plan view. That is, the probe card circuit board has, for example, a square plate shape or a disk shape as a whole, and the upper surface is used as a part for mounting or mounting an electronic component such as a semiconductor element. The semiconductor element is mounted on the upper surface so as to be electrically and mechanically connected to the probe card circuit board to form a semiconductor device.

  The semiconductor element is temporarily placed on the top surface for electrical checking. Examples of the semiconductor element include a semiconductor integrated circuit element such as an IC or LSI, or a micromachine (a so-called MEMS element) in which a minute electromechanical mechanism is formed on the surface of a semiconductor substrate.

  In the laminate 3, a plurality of organic insulating layers 31a are stacked via an adhesive layer 31b. A wiring conductor layer 32 is provided on the lower surface (front surface) of each organic insulating layer 31a. Through conductors 33 are provided inside 31a, and organic insulating layers 31a and wiring conductor layers 32 are alternately laminated. As described above, the wiring conductor layer 32 is positioned on the lower surface of the organic insulating layer 31a, and the laminate 3 includes a plurality of organic insulating layers 31a stacked via the adhesive layer 31b. Forming.

  Further, the through conductor 33 is provided so as to penetrate the organic insulating layer 31 a in the thickness direction, that is, in the vertical direction, and the upper and lower wiring conductor layers 32 are electrically connected to each other through the through conductor 3. Yes. In FIG. 1, the laminate 3 is formed by laminating three organic insulating layers 31a. The number of stacked organic insulating layers 31a is not limited to three, and is appropriately set according to the characteristics of the circuit board for the probe card. The upper and lower organic insulating layers 31a are bonded to each other through an adhesive layer 31b.

Further, the organic insulating layer 31a, the wiring conductor layer 32, the through conductor 33 (first to third through conductors 33).
1-333) and the terminal 34 according to the number of terminals of electronic components mounted on the circuit board for the probe card, the number of semiconductor elements on the wafer to be inspected with the probe card, the number of terminals of the semiconductor elements, or their arrangement state Thus, the size (for example, the wiring width, diameter, thickness, etc.) or position is set as appropriate.

  The through conductor 33 includes a first through conductor 331, a second through conductor 332, and a third through conductor 333, and the first through conductor 331 electrically connects the upper and lower wiring conductor layers 32 to each other. The second through conductor 332 is provided from the upper surface of the multilayer body 3 to the plurality of organic insulating layers 31 a below and is electrically connected to the wiring conductor layer 32. Thus, the 2nd penetration conductor 332 has penetrated the uppermost organic insulating layer 31a of layered product 3, is provided over a plurality of continuous organic insulating layers 31a below, and has one end face (lower end). It is electrically connected to the wiring conductor layer 32 of the organic insulating layer 31a located below the uppermost organic insulating layer 31a. Further, the second through conductor 332 is provided with a terminal 34 on the other end face (upper end).

  That is, the first through conductor 331 passes through one organic insulating layer 31 a and one adhesive layer 31 b in order to connect to the upper and lower wiring conductor layers 32. The second through conductor 332 penetrates the plurality of organic insulating layers 31a downward from the uppermost organic insulating layer 31a. Further, the second through conductor 332 penetrates at least one adhesive layer 31b together with the plurality of organic insulating layers 31a. 1 and 2 exemplify the case where the second through conductor 332 continuously penetrates the two organic insulating layers 31a and the one adhesive layer 31b, but other forms may be used. . For example, the second through conductor 332 may be continuous with two organic insulating layers 31a and two adhesive layers 31b, or may be continuously penetrated with three or more organic insulating layers 31a and adhesive layers 31b. May be.

  The third through conductor 333 is provided in the uppermost organic insulating layer 31a and is electrically connected to the wiring conductor layer 32 of the uppermost organic insulating layer 31a. A terminal 34 is provided on the surface of the third through conductor 333.

  In the laminate 3, the through conductor 33 and the wiring conductor layer 32 penetrating the organic insulating layer 31 a in the thickness direction are used to connect electrodes such as semiconductor elements mounted on the laminate 3 to an external electric circuit (such as a printed circuit board). This is a portion that becomes a conductive path for electrical connection to (not shown). For example, if a semiconductor element is mounted on the center of the upper surface of the laminate 3 and the electrodes of the semiconductor element are electrically connected to the terminals 34 exposed on the uppermost surface of the laminate 3 via solder or a probe, the semiconductor The electrode of the element is electrically connected to the lowermost wiring conductor layer 32 of the multilayer body 3 through the wiring conductor layer 32 and the through conductor 33.

  Then, if the lowermost wiring conductor layer 32 of the multilayer body 3 is electrically connected to an external electric circuit via, for example, the ceramic surface wiring 14 formed in advance on the ceramic substrate 1, An electrode and an external electric circuit are electrically connected.

  Specifically, a probe for connecting to the terminal of the semiconductor element is formed on the terminal 34 on the second through conductor 332, and the ceramic surface wiring 14 on the lower surface of the ceramic substrate 1 is connected to the tester device. The circuit board for connecting is connected, and it becomes a probe card by setting it as such a structure, and a probe card becomes an inspection apparatus of a semiconductor device by connecting with a tester.

  Here, the laminate 3 will be described in detail below.

  The stacked body 3 is composed of an insulating layer 31 including an organic insulating layer 31a and an adhesive layer 31b. The laminated body 3 includes a plurality of organic insulating layers 31a stacked. The organic insulating layer 31a functions as a base material for forming the wiring conductor layer 2, and electrically insulates the wiring conductor layers 32 from each other. It functions as an insulating material to ensure

  The organic insulating layer 31a is made of a resin material, and has a rectangular shape such as a rectangular shape or a square shape, a circular shape or an elliptical shape, and a thickness of, for example, 120 (μm) to 185 (μm). It is formed in layers.

  In addition, as shown in FIG. 1, the plurality of organic insulating layers 31 a have the same outer dimensions and shapes in plan view, and are stacked so that the outer surface of the stacked body 3 is not uneven. Thus, the laminated body 3 is formed by laminating a plurality of organic insulating layers 31a, and the plurality of organic insulating layers 31a constitute a thin film multilayer portion. The plurality of stacked organic insulating layers 31a become insulating base portions (no reference) in the stacked body 3. For example, an electronic component (not shown) such as a semiconductor element is mounted on the upper surface of the laminate 3, and the lower surface is attached to a highly rigid substrate such as the ceramic substrate 1.

  The organic insulating layer 31a is made of, for example, an insulating resin material such as an epoxy resin, a polyimide resin, a polyamideimide resin, a polyetherimide resin, or a liquid crystal polymer. The organic insulating layer 31a has a wiring conductor layer 32 formed on the surface, and the wiring conductor layer 32 is made of, for example, a metal such as copper, silver, palladium, gold, platinum, aluminum, chromium, nickel, cobalt, or titanium. It consists of material or the alloy material of these metal materials. The wiring conductor layer 32 has a thickness of, for example, 3 (μm) to 25 (μm).

The wiring conductor layer 32 is formed by depositing the above metal material on the surface of the organic insulating layer 31a using a method such as sputtering, vapor deposition or plating, and performing trimming processing such as masking or etching as necessary. Thus, it can be formed on the surface of the organic insulating layer 31a with a predetermined wiring pattern.

The through conductor 33 is provided so as to penetrate through the organic insulating layer 31a in the thickness direction (vertical direction). For example, the through conductor 33 is formed by providing a through hole (no symbol) in a part of the organic insulating layer 31a. The through hole is formed through the thickness direction by using a drilling method such as a laser processing method using a CO ₂ laser or a YAG laser, an RIE (reactive ion etching) method, or an etching method using a solvent. The through conductor 33 can be formed by providing the through hole with a conductive material to be the through conductor 33 in the through hole using a sputtering method, a vapor deposition method, or a plating method. Further, the through conductor 33 can be formed by filling the through hole with a conductive material using a method such as filling of a conductive paste.

  The through conductor 33 is made of, for example, a metal material such as copper, silver, palladium, gold, platinum, aluminum, chromium, nickel, cobalt, titanium, or tungsten, or an alloy material of these metal materials.

  Further, the through conductor 33 is provided in the thickness direction in the organic insulating layer 31a, and is joined to and electrically connected to the wiring conductor layer 32 positioned above and below provided between the organic insulating layers 31a. ing.

  As shown in FIG. 1, the first through conductor 331 electrically connects the upper and lower wiring conductor layers 32 and has a truncated cone shape in the organic insulating layer 31a. It is provided so that the diameter in a plan view gradually increases toward the side. In other words, the area of the first through conductor 331 when viewed in a plan view is gradually increased toward the ceramic substrate 1 side.

  The area of the upper surface of the first through conductor 331 is smaller than the area of the lower surface. For example, the diameter of the first through conductor 331 gradually increases in a range from 20 (μm) to 25 (μm) as viewed from the upper surface toward the lower surface. It is provided in a truncated cone shape inside the organic insulating layer 31a. Further, the first through conductor 331 is not limited to a circular shape in plan view, and may be an elliptical shape or a quadrangular shape. Even in such a case, the first through conductor 331 is provided so that the area when seen in a plan view gradually increases toward the ceramic substrate 1 side.

  On the other hand, the second through conductor 332 is provided from the upper surface of the multilayer body 3 to the plurality of organic insulating layers 31 a below and is electrically connected to the wiring conductor layer 32. That is, the second penetrating conductor 332 penetrates the uppermost organic insulating layer 31a of the multilayer body 3 in the thickness direction, and is provided over a plurality of organic insulating layers 31a that are vertically continuous.

  In FIG. 1, the second through conductor 332 is provided across the two organic insulating layers 31 a of the uppermost organic insulating layer 31 a and the organic insulating layer 31 a located on the lower surface side thereof, and the lower end is the uppermost layer. It is electrically connected to the wiring conductor layer 32 of the second organic insulating layer 31a from the uppermost layer below the organic insulating layer 31a.

  In FIG. 1, the second through conductor 332 is provided across the two organic insulating layers 31 a of the uppermost organic insulating layer 31 a and the second organic insulating layer 31 a from the uppermost layer of the multilayer body 3. However, the present invention is not limited to this. For example, it may be provided over the organic insulating layer 31a of the uppermost layer of the laminate 3 and the three organic insulating layers 31a of the second and third organic insulating layers 31a from the uppermost layer.

The second through conductor 332 has an inverted frustoconical shape in the organic insulating layer 31a, which is different from the shape of the first through conductor 331, and has a diameter in a plan view toward the ceramic substrate 1 side. It is provided so that it may become gradually smaller. That is, the area of the second through conductor 332 when viewed in a plan view is gradually reduced toward the ceramic substrate 1 side.

  Thus, the area of the upper surface of the second through conductor 332 is larger than the area of the lower surface. For example, the diameter of the second through conductor 332 in the plan view is, for example, 25 (μm) to 12 (μm) from the upper surface to the lower surface. It is gradually smaller in the range, and is provided in an inverted truncated cone shape inside the organic insulating layer 31a. The shape of the second through conductor 332 is not limited to a circular shape in plan view, and may be an elliptical shape or a quadrangular shape. Even in such a case, the second penetrating conductor 332 is provided so that the area when seen in a plan view is gradually reduced toward the ceramic substrate 1 side.

  Further, as shown in FIG. 1, the uppermost organic insulating layer 31a is provided with a third through conductor 333, which is electrically connected to the wiring conductor layer 32 of the uppermost organic insulating layer 31a. Yes. The third through conductor 333 has an upper surface area larger than the lower surface area. For example, the diameter of the third through conductor 333 in the plan view is, for example, in the range of 50 (μm) to 40 (μm) from the upper surface to the lower surface. It becomes gradually smaller and is provided in an inverted truncated cone shape inside the organic insulating layer 31a. As described above, the third through conductor 333 is provided so as to have a larger diameter in plan view than the second through conductor 332.

  The laminate 3 is formed by providing the wiring conductor layer 32 and the through conductor 33 on the organic insulating layer 31a and laminating the required number of organic insulating layers 31a. As described above, the multilayer body 3 is formed as a multilayer wiring portion by laminating a plurality of organic insulating layers 31 a and providing the wiring conductor layer 32 and the through conductor 33. In FIG. 1, the stacked body 3 includes three organic insulating layers 31a, and a plurality of organic insulating layers 31a are sequentially stacked with an adhesive layer 31b interposed therebetween.

  Thus, the organic insulating layers 31a positioned in the vertical direction are bonded to each other through the adhesive layer 31b, and the stacked body 3 is formed by stacking a plurality of organic insulating layers 31a. The adhesive layer 31b is made of, for example, a material having thermosetting properties selected from the group consisting of polyamideimide resin, polyimidesiloxane resin, bismaleide resin, and epoxy resin.

  The laminate 3 is provided with a terminal 34 on the surface of the through conductor 33 of the uppermost organic insulating layer 31a. The surface of the terminal 34 is plated for corrosion prevention or connectivity with a probe or the like. A layer is provided. Specifically, the plating layer is a nickel plating layer and a gold plating layer, the nickel plating layer has a thickness of about 1 (μm) to 10 (μm), and the gold plating layer is 0 It has a thickness of about 1 (μm) to 3 (μm). And as for a plating layer, a nickel plating layer and a gold plating layer are sequentially formed on the surface of the through conductor 33.

  In FIG. 1, the terminal 34 is a plating layer formed on the surface (upper surface) of the through conductor 33. Further, a thin film conductor layer connected to the through conductor 33 can be formed on the upper surface of the uppermost organic insulating layer 31 a, and this thin film conductor layer can be used as the terminal 34. In that case, the plating layer is formed on the surface of the thin film conductor layer to be the terminal 34 for corrosion prevention or connectivity with a probe or the like.

The resin adhesive layer 2 is provided between the upper surface of the ceramic substrate 1 and the lowermost organic insulating layer 31 a of the multilayer body 3. The resin adhesive layer 2 adheres the ceramic substrate 1 and the laminated body 3 to each other, and includes a connection insulating layer 21 and a connection through conductor 22. The connection insulating layer 21 has an adhesive layer formed on both surfaces of a thermoplastic resin layer having high heat resistance, and the plurality of connection through conductors 22 penetrate the connection insulating layer 21 in the vertical direction (thickness direction). Is provided. The resin adhesive layer 2 has a thickness of, for example, 5 (μm) to 20 (μm).

  The resin adhesive layer 2 is made of an adhesive resin material in order to bond the ceramic substrate 1 and the laminate 3. The resin adhesive layer 2 is made of, for example, a resin material such as an epoxy resin, a polyphenylene ether resin, a polyimide resin, a polyquinoline resin, a polyamideimide resin, or a fluorine resin.

  The plurality of connecting through conductors 22 have a truncated cone shape, and are provided such that the diameter in plan view gradually increases toward the ceramic substrate 1 side. Thus, as shown in FIG. 1, the connection through conductor 22 has a lower surface area larger than the upper surface area and a connection-side (ceramic substrate 1 side) lower surface area. Therefore, when the ceramic substrate 1 and the laminate 3 are bonded through the resin adhesive layer 2, the area of the lower surface of the connection through conductor 22 is large, and the connection through conductor 22 and the ceramic surface wiring 14 are Bonding area increases. Therefore, the probe card circuit board improves the connectivity between the ceramic substrate 1 and the laminate 3. In addition, since the connection through conductor 22 has a shape that increases the area of the lower surface, even if a dimensional variation occurs due to firing shrinkage or the like in the ceramic substrate 1, the occurrence of connection failure due to misalignment or the like is suppressed. can do.

  As described above, the laminate 3 and the ceramic substrate 1 are arranged with the resin adhesive layer 2 interposed therebetween, and the wiring conductor layer 2 of the laminate 3 located above and the ceramic of the ceramic substrate 1 located below. The surface wiring 14 is electrically connected via a connection through conductor 22 disposed therebetween.

  In FIG. 1, the circuit board for the probe card shows an example of the wiring configuration of the stacked body 3, and the wiring configuration is simplified. The probe card circuit board has a conductive path for electrically connecting the terminal 34 on the upper surface of the uppermost organic insulating layer 31 a and the ceramic surface wiring 14 on the lower surface of the ceramic substrate 1. The vertical direction is electrically connected by a conductive path. The conductive paths are, for example, a ground wiring path, a signal wiring path, a signal wiring path, and a power supply wiring path from the left side in FIG. 1, and thus, the four wiring paths become conductive paths, and the probe card circuit The substrate is configured such that the vertical direction is electrically connected using these wiring paths.

  For example, two signal wiring paths are formed in the central portion, and a probe for connecting to a terminal of a semiconductor element is provided at a terminal 34 of the signal wiring path. For example, capacitors are provided on the ground wiring path and the power supply wiring path on both sides. Note that the capacitor reduces fluctuations in the power supplied to the semiconductor element.

  Further, the signal wiring path is required to have a higher density wiring configuration as the semiconductor elements are highly integrated. Therefore, in the laminate 3, at least in the uppermost layer, the wiring conductor layer 32 having a thinner wiring width or the through conductor 33 having a smaller diameter is formed in the organic insulating layer 31 a in order to make the wiring configuration higher density. The

  In addition, the ground wiring path or the power supply wiring path is required to have a low resistance (low impedance) in order to reduce the fluctuation of the power supply voltage as the voltage of the semiconductor element is reduced. It is preferable to use the wiring conductor layer 32 having a larger wiring width or the through conductor 33 having a larger diameter than the signal wiring path in order to reduce the resistance. That is, in FIG. 1, the ground wiring path or the power supply wiring path preferably uses the third through conductor 333 in the uppermost organic insulating layer 31a.

In the laminated body 3, in particular, the signal wiring path has a high-density wiring configuration as the semiconductor elements are highly integrated. Therefore, when the multilayer body 3 uses a penetrating conductor having an inverted truncated cone shape in which the area of the upper surface is larger than the area of the lower surface and the diameter in plan view is smaller than the uppermost organic insulating layer 31a, As a result, the area at the joint becomes smaller and the absolute value of the connection strength becomes smaller. This joint is located in the vicinity of the interlayer between the uppermost organic insulating layer 31a and the organic insulating layer 31a therebelow, and the connection reliability is likely to decrease due to the stress generated between the layers.

  However, in the probe card circuit board according to the first embodiment, stress is generated between the uppermost organic insulating layer 31a and the lower organic insulating layer 31a (that is, between different organic insulating layers 31a). However, the through conductor 33 has the second through conductor 332 connected to the wiring conductor layer 32 of the lower organic insulating layer 31a of the uppermost organic insulating layer 1a, and the second through conductor 332 and the wiring conductor. Since the joint portion with the layer 32 is separated from the interlayer, stress is hardly applied to the joint portion. Therefore, the probe card circuit board has a junction between the second through conductor 332 and the wiring conductor layer 32 even if a stress is generated between the uppermost organic insulating layer 31a and the lower organic insulating layer 31a. In this case, peeling or breakage of the wiring can be suppressed, so that poor connection is less likely to occur. Thus, the multilayer body 3 can form a probe card circuit board having higher density wiring by using the second through conductor 332.

  Further, as will be described later, the plurality of through conductors 33 (second through conductor 332 and third through conductor 333) in the uppermost layer are formed after the multilayer body 3 is provided on the ceramic substrate 1. In this case, for example, a through hole reaching the wiring conductor layer 32 is formed in the vicinity of the already formed through conductor 331 using a laser processing method, and the already formed through conductor 33 is formed by heat applied by laser irradiation. There is a concern that the adhesive strength at the joint between the wiring conductor layer 32 and the wiring conductor layer 32 may be reduced.

  However, in the probe card circuit board according to the first embodiment, in the organic insulating layer 31a below the uppermost organic insulating layer 31a, the wiring conductor layer 32 is connected to the second through conductor 332 on the upper surface side. Moreover, it has a junction part with the 1st penetration conductor 331 on the undersurface side.

  As shown in FIG. 1, the second through conductor 332 is reduced in diameter in plan view as it goes to the ceramic substrate 1 side, and the joint portion on the upper surface side of the wiring conductor layer 32 can be reduced. . Accordingly, since the second through conductor 332 can be formed away from the joint on the lower surface side of the wiring conductor layer 32 in plan view, it is possible to suppress a decrease in the adhesive strength of the joint on the lower surface. , Can increase the degree of design freedom.

  The present invention is not limited to the probe card circuit board of the first embodiment described above, and various modifications and improvements can be made without departing from the scope of the present invention. Hereinafter, other embodiments will be described. Of the probe card circuit boards according to the other embodiments, the same parts as those of the probe card circuit board according to the first embodiment are denoted by the same reference numerals, and the description thereof is omitted as appropriate.

<Modification of Embodiment 1>
A probe card circuit board and a probe card according to a modification of the first embodiment of the present invention will be described below with reference to FIG. Note that the probe card circuit board of the modification is different from the above example in the shape of the second through conductor 332.

In the probe card circuit board according to the modified example, as shown in FIG. 2B, at least a part of the side surface of the second through conductor 332 protrudes in the layer direction over the entire circumference in the adhesive layer 31b. That is, the second through conductor 332 has a protruding portion that protrudes in the layer direction on the side surface. The “layer direction” refers to a direction parallel to the XY plane in FIGS. 1 to 8 (details of some drawings will be described later).

  As described above, the second through conductor 332 has at least a part of the side surface protruding in the layer direction in the adhesive layer 31b, and has a protruding portion protruding in the layer direction on the side surface. Therefore, even if a stress is applied to the second through conductor 332 from the uppermost organic insulating layer 31a, the side protrusions relieve the stress applied in the vertical direction, so that the protrusions of the second through conductor 332 Since the stress is less likely to be transmitted to the lower side, the stacked body 3 is prevented from being poorly connected between the organic insulating layers 31a.

  The 2nd penetration conductor 332 can form the projection part which projected to at least one part of the side as follows. Using the laser processing method, the through hole is formed in the multilayer body 3 so as to reach the wiring conductor layer 32 in order to provide the second through conductor 332. In this case, each material is selected so that the thermal deformation temperature of the adhesive layer 31b is lower than the thermal deformation temperature of the organic insulating layer 31a. In this case, the organic insulating layer 31a is, for example, a polyimide resin, and the adhesive layer 31b is, for example, a polyamideimide resin.

  The through-hole is formed in the stacked body 3 so as to penetrate the organic insulating layer 31a and the adhesive layer 31b by using a laser processing method. When the organic insulating layer 31a and the adhesive layer 31b are irradiated with laser simultaneously to form a through hole, the resin material of the adhesive layer 31b having a low thermal deformation temperature is evaporated more. Thus, the through hole is formed in the adhesive layer 31b so that at least a part thereof protrudes in the layer direction. After that, by filling the through hole with a conductive material, the second through conductor 332 has a shape such that at least a part of the side surface protrudes in the layer direction over the entire circumference in the adhesive layer 31b. .

  Further, when the diameter of the joint portion with the wiring conductor layer 32 in a plan view is 20 (μm) or more, the connection strength increases as the joint area increases. The power supply wiring can further secure connection reliability by using the third through conductor 333.

  As shown in FIG. 1, in the circuit board for a probe card, the signal wiring path has a plurality of organic continuous layers in which the second through conductor 332 passes through the uppermost organic insulating layer 31a of the multilayer body 3, Provided over the insulating layer 31a, one end face is electrically connected to the wiring conductor layer 32 of the organic insulating layer 31a positioned below the uppermost organic insulating layer 31a. On the other hand, the power supply wiring path or the ground wiring path uses the third through conductor 333 when the diameter of the joint portion with the wiring conductor layer 32 in plan view is 20 (μm) or more. Thus, the power supply wiring or the ground wiring can be effectively provided also in the uppermost organic insulating layer 31a of the stacked body 3. Therefore, such a configuration is more preferable because the circuit board for probe card can form necessary wiring without increasing the number of stacked organic insulating layers 31a.

  Here, a method for manufacturing the probe card circuit board according to the first embodiment will be described below. The method for manufacturing a probe card circuit board includes the following six steps, Step 1 to Step 6.

Step 1 is a step of preparing a stacked body 3 in which a plurality of organic insulating layers 31a are stacked. Step 2 is a step of preparing the ceramic substrate 1. Step 3 is a step of attaching the resin adhesive layer 2 to the organic insulating layer 31a. Step 4 is a step of forming a plurality of connection through conductors 22 in the resin adhesive layer 2. Step 5 is a step of attaching the resin adhesive layer 2 attached to the organic insulating layer 31 a to the ceramic substrate 1. Step 6 is a step of forming the multilayer body 3, the second through conductor 332, the third through conductor 333, and the terminal 34.

  First, the process 1 which prepares the laminated body 3 by which the some organic insulating layer 31a is laminated | stacked is demonstrated.

  First, as shown in FIG. 3A, an organic insulating layer 31a that becomes the uppermost organic insulating layer 31a when it is completed is fixed on a plate 40 made of, for example, glass, ceramics, or silicon. The organic insulating layer 31a is made of a resin material such as polyimide resin. Moreover, as a method of fixing the organic insulating layer 31a to the plate 40, for example, there is a method of attaching the organic insulating layer 31a to the plate 40 using an adhesive.

  Next, as shown in FIG. 3B, the wiring conductor layer 32 is formed on the organic insulating layer 31a. As shown in FIG. 3B, the organic insulating layer 31 includes a structure in which the wiring conductor layer 32 is embedded in the organic insulating layer 31a.

  For example, in the case where the wiring conductor layer 32 is embedded in the organic insulating layer 31a, the wiring conductor layer 32 is formed as follows. The wiring conductor layer 32 has a concave portion having the same shape as the wiring conductor layer 32 formed on the upper surface of the organic insulating layer 31a. When the wiring conductor layer 32 is formed in the concave portion, the upper surface of the organic insulating layer 31a and the wiring conductor layer are formed. Since there is no step between the upper surface of 32 and the surface is flat, even if a plurality of organic insulating layers 31a are stacked, the upper surface of the organic insulating layer 31a is flat, and the reliability of electrical connection with the resin adhesive layer 2 is improved. This is preferable. In order to form the recess in the organic insulating layer 31a, a resist film having a pattern-shaped opening of the wiring conductor layer 32 is formed on the surface of the organic insulating layer 31a, and an etching method such as RIE (Reactive Ion Etching) is used. The surface of the exposed portion of the organic insulating layer 31 may be removed and formed.

  The wiring conductor layer 32 can be formed using, for example, a thin film forming method such as a vapor deposition method, a sputtering method, or an ion plating method. The wiring conductor layer 32 is, for example, a chromium (Cr) -copper (Cu) alloy layer or titanium (Ti) having a thickness of about 0.1 (μm) to 3 (μm) on the entire main surface of the organic insulating layer 31a. -A base conductor layer made of a copper (Cu) alloy layer is formed. Next, a resist film having a pattern-shaped opening of the wiring conductor layer 32 is formed on the underlying conductor layer, and the resist film is used as a mask to form a metal having a low electrical resistance such as copper or gold by plating or the like. A main conductor layer having a thickness of about (μm) to 10 (μm) is formed. Then, the resist film is peeled and removed, and the exposed portion of the underlying conductor layer is removed by etching, whereby the wiring conductor layer 32 is formed.

  Next, as shown in FIG. 3C, the insulating layer 31 composed of the organic insulating layer 31a and the adhesive layer 31b adheres to the first organic insulating layer 31a and the wiring conductor layer 32 formed on the surface thereof. Is done. That is, the insulating layer 31 composed of the organic insulating layer 31a and the adhesive layer 31b is provided in close contact with the first organic insulating layer 31a. The adhesive layer 31b is made of a thermosetting material, and is selected from the group consisting of polyamideimide resin, polyimide siloxane resin, bismaleide resin and epoxy resin.

  The wiring conductor layer 32 is formed on the organic insulating layer 31a, and the through conductor 33 is formed so as to be joined to the wiring conductor layer 32 of the lower organic insulating layer 31a.

For example, when the wiring conductor layer 32 is formed, the through conductor 33 may be formed simultaneously with the wiring conductor layer 32 by forming a base conductor layer and a main conductor layer on the inner surface of the through hole. If the plating thickness is increased when forming the main conductor layer, the through hole can be filled with the conductor. When the through conductor 33 and the wiring conductor layer 32 are formed simultaneously, the through hole is formed on the upper surface of the organic insulating layer 31a so that the base conductor layer can be satisfactorily formed on the inner surface of the through hole using a thin film forming method. It is preferable that the side opening diameter be larger.

  The through hole having such a shape is formed by adjusting the etching conditions when formed using an etching method, and by adjusting the output of the laser when formed using a laser processing method, In the case of using a photosensitive resin, it can be formed in a desired size or shape by adjusting exposure conditions or etching conditions. Further, the through conductor 33 may be formed simultaneously with the wiring conductor layer 32 or may be formed separately.

  Next, as shown in FIG. 3 (d), the laminated body 3 includes an insulating layer 31 (consisting of an organic insulating layer 31a and an adhesive layer 31b), an insulating layer 31, a wiring conductor layer 32, and a penetration as required. It is formed by repeatedly laminating a laminated structure composed of the conductors 33.

  Next, step 2 for preparing the ceramic substrate 1 will be described.

The ceramic insulating layer 11 of the ceramic substrate 1 includes an aluminum oxide (alumina: Al ₂ O ₃ ) sintered body, an aluminum nitride (AlN) sintered body, a silicon carbide (SiC) sintered body, and a mullite sintered body. Or it consists of ceramics, such as glass ceramics. As the ceramic substrate of the probe card circuit board, an aluminum oxide (Al ₂ O ₃ ) sintered material, glass ceramics, or mullite ceramics having a thermal expansion coefficient close to that of silicon (Si) forming a semiconductor element wafer is used. preferable. When the ceramic insulating layer 11 is made of such a ceramic material, when used as a probe card circuit board, the positional deviation due to the thermal expansion difference between the wafer and the wiring board becomes relatively small, which is preferable. .

  The ceramic substrate 1 is formed by simultaneously firing the ceramic wiring conductor layer 12 and the ceramic through conductor 13 together with the ceramic insulating layer 11. The ceramic wiring conductor layer 12 and the ceramic through conductor 13 are, for example, tungsten (W), molybdenum (Mo), molybdenum-manganese (Mo—Mn) alloy, silver (Ag), copper (Cu), gold (Au), or silver. -It consists of metallization which has metals, such as a palladium (Pd) alloy, as a main component.

  Such a ceramic substrate 1 is manufactured by the following method. For example, when the ceramic insulating layer 11 is formed of an aluminum oxide sintered body, the ceramic substrate 1 is first an organic binder suitable for raw material powders of aluminum oxide (alumina), silicon oxide, magnesium oxide and calcium oxide. And a solvent are added and mixed to form a slurry, and this is formed into a sheet shape by a doctor blade method or the like to produce a plurality of ceramic green sheets to be the ceramic insulating layer 11.

  Next, a through hole is formed at a predetermined position where the ceramic through conductor 13 of the ceramic green sheet is formed using a punching method using a die or the like or a laser processing method, and the through hole is filled with a conductive paste. Further, the ceramic wiring conductor layer 12 or a conductor paste layer serving as external wiring is formed to a thickness of 10 (μm) to 20 (μm) at a predetermined position of the ceramic green sheet by screen printing or the like. The conductive paste is produced by kneading a metal powder having a high melting point such as tungsten (W), molybdenum (Mo), or molybdenum-manganese (Mo-Mn) alloy with an appropriate resin binder and solvent.

  Finally, these ceramic green sheets are superposed and pressure-bonded to produce a laminate, and the laminate is fired at a high temperature of about 1500 (° C.) to 1600 (° C.), and both main surfaces are polished flat.

Similarly to the ceramic wiring conductor layer 12, the ceramic surface wiring 14 on the upper and lower surfaces of the ceramic substrate 1 may be formed by simultaneous firing with the ceramic insulating layer 11. Alternatively, the ceramic substrate 1 may be formed and flattened by polishing the upper surface thereof, and then formed using a metallization method such as a so-called Moriman method. Alternatively, the ceramic substrate 1 without the ceramic surface wiring 14 may be produced and formed using a thin film forming method such as a vapor deposition method, a sputtering method, or an ion plating method.

  When the metallization method is used, for example, a metal powder such as tungsten (W), molybdenum (Mo), or manganese (Mn), an appropriate resin binder, and a solvent are placed on a predetermined position of the ceramic substrate 1 by using a screen printing method or the like. And a heat treatment at a high temperature of 1400 (° C.) or higher.

  When the thin film forming method is used, for example, a chromium (Cr) -Cu alloy layer or titanium (Ti) having a thickness of about 0.1 (μm) to 3 (μm) is formed on the entire upper surface of the ceramic substrate 1. )-A base conductor layer made of a Cu alloy layer is formed, a resist film having a pattern-shaped opening of the ceramic surface wiring 14 is formed thereon, and copper or metal or the like is formed by plating or the like using this resist film as a mask. A main conductor layer made of metal and having a thickness of about 2 (μm) to 10 (μm) is formed. Then, the ceramic film 14 is formed by removing the resist film and removing the exposed portion of the underlying conductor layer by etching. The surface of the ceramic surface wiring 14 has a nickel plating layer having a thickness of about 1 (μm) to 10 (μm) and a thickness of 0.1 (μm) to prevent corrosion or connectivity with an external circuit. It is preferable to sequentially form a gold plating layer of about 3 (μm).

  Further, if the ceramic insulating layer 11 is made of glass ceramics, firing is performed by laminating a constrained green sheet mainly composed of alumina or the like on both sides of the laminate, which does not sinter and shrink at the temperature at which the ceramic green sheet is sintered. In this case, the ceramic green sheet is preferably suppressed by the constraining green sheet, so that the ceramic substrate 1 having a small shrinkage in the plane direction and a small shrinkage variation and good dimensional accuracy can be obtained.

  Next, step 3 for attaching the connection insulating layer 21 (resin adhesive layer 2) to the laminate 3 will be described.

  The resin adhesive layer 2 is formed with a first adhesive layer on one main surface of a resin material having thermoplasticity and a second adhesive layer on the other main surface. The first adhesive layer is selected from the group consisting of a polyamideimide resin, a polyimidesiloxane resin, a bismaleide resin, and an epoxy resin, and has thermosetting properties. The second adhesive layer is selected from the group consisting of a polyimide resin, a polyquinoline resin, a polyamideimide resin, an epoxy resin, and a fluororesin, and has thermosetting properties.

  The resin material is selected from the group consisting of glass epoxy resin, polyether ether ketone (PEEK) resin and polyimide resin.

  The resin material has a thermal expansion coefficient smaller than that of the first adhesive layer and that of the second adhesive layer. Thus, the resin material has a function of restraining deformation due to thermal expansion caused by heat treatment in the planar direction of the first adhesive layer and the second adhesive layer. The first adhesive layer and the second adhesive layer have thermosetting properties and are in a semi-cured state (B stage state) when formed on both surfaces of the resin material.

The laminated body 3 is formed on the plate 40 in the step 1, and as shown in FIG. 4A, the first adhesive layer overlaps the upper surface of the wiring conductor layer 32 of the laminated body 3. The connection insulating layer 21 (resin adhesive layer 2) is stacked on the substrate. Then, the heat-resistant film 50 is connected to the connection insulating layer 21.
The laminated body 3 and the connection insulating layer 21 are attached by being heat-treated at a temperature at which the first adhesive layer melts, overlaid on the (resin adhesive layer 2).

  Next, step 4 of forming a plurality of connection through conductors 22 in the connection insulating layer 21 (resin adhesive layer 2) will be described.

  As shown in FIG. 4B, the film 50 and the connection insulating layer 21 are irradiated with laser light to form holes so as to penetrate the connection insulating layer 21. The plurality of holes are formed in the connection insulating layer 21 so as to reach the wiring conductor layer 32.

  Next, as shown in FIG. 4C, a plurality of connection through conductors 22 are formed so as to penetrate the resin adhesive layer 2 by printing a paste of a conductive material in the plurality of holes. Thereafter, the resin adhesive layer 2 is formed by peeling the film 50 from the connection insulating layer 21.

  Next, step 5 for attaching the resin adhesive layer 2 provided on the laminate 3 to the ceramic substrate 1 will be described.

  As shown in FIG. 5A, the resin adhesive layer 2 created in step 4 is aligned with the upper surface of the ceramic substrate 1, and the second adhesive layer of the connection insulating layer 21 is melted and then cured. Heat treatment is performed under heating conditions of temperature and time. Thus, the laminate 3 is bonded to the upper surface of the ceramic substrate 1 via the resin adhesive layer 2 and is electrically connected to the ceramic substrate 1 via the connection through conductor 22. The heat treatment temperature is included in a temperature range of 180 (° C.) to 300 (° C.), for example. In the connection insulating layer 21, the first adhesive layer and the second adhesive layer are completely cured (C stage state) by this heat treatment.

  The plate 40 is removed from the organic insulating layer 31a. Further, when the plate 40 is made of a glass material or a silicon material, the plate 40 is removed from the stacked body 3 by using, for example, an etching method or the like.

  Finally, step 6 of forming the second through conductor 332, the third through conductor 333, and the terminal 34 in the multilayer body 3 will be described.

  The organic insulating layer 31a is irradiated with a laser to form a through-hole so as to reach from the uppermost organic insulating layer 31a of the multilayer body 3 to the wiring conductor layer 32 on the second organic insulating layer 31a. After that, the second through conductor 332 is formed by filling the through hole with a conductive material in the same manner as the first through conductor 331.

  Similarly, the organic insulating layer 31 a is irradiated with a laser to form a through hole so as to reach the wiring conductor layer 32 on the uppermost organic insulating layer 31 a of the multilayer body 3. Thereafter, the third through conductor 333 is formed by filling the through hole with a conductive material in the same manner as the first through conductor 331.

In the wiring configuration, the signal wiring is required to have a high-density wiring configuration, and the multilayer body 3 uses the second through conductor 332. For example, when the wiring conductor layer 32 (for example, power supply wiring or ground wiring) does not require a fine wiring configuration, the third through conductor 333 having a diameter larger than that of the second through conductor 332 may be used. I do not care.

The through conductor 33 exposed on the upper surface of the multilayer body 3 has a terminal 34 at the end of the upper surface. On the surface of the terminal 34, a nickel plating layer having a thickness of about 1 (μm) to 10 (μm) and a thickness of 0.1 (μm) to 3 (for preventing corrosion or connecting to an external circuit) A gold plating layer of about μm) is sequentially formed. Note that a wiring conductor layer may be formed as necessary, and a plating layer may be formed on the surface of the wiring conductor layer.

  Further, when the minimum diameter of the through conductor 33 is less than 20 (μm), the connection reliability is likely to decrease due to the stress between the uppermost organic insulating layer 31a and the lower organic insulating layer 31a. Therefore, in order to improve connection reliability, the wiring conductor layer 32 may be joined by the second through conductor 332 penetrating from the uppermost layer of the multilayer body 3 to the wiring conductor layer 32 on the second organic insulating layer 31. preferable.

  Through the above steps, the probe card circuit board of the present invention can be manufactured.

  The probe card of the present invention comprises the above-described probe card circuit board of the present invention and probe pins connected to the terminals 34 on the upper surface of the uppermost organic insulating layer 31a. The probe pin is produced, for example, as follows and attached to the probe card circuit board of the present invention. First, a female die of a plurality of probe pins is formed on one surface of a silicon wafer by etching, and a metal made of nickel is deposited on the surface on which the female die is formed using a plating method. Then, the female mold is embedded with nickel, and nickel on the wafer other than the embedded nickel is removed by using a process such as an etching method, so that a silicon wafer in which nickel probe pins are embedded is manufactured. Nickel probe pins embedded in the silicon wafer are bonded to the terminals 34 on the upper surface of the uppermost organic insulating layer 31a of the probe card circuit board by a bonding material such as solder. Then, the probe card is obtained by removing the silicon wafer with an aqueous potassium hydroxide solution.

<Embodiment 2>
A probe card circuit board and a probe card according to a second embodiment (referred to as a second embodiment) of the present invention, and a method for manufacturing the probe card circuit board will be described with reference to FIGS. 6-7, the same code | symbol is attached | subjected to the site | part similar to FIGS.

  In the probe card circuit board according to the second embodiment, for example, as shown in FIG. 6 and FIG. 7A which is an enlarged view of a main part B of the probe card circuit board, the entire second penetrating conductor 332 is formed inside the multilayer body 3. Is located. That is, the second through conductor 332 penetrates the plurality of organic insulating layers 31 a from the interlayer between the organic insulating layer 31 a and the adhesive layer 31 b located inside the multilayer body 3. The second through conductor 332 passes through at least one adhesive layer 31b located between the plurality of organic insulating layers 31a. In other matters, the probe card circuit board of the second embodiment is the same as the probe card circuit board of the first embodiment. In the following description, description of the same matters as in the first embodiment will be omitted.

  Also in the second embodiment, the terminals 34 are arranged on the stacked body 3. A probe is formed on the terminal 34. As a result, the probe card of the second embodiment is formed. Further, a circuit board (not shown) for connecting to a tester device is connected to the ceramic surface wiring 14 on the lower surface of the ceramic substrate 1. The probe card is connected to a tester to form a semiconductor device inspection device.

Even in the probe card circuit board according to the second embodiment, even if stress is generated between the upper organic insulating layer 31a and the lower organic insulating layer 31a (that is, between different organic insulating layers 31a). The through conductor 33 includes a second through conductor 332 that passes through the plurality of organic insulating layers 31a and is connected to the wiring conductor layer 32 of the lower organic insulating layer 31a. Since the joint portion with the layer 32 is separated from the interlayer, stress is hardly applied to the joint portion. Therefore, even if a stress is generated between the upper organic insulating layer 31a and the lower organic insulating layer 31a, the probe card circuit board is formed at the junction between the second through conductor 332 and the wiring conductor layer 32. Since peeling or breakage of the wiring can be suppressed, poor connection is less likely to occur. Therefore, also in the second embodiment, the multilayer body 3 can form a probe card circuit board having higher density wiring by using the second through conductor 332.

  The effect of suppressing this connection failure tends to be greater in the first embodiment than in the second embodiment. This is because the thermal stress that repeatedly acts on the joint between the through conductor 33 and the wiring conductor layer 32 between the organic insulating layers 31a is different from that of the uppermost organic insulating layer 31a and the organic insulating layer therebelow when the laminate 3 is manufactured. The number of operations is the highest between the layer 31a. Since this thermal stress is effectively reduced, the breakage of the through conductor 33 and the wiring conductor layer 32 is more effectively suppressed. That is, since the cutting is suppressed at the portion where the wiring is most likely to be cut, the reliability as the probe card circuit board can be more effectively improved.

  Also in the second embodiment, various modifications are possible as in the first embodiment. For example, as shown in FIG. 7B, the second through conductor 332 may protrude in the layer direction (direction parallel to the XY plane) over the entire circumference in the adhesive layer 31b. . That is, the second through conductor 332 may have a protruding portion that protrudes in the layer direction on the side surface.

  Also in this case, even if a stress is applied to the second through conductor 332 from the upper organic insulating layer 31a, the side protrusions relieve the stress applied in the vertical direction, so that the protrusions of the second through conductor 332 Since the stress is less likely to be transmitted to the lower side, the stacked body 3 is prevented from being poorly connected between the organic insulating layers 31a.

  Also in the second embodiment, the protruding portion of the second through conductor 332 can be formed by the same method as in the first embodiment. That is, by forming the through hole for the second through conductor 332 using the laser processing method, the thermal deformation temperature of the adhesive layer 31b is set lower than the thermal deformation temperature of the organic insulating layer 31a. A second through conductor 332 having a protruding portion can be formed. Also in this case, the organic insulating layer 31a is, for example, a polyimide resin, and the adhesive layer 31b is, for example, a polyamideimide resin.

  Next, a manufacturing method (step 1) of the probe card circuit board according to the second embodiment will be described with reference to FIG. The probe card circuit board according to the second embodiment is different from that according to the first embodiment only in a part of the laminate 3, and therefore only the method for producing the laminate 3 will be described. The method will be omitted. In addition, regarding the manufacturing method of the laminated body 3, the description of matters similar to those described in the first embodiment (step 2 and subsequent steps) will be omitted.

  First, as shown in FIG. 8A, an organic insulating layer 31 a that becomes the uppermost organic insulating layer 31 a when completed is fixed on the plate 40. The organic insulating layer 31a can be fixed by the same method using the same material as in the first embodiment.

  Next, as shown in FIG. 8B, the wiring conductor layer 32 is formed on the organic insulating layer 31a by the same method using the same material as in the first embodiment, for example.

Next, as shown in FIG. 8C, the insulating layer 31 composed of the organic insulating layer 31a and the adhesive layer 31b adheres to the first organic insulating layer 31a and the wiring conductor layer 32 formed on the surface thereof. Is done. The organic insulating layer 31a and the wiring conductor layer 32 are also formed by the same method using the same material as in the first embodiment.

  Further, the through conductor 33 is formed so as to be joined to the wiring conductor layer 32 of the lower organic insulating layer 31a. The through conductor 33 is also formed by the same material and method as in the first embodiment, for example.

  Next, as shown in FIG. 8D, another insulating layer 31 (consisting of an organic insulating layer 31a and an adhesive layer 31b), a wiring conductor layer 32, and a through conductor 33 are repeatedly laminated. At that time, the second through conductor 332 is formed. The second through conductor 332 includes, for example, a plurality of organic insulating layers 31a and downward from the upper surface of the organic insulating layer 31a or the adhesive layer 31b that is positioned at the uppermost layer when the second through conductor 332 is formed. It is formed to continuously penetrate at least one adhesive layer 31b. In the example of FIG. 8D, the second through conductor 332 is formed so as to continuously penetrate the two organic insulating layers 31a and the adhesive layer 31b from the uppermost organic insulating layer 31a.

  The second through conductor 332 formed in FIG. 8D is also made of the same laser processing using the same material as in the first embodiment (second through conductor 332 in the example of FIG. 5), for example. It can be formed by a method such as a method.

  The laminate 3 produced as described above is laminated on the same ceramic substrate 1 as in the first embodiment in the same manner as in the first embodiment, whereby the probe card substrate in the second embodiment is obtained. Can be produced.

  Further, as described above, the probe card is manufactured by attaching the probe to the probe card circuit board. Also, the probe card is electrically connected to the tester to form a semiconductor device inspection device.

  The present invention is not particularly limited to the above-described first embodiment (including modifications) and second embodiment, and various modifications and improvements can be made within the scope of the present invention. For example, in any of the first and second embodiments, the second through conductor 32 may continuously penetrate three or more insulating layers 31 (the organic insulating layer 31a and the adhesive layer 31b). The probe card circuit board according to the first embodiment may further include a second through conductor 332 similar to the probe card circuit board according to the second embodiment.

DESCRIPTION OF SYMBOLS 1 ... Ceramic substrate 11 ... Ceramic insulating layer 12 ... Ceramic wiring conductor layer 13 ... Ceramic through conductor 14 ... Ceramic surface wiring 2 ... Resin adhesive layer 21... Connection insulating layer 22... Connection through conductor 3 .. Laminated body 31... Insulating layer 31 a. Conductor layer 33 ... through conductor 331 ... first through conductor 332 ... second through conductor 333 ... third through conductor 34 ... terminal

Claims (4)

A ceramic substrate;
A laminate in which a plurality of organic insulating layers are provided on the ceramic substrate via a resin adhesive layer, and are laminated via an adhesive layer;
A wiring conductor layer provided on the lower surface of the organic insulating layer;
A through conductor provided in the thickness direction of the organic insulating layer and electrically connected to at least one of the wiring conductor layers;
The penetrating conductor includes a first penetrating conductor penetrating one organic insulating layer and one adhesive layer, a plurality of organic insulating layers and at least one adhesive layer penetrating the second through conductor. A circuit board for a probe card comprising a through conductor. The first through conductor electrically connects the upper and lower wiring conductor layers,
The second through conductor is provided across the plurality of organic insulating layers and the adhesive layer below the upper surface of the multilayer body, and a lower end portion thereof is electrically connected to the wiring conductor layer. The probe card circuit board according to claim 1.   3. The probe card circuit board according to claim 1, wherein at least part of the side surface of the second through conductor protrudes in the layer direction over the entire circumference in the adhesive layer. 4. A circuit board for a probe card according to any one of claims 1 to 3,
A probe card comprising a probe pin connected to a terminal on the upper surface of the organic insulating layer.

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