JP2015139340A - power converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power converter capable of suppressing distortion of current caused by changeover of a drive mode.SOLUTION: A first inverter unit 20 is connected between one ends 111, 121, 131 of coils 11 to 13 and a first battery 41. A second inverter unit 30 is connected between the other ends 112, 122, 132 of the coils 11 to 13 and a second battery 42. A changeover control unit 65 performs distortion reduction processing of reducing distortion in current applied to the coils 11 to 13 in performing changeover from a pre-changeover mode of any of a first low voltage mode in which the first battery 41 is charged/discharged, a second low voltage mode in which the second battery 42 is charged/discharged, and a high voltage mode in which both first battery 41 and second battery 42 are charged/discharged together to a post-changeover mode which is a drive mode differing from the pre-changeover mode. Distortion of each phase current Iu, Iv, Iw accompanying the changeover of the drive mode can be reduced because the distortion reduction processing is performed in the changeover of the drive mode.

Description

  The present invention relates to a power conversion device.

  Conventionally, an inverter drive system that converts electric power of a motor by two inverters is known. For example, in Patent Document 1, the phase of a fundamental wave component of a pulse width modulation signal (hereinafter, pulse width modulation is referred to as “PWM”) of the first inverter system and the second inverter system at a high voltage is 180 [°. By shifting, the two power supplies are electrically connected in series, and the motor is driven by the sum of the two power supply voltages. Further, in Patent Document 1, at the time of low voltage, either one of the upper arm or the lower arm of the first inverter system or the second inverter system is simultaneously turned on for three phases, and the other is PWM driven.

JP 2006-238686 A

When the applied voltage applied to the motor is changed by switching the switching state of the two inverters as in Patent Document 1, the overcurrent caused by the distortion of the current applied to the motor with the switching of the switching state. May occur.
The present invention has been made in view of the above-described problems, and an object thereof is to provide a power conversion device capable of suppressing current distortion due to switching of drive modes.

The power conversion device of the present invention converts power of a motor generator having a winding, and includes a first inverter unit, a second inverter unit, and a control unit.
The first inverter unit has a first switching element provided corresponding to each phase of the winding, and is connected between one end of the winding and the first voltage source. The second inverter unit has a second switching element provided corresponding to each phase of the winding, and is connected between the other end of the winding and the second voltage source.

The control unit controls the on / off operation of the first switching element and the second switching element. The control unit includes drive mode selection means and distortion reduction means.
The drive mode selection means is configured to change the first low-voltage mode in which the first voltage source is charged / discharged, the second low-voltage mode in which the second voltage source is charged / discharged, One of the high voltage modes in which the voltage source and the second voltage source are charged and discharged is selected.
The distortion reducing means switches from the pre-switching mode that is one of the first low-voltage mode, the second low-voltage mode, or the high-voltage mode to a post-switching mode that is a driving mode different from the pre-switching mode. Then, distortion reduction processing is performed to reduce distortion of the current applied to the winding.

  In the present invention, the switching loss is suppressed by selecting the drive mode according to the rotational speed and torque of the motor generator. In addition, since distortion reduction processing is performed when switching the drive mode, it is possible to reduce distortion of each phase current that accompanies switching of the drive mode. In particular, when the voltage that can be applied to the winding is higher in the drive mode after switching, when the drive mode is switched, the current is distorted toward the side where each phase current becomes larger. In the present invention, distortion of each phase current is reduced by performing the distortion reduction process, so that overcurrent is suppressed and the peak of the surge voltage can be reduced. Thereby, since the pressure | voltage resistance of the insulating film of a coil | winding can be lowered | hung, the film thickness of a coil | winding can be reduced and a physique can be reduced in size.

It is a schematic block diagram which shows the structure of the power converter device of 1st Embodiment of this invention. It is explanatory drawing explaining the direction of each phase current and the voltage between phases in the power converter device of 1st Embodiment of this invention. It is explanatory drawing explaining switching of the drive mode in 1st Embodiment of this invention. It is explanatory drawing explaining the low voltage mode in 1st Embodiment of this invention. It is explanatory drawing explaining the drive voltage in the low voltage mode of 1st Embodiment of this invention. It is explanatory drawing explaining the high voltage mode in 1st Embodiment of this invention. It is explanatory drawing explaining the drive voltage in the high voltage mode of 1st Embodiment of this invention. It is explanatory drawing explaining the switching permission timing in 1st Embodiment of this invention. It is explanatory drawing explaining the overcurrent reduction effect in 1st Embodiment of this invention. It is explanatory drawing explaining switching of the drive mode in 2nd Embodiment of this invention. It is explanatory drawing explaining the drive voltage in the 1st low voltage mode of 2nd Embodiment of this invention. It is explanatory drawing explaining the drive voltage in the 2nd low voltage mode of 2nd Embodiment of this invention. It is explanatory drawing explaining the drive voltage in the high voltage mode of 2nd Embodiment of this invention. It is explanatory drawing explaining the relationship between the switching voltage width and current distortion by 2nd Embodiment of this invention. It is explanatory drawing explaining the differential voltage mode in 2nd Embodiment of this invention. It is explanatory drawing explaining the drive voltage in the differential voltage mode of 2nd Embodiment of this invention. It is a flowchart explaining the drive mode switching process by 2nd Embodiment of this invention. It is a system diagram which shows the structure of the power converter device by 3rd Embodiment of this invention. It is a flowchart explaining the drive mode switching process by 3rd Embodiment of this invention. It is a flowchart explaining the drive mode switching process by 4th Embodiment of this invention.

Hereinafter, a power converter according to the present invention will be described with reference to the drawings. Hereinafter, in a plurality of embodiments, the same numerals are given to the substantially same composition, and explanation is omitted.
(First embodiment)
As shown in FIG. 1, the power conversion device 1 according to the first embodiment of the present invention converts power of a motor generator (hereinafter referred to as “MG”) 10.
The MG 10 is applied to an electric vehicle such as an electric vehicle or a hybrid vehicle, for example, and generates torque for driving drive wheels (not shown). The MG 10 has a function as an electric motor for driving the drive wheels, and a function as a generator that generates power by being driven by kinetic energy transmitted from an engine or drive wheels (not shown).

  The MG 10 is a three-phase AC motor, and includes a U-phase coil 11, a V-phase coil 12, and a W-phase coil 13. U-phase coil 11, V-phase coil 12 and W-phase coil 13 correspond to “windings”. Hereinafter, the U-phase coil 11, the V-phase coil 12, and the W-phase coil 13 are referred to as "coils 11 to 13" as appropriate. Further, the current supplied to the U-phase coil 11 is referred to as U-phase current Iu, the current supplied to the V-phase coil 12 is referred to as V-phase current Iv, and the current supplied to the W-phase coil 13 is referred to as W-phase current Iw. The phase current Iu, the V-phase current Iv, and the W-phase current Iw are appropriately referred to as “each phase current Iu, Iv, Iw”.

The power conversion device 1 includes a first inverter unit 20, a second inverter unit 30, a control unit 60, and the like.
The first inverter unit 20 is a three-phase inverter, and switches U1 upper arm element 21, V1 upper arm element 22, W1 upper arm element 23, U1 below, which are six switching elements to switch energization to the coils 11 to 13. The arm element 24, the V1 lower arm element 25, and the W1 lower arm element 26 are bridge-connected.

The U1 upper arm element 21 is connected to the high potential side of the U1 lower arm element 24. The V1 upper arm element 22 is connected to the high potential side of the V1 lower arm element 25. The W1 upper arm element 23 is connected to the high potential side of the W1 lower arm element 26.
The first inverter unit 20 is connected between one ends 111, 121, and 131 of the coils 11 to 13 and a first battery 41 as a first voltage source. Specifically, a connection point 27 between the U1 upper arm element 21 and the U1 lower arm element 24 is connected to one end 111 of the U-phase coil 11. A connection point 28 between the V1 upper arm element 22 and the V1 lower arm element 25 is connected to one end 121 of the V-phase coil 12. Furthermore, a connection point 29 between the W1 upper arm element 23 and the W1 lower arm element 26 is connected to one end 131 of the W-phase coil 13.

  The second inverter unit 30 is a three-phase inverter, and switches the U2 upper arm element 31, the V2 upper arm element 32, the W2 upper arm element 33, and the lower U2 that are six switching elements in order to switch the energization to the coils 11-13. The arm element 34, the V2 lower arm element 35, and the W2 lower arm element 36 are bridge-connected.

The U2 upper arm element 31 is connected to the high potential side of the U2 lower arm element 34. The V2 upper arm element 32 is connected to the high potential side of the V2 lower arm element 35. The W2 upper arm element 33 is connected to the high potential side of the W2 lower arm element 36.
The second inverter unit 30 is connected between the other ends 112, 122, and 132 of the coils 11 to 13 and the second battery 42 as a second voltage source. Specifically, a connection point 37 between the U2 upper arm element 31 and the U2 lower arm element 34 is connected to the other end 112 of the U-phase coil 11. A connection point 38 between the V2 upper arm element 32 and the V2 lower arm element 35 is connected to the other end 122 of the V-phase coil 12. Furthermore, a connection point 39 between the W2 upper arm element 33 and the W2 lower arm element 36 is connected to the other end 132 of the W-phase coil 13.

Thus, in this embodiment, the 1st inverter part 20 and the 2nd inverter part 30 are connected to the both ends of the coils 11-13.
In the present embodiment, the U1 upper arm element 21, the V1 upper arm element 22, the W1 upper arm element 23, the U1 lower arm element 24, the V1 lower arm element 25, and the W1 lower arm element 26 are designated as “first switching elements”. Correspondingly, the U2 upper arm element 31, the V2 upper arm element 32, the W2 upper arm element 33, the U2 lower arm element 34, the V2 lower arm element 35, and the W2 lower arm element 36 correspond to the “second switching element”. . Hereinafter, the switching element is appropriately referred to as “SW element”.
The SW elements 21 to 26 and 31 to 36 of the present embodiment are IGBTs (Insulated Gate Bipolar Transistors), but may be MOS (Metal Oxide Semiconductor) transistors, bipolar transistors, or the like, for example.

The first battery 41 is a chargeable / dischargeable DC power supply, and is connected to the first inverter unit 20.
The second battery 42 is a chargeable / dischargeable DC power source and is connected to the second inverter unit 30.

If the voltage value of the first battery 41 is the first voltage value E1 and the voltage value of the second battery 42 is the second voltage value E2, in the present embodiment, the first voltage value E1 and the second voltage value E2 are equal. That is, E1 = E2.
In the first embodiment, the first battery 41 and the second battery 42 are described as one DC power source. However, for example, a plurality of DC power sources may be connected in parallel or in series. It may be configured to include a boost converter that does not.

The first capacitor 51 is connected in parallel with the first battery 41, and supplies a current supplied from the first battery 41 to the SW elements 21 to 26 or a current supplied from the SW elements 21 to 26 to the first battery 41. A smoothing capacitor for smoothing.
The second capacitor 52 is connected in parallel with the second battery 42 and receives a current supplied from the second battery 42 to the SW elements 31 to 36 or a current supplied from the SW elements 31 to 36 to the second battery 42. A smoothing capacitor for smoothing.

  The current detection unit 55 detects the phase currents Iu, Iv, and Iw that are supplied to the phases of the coils 11 to 13. The current detection unit 55 is not necessarily provided in all three phases, but may be provided in at least two phases.

  Here, if the combination of the first inverter unit 20 and the first battery 41 is the first system 100 and the combination of the second inverter unit 30 and the second battery 42 is the second system 200, the first system is connected to one side of the MG 10. 100 is provided, and the second system 200 is provided on the other side.

The control unit 60 is configured as a normal computer, and includes a CPU, a ROM, a RAM, an I / O, a bus line that connects these configurations, and the like.
The control unit 60 includes a first control signal generation unit 61, a second control signal generation unit 62, and a switching control unit 65.

  The first control signal generation unit 61 generates a first control signal for controlling the on / off operation of the SW elements 21 to 26 of the first inverter unit 20 and outputs the first control signal to the SW elements 21 to 26. The second control signal generation unit 62 generates a second control signal for controlling the on / off operation of the SW elements 31 to 36 of the second inverter unit 30 and outputs the second control signal to the SW elements 31 to 36.

  The switching control unit 65 selects a driving mode based on the rotation speed and torque of the MG 10 and controls switching of the driving mode. The first control signal generation unit 61 and the second control signal generation unit 62 generate a first control signal and a second control signal according to the drive mode and switching timing selected by the switching control unit 65.

Here, prior to the description of switching of the drive mode of the MG 10, the phase currents Iu, Iv, Iw and the interphase voltage will be described with reference to FIG. In FIG. 2, the description of the control unit 60 and the like is omitted. The same applies to FIG.
In the present embodiment, the current flowing from the first inverter unit 20 side through the coils 11 to 13 to the second inverter unit 30 side is positive, and the first inverter from the second inverter unit 30 side through the coils 11 to 13 is used. The current flowing to the part 20 side is negative.

  Further, the V-phase reference U-V interphase voltage on the first inverter unit 20 side is U1-V1, the W-phase reference V-W inter-phase voltage is V1-W1, and the U-phase reference W-U is between The interphase voltage is W1-U1. Further, the U-V interphase voltage on the second inverter section 30 side is U2-V2, the V-phase reference V-W interphase voltage is V2-W2, and the W-phase reference W-U is on. The interphase voltage is W2-U2. That is, U1-V1 and U2-V2, V1-W1 and V2-W2, and W1-U1 and W2-U2 have opposite directions.

  Subsequently, the drive mode of the MG 10 will be described. When the MG 10 is driven, there are a rotational speed limit and a torque limit depending on the drive voltage. If the drive voltage is large, output at high rotation and high torque is possible. On the other hand, when the drive voltage is large, the switching loss in the first inverter unit 20 and the second inverter unit 30 increases.

  Therefore, in the present embodiment, the drive mode is switched according to the rotation speed and torque of the MG 10. In the present embodiment, as shown in FIG. 3, in the region A where the rotational speed and torque of the MG 10 are smaller than the solid line T11, the low voltage mode is set to suppress the switching loss. Further, in the region B where the rotation speed and torque of the MG 10 are between the solid line T11 and the solid line T12, the high voltage mode is set and a high rotation speed and high torque are output.

  Hereinafter, each drive mode will be described. In the following description, the case where electric power is supplied from at least one of the first battery 41 and the second battery 42 and the MG 10 functions as an electric motor will be mainly described. The same applies to the case where the battery 41 and the second battery 42 are charged.

First, the low voltage mode will be described with reference to FIGS. In FIG. 4, SW elements that are turned on are indicated by solid lines, and SW elements that are turned off are indicated by broken lines.
As shown in FIG. 4, in the low voltage mode, one of the first inverter unit 20 or the second inverter unit 30 is neutralized, and the other of the first inverter unit 20 or the second inverter unit 30 that is not neutralized. One-sided power supply by Here, the second inverter unit 30 is neutralized, the drive mode for switching the first inverter unit 20 is “first low voltage mode”, the first inverter unit 20 is neutralized, and the second inverter unit 30 is The driving mode for switching is referred to as a “second low voltage mode”.

FIG. 4A is an example of the first low voltage mode. In the example shown in FIG. 4A, the upper arm elements 31 to 33 of the second inverter section 30 are turned on simultaneously for three phases, and the lower arm elements 34 to 36 are turned off simultaneously for three phases. Thereby, the 2nd inverter part 30 side is neutralized.
The first inverter unit 20 is PWM-controlled based on a fundamental wave based on a voltage command and a carrier wave such as a triangular wave. Here, the PWM control includes “sine wave PWM control” in which the amplitude of the fundamental wave is equal to or less than the amplitude of the carrier wave, and “overmodulation PWM control” in which the amplitude of the fundamental wave is larger than the amplitude of the carrier wave.

  In the example illustrated in FIG. 4A, the second inverter unit 30 side can be regarded as a neutral point, and therefore the MG 10 is driven by the first battery 41. At this time, the phase voltage U1-V1, V1-W1, W1-U1 on the first inverter unit 20 side has a pulse height equal to the first voltage value E1 of the first battery 41. Further, the interphase voltages U2-V2, V2-W2, and W2-U2 on the second inverter section 30 side that are neutralized are all zero. Therefore, as shown in FIG. 5 (a), the drive voltage U-V applied to the MG 10 is the sum of the interphase voltages U1-V1 and U2-V2, and therefore, as with the interphase voltage U1-V1, The height is the first voltage value E1 of the first battery 41. Similarly, the drive voltages V-W and W-U have the first voltage value E <b> 1 of the first battery 41 with the pulse height similar to the interphase voltages V <b> 1-W <b> 1 and W <b> 1-U <b> 1.

FIG. 4B is an example of the second low voltage mode. In the example shown in FIG. 4B, the 20 upper arm elements 21 to 23 of the first inverter unit 20 are turned on simultaneously for three phases, and the lower arm elements 24 to 26 are turned off simultaneously for three phases. Thereby, the 1st inverter part 20 side is neutralized.
The second inverter unit 30 is PWM-controlled based on a fundamental wave based on a voltage command and a carrier wave such as a triangular wave.

  In the example shown in FIG. 4B, since the first inverter unit 20 side can be regarded as a neutral point, the MG 10 is driven by the second battery 42. At this time, the interphase voltages U <b> 2-V <b> 2, V <b> 2-W <b> 2, W <b> 2-U <b> 2 on the second inverter section 30 side have the pulse width height equal to the second voltage value E <b> 2 of the second battery 42. Further, the interphase voltages U1-V1, V1-W1, and W1-U1 on the first inverter unit 20 side that are neutralized are all zero. Therefore, as shown in FIG. 5B, the drive voltages U-V, V-W, and W-U applied to the MG 10 are similar to the interphase voltages U2-V2, V2-W2, and W2-U2, respectively. The height is the second voltage value E2 of the second battery 42.

  In the present embodiment, since the first voltage value E1 of the first battery 41 and the second voltage value E2 of the second battery 42 are equal, the maximum voltage that can be applied to the coils 11 to 13 in the first low voltage mode, The maximum voltage that can be applied to the coils 11 to 13 in the second low voltage mode is equal. For this reason, in the low voltage mode, either the first low voltage mode or the second low voltage mode may be used. Further, for example, the first low voltage mode and the second low voltage mode may be appropriately switched according to a predetermined time, loss of the SW elements 21 to 26, 31 to 36, or the like. Thereby, the bias of the loss of the SW elements 21 to 26 and 31 to 36 can be reduced.

  4A, the upper arm elements 31 to 33 of the second inverter unit 30 are simultaneously turned on for three phases and the lower arm elements 34 to 36 are simultaneously turned off for three phases. Can be neutralized by turning off the three phases simultaneously and turning on the lower arm elements 34 to 36 simultaneously. Therefore, even if the state where the upper arm elements 31 to 33 are on and the state where the lower arm elements 34 to 36 are off and the state where the upper arm elements 31 to 33 are off and the lower arm elements 34 to 36 are on are appropriately switched. Good.

Similarly, in FIG. 4B, the upper arm elements 21 to 23 of the first inverter unit 20 are turned on simultaneously for three phases, and the lower arm elements 24 to 26 are turned off simultaneously for three phases. The first inverter unit 20 side can also be neutralized by turning off 23 simultaneously for three phases and simultaneously turning on lower arm elements 24 to 26 for three phases. Therefore, even when the upper arm elements 21 to 23 are turned on and the lower arm elements 24 to 26 are turned off, and the upper arm elements 21 to 23 are turned on and the lower arm elements 24 to 26 are turned on as appropriate. Good.
As a result, it is possible to reduce heat generation due to the on-state of a specific element being continued and uneven heat loss between elements.

Next, the high voltage mode will be described with reference to FIGS.
In the high voltage mode, the first inverter unit 20 and the second inverter unit 30 are PWM-controlled based on the fundamental wave and the carrier wave based on the voltage command.

  In the high voltage mode, the fundamental wave relating to the driving of the first inverter unit 20 and the fundamental wave relating to the driving of the second inverter unit 30 are inverted in phase. In other words, the fundamental wave related to the driving of the first inverter unit 20 and the fundamental wave related to the driving of the second inverter unit 30 are out of phase by approximately 180 [°]. The phase difference between the fundamental wave related to driving the first inverter unit 20 and the fundamental wave related to driving the second inverter unit 30 is a voltage corresponding to the state in which the first battery 41 and the second battery 42 are connected in series. Can be applied to the coils 11 to 13, a slight deviation from 180 [°] is allowed and is included in the concept of “the phase of the fundamental wave is inverted”. By inverting the fundamental wave phase, the first inverter unit 20 and the second inverter unit 30 make the SW element turned on in each phase upside down.

  For example, as shown in FIG. 6, in the first inverter unit 20, when the U-phase upper arm element 21 is turned on and the V-phase and W-phase lower arm elements 25, 26 are turned on, , The U-phase lower arm element 24 is turned on, and the V-phase and W-phase upper arm elements 32, 33 are turned on. At this time, since a current flows through a path indicated by an arrow Y1, the MG 10 is driven by a voltage obtained by connecting the first battery 41 and the second battery 42 in series. Therefore, as shown in FIG. 7, the drive voltages UV, VW, and WU applied to the MG 10 have a pulse height that is the sum of the first voltage value E1 and the second voltage value E2. E1 + E2.

  In the high voltage mode, when the MG 10 is powered, both the first battery 41 and the second battery 42 are discharged. Further, when the MG 10 is regenerated, both the first battery 41 and the second battery 42 are charged. In the low voltage mode, the first battery 41 or the second battery 42 on the PWM controlled side is charged or discharged.

As described above, in the low voltage mode, the MG 10 is driven with the first voltage value E1 or the second voltage value E2, and in the high voltage mode, the MG 10 is the sum of the first voltage value E1 and the second voltage value E2 (that is, E1 + E2). Is driven. Therefore, when the drive mode is switched, the voltage applied to the coils 11 to 13 changes, and thus current distortion occurs. If the current distortion becomes large, there is a risk that problems such as dielectric breakdown due to a surge voltage may occur, or drive quality may be degraded due to vibrations caused by torque ripple.
In order to avoid dielectric breakdown due to the surge voltage, it is necessary to increase the thickness of the insulating film of the coils 11 to 13 in accordance with the surge voltage accompanying switching of the drive mode. For example, if the surge voltage increases by 30%, it is necessary to increase the thickness of the insulating film by about 20%, which increases the size.

  Therefore, in the present embodiment, the switching control unit 65 controls the drive mode switching timing so that the maximum value of the surge voltage can be reduced. Specifically, the switching control unit 65 sets the switching permission timing at a timing shifted from the peak of each phase current Iu, Iv, Iw based on each phase current Iu, Iv, Iw detected by the current detection unit 55. Switch the drive mode.

  More specifically, if each phase current Iu, Iv, Iw is an ideal sine wave, the positive peak of any one of the U phase, V phase, and W phase and the positive peak Adjacent to the negative peak of the other phase is shifted by 60 [°] in electrical angle. Therefore, in the present embodiment, the drive mode is switched at a switching permission timing that is shifted by 30 [°] in electrical angle from the peak of each phase current Iu, Iv, Iw. Note that the timing shifted by 30 [°] in electrical angle from the peak of each phase current Iu, Iv, Iw corresponds to “intermediate timing of adjacent peaks”.

In FIG. 8, in the first low voltage mode, the timing shifted by 30 ° as the electrical angle from the peak of each phase current Iu, Iv, Iw is indicated by a two-dot chain line. That is, the timing indicated by the two-dot chain line in FIG. 8 is the switching permission timing. The switching permission timing may be regarded as a timing at which any one of the phase currents Iu, Iv, and IW becomes zero.
In the present embodiment, the switching control unit 65 selects a drive mode based on the rotation speed and torque of the MG 10. For example, when the drive mode is switched from the first low voltage mode to the high voltage mode, the drive mode is switched at a switching permission timing indicated by a two-dot chain line in FIG.

FIG. 9 shows the U-phase current Iu when the drive mode is switched from the low voltage mode to the high voltage mode at a timing shifted by 30 [°] as an electrical angle from the peak of the U-phase current Iu. The U-phase current Iu when switched at the peak of Iu is indicated by a broken line L2. As shown in FIG. 9, by switching the drive mode at a timing shifted by 30 [°] as an electrical angle from the peak of the U-phase current Iu, compared with the case of switching the drive mode at the peak of the U-phase current Iu, The maximum value of U-phase current Iu is reduced by ΔIu, and the overcurrent of U-phase current Iu is reduced. The same applies to the V-phase current Iv and the W-phase current Iw.
As a result, current distortion caused by switching from the low voltage mode to the high voltage mode can be reduced, and thus the maximum value of the surge voltage can be reduced. Further, it is possible to reduce torque ripple associated with switching of the drive mode.

  When switching from the low voltage mode to the high voltage mode, the current is distorted in the direction in which the current increases. Therefore, the current distortion is reduced by shifting the drive mode switching timing from the peak of each phase current Iu, Iv, Iw. In addition, the overcurrent is reduced as shown in FIG. On the other hand, when switching from the high voltage mode to the low voltage mode, the current is distorted in the direction of decreasing the current, so there is no overcurrent suppressing effect by shifting the drive mode switching timing from the peak of each phase current Iu, Iv, Iw. However, current distortion can be reduced, and torque ripple can be reduced.

As described above in detail, the power conversion device 1 of the present embodiment converts the power of the MG 10 having the coils 11 to 13, and includes the first inverter unit 20, the second inverter unit 30, and the control unit. 60.
The first inverter unit 20 includes SW elements 21 to 26 provided corresponding to the respective phases of the coils 11 to 13, and is connected between one end 111, 121, 131 of the coils 11 to 13 and the first battery 41. Is done.
The second inverter unit 30 includes SW elements 31 to 36 provided corresponding to the phases of the coils 11 to 13, and is provided between the other ends 112, 122, and 132 of the coils 11 to 13 and the second battery 42. Connected.

The control unit 60 controls the on / off operation of the SW elements 21 to 26 and 31 to 36. The control unit 60 includes a switching control unit 65.
The switching control unit 65 includes a first low voltage mode in which the first battery 41 is charged / discharged, a second low voltage mode in which the second battery 42 is charged / discharged, or the first battery according to the rotation speed and torque of the MG 10. One of the drive modes of the high voltage mode in which both 41 and the second battery 42 are charged and discharged is selected.

  Further, the switching control unit 65 switches from the pre-switching mode that is one of the first low-voltage mode, the second low-voltage mode, or the high-voltage mode to a post-switching mode that is a driving mode different from the pre-switching mode. At this time, a distortion reduction process for reducing the distortion of the current supplied to the coils 11 to 13 is performed.

  In this embodiment, the switching loss is suppressed by selecting the drive mode according to the rotation speed and torque of the MG 10. In addition, since distortion reduction processing is performed when the drive mode is switched, distortion of each phase current Iu, Iv, Iw accompanying switching of the drive mode can be reduced, and torque ripple can be reduced.

  In particular, when the voltage that can be applied to the coils 11 to 13 is higher in the drive mode after switching, when the drive mode is switched, the current is distorted to the side where the phase currents Iu, Iv, and Iw become larger. In the present embodiment, distortion of each phase current is reduced by performing the distortion reduction processing, so that overcurrent is suppressed and the peak of the surge voltage can be reduced. Thereby, since the withstand pressure | voltage of the insulating film of the coils 11-13 can be lowered | hung, the thin film of the coils 11-13 is possible, and a physique can be reduced in size.

The distortion reduction process in the present embodiment is a switching timing adjustment process, and the switching control unit 65 is a timing deviated from the peak of each phase current Iu, Iv, IW energized in each phase of the coils 11-13. At the switching permission timing, the mode is switched from the pre-switching mode to the post-switching mode. In the present embodiment, the switching permission timing is an intermediate timing between adjacent peaks.
Thereby, the peak value of each phase current Iu, Iv, Iw can be suppressed rather than the case where the drive mode is switched at the peak of each phase current Iu, Iv, Iw.

Further, when the maximum voltage that can be applied to the coils 11 to 13 is larger in the post-switching mode than in the pre-switching mode, the distortion reduction processing is performed. Specifically, when the drive mode is switched from the first low voltage mode or the second low voltage mode to the high voltage mode, a distortion reduction process is performed. Thereby, the peak value of each phase current Iu, Iv, Iw by current distortion can be suppressed.
In the present embodiment, the switching control unit 65 constitutes “drive mode selection means” and “distortion reduction means”.

(Second Embodiment)
The power converter device by 2nd Embodiment of this invention is demonstrated based on FIGS.
The power converter of this embodiment has the same circuit configuration as that of the first embodiment, but the first voltage value E1 that is the voltage value of the first battery 41 and the second voltage value that is the voltage value of the second battery 42. E2 is different from the first embodiment. In the present embodiment, the second voltage value E2 is greater than twice the first voltage value E1. That is, E2> 2 × E1.

  In the present embodiment, as shown in FIG. 10, in the region D where the rotational speed and torque of the MG 10 are smaller than the solid line T21, the second inverter unit 30 is set to the first low-voltage mode to neutralize, and the rotational speed of the MG 10 and In a region E where the torque is between the solid lines T21 and T22, the second low-voltage mode in which the first inverter unit 20 is neutralized is set, and in a region F between the solid lines T22 and T23, the rotation speed and torque are high. Set to voltage mode. In this embodiment, the mode in which the inverter portion on the higher voltage side is neutralized and driven by the voltage source on the lower voltage side is the first low voltage mode, and the inverter portion on the lower voltage side is neutralized. It can also be understood that the mode driven by the voltage source on the higher voltage side is the second low voltage mode.

The drive voltage in the first low voltage mode according to the present embodiment is shown in FIG. 11, the drive voltage in the second low voltage mode is shown in FIG. 12, and the drive voltage in the high voltage mode is shown in FIG.
As shown in FIG. 11, in the first low voltage mode, the height of the drive voltage pulse becomes the first voltage value E1. Also, as shown in FIG. 12, in the second low voltage mode, the pulse height of the drive voltage becomes the second voltage value E2. In the present embodiment, since the first voltage value E1 and the second voltage value E2 are different, the voltages applied to the coils 11 to 13 are different between the first low voltage mode and the second low voltage mode. As shown in FIG. 13, in the high voltage mode, the pulse height of the drive voltage is the sum of the first voltage value E1 and the second voltage value E2.

As described in the first embodiment, the phase currents Iu, Iv, and Iw are distorted as the drive mode is switched. Further, the distortion of the current accompanying the switching of the drive mode is larger as the voltage fluctuation range is larger.
Here, the difference between the maximum voltage that can be applied to the coils 11 to 13 in the drive mode before switching and the maximum voltage that can be applied to the coils 11 to 13 in the driving mode after switching is defined as a switching voltage width, FIG. 14 shows the relationship between the distortion of each phase current Iu, Iv, Iw. In FIG. 14, the case where the switching voltage width is relatively small is indicated by a solid line, and the case where the switching voltage width is large is indicated by a broken line.
As shown in FIG. 14, the distortion of the U-phase current Iu associated with the switching of the drive mode is smaller when the switching voltage width is small than when the switching voltage width is large. Although FIG. 14 shows the U-phase current Iu, the same applies to the V-phase current Iv and the W-phase current Iw.

  In the present embodiment, the second voltage value E2 is greater than twice the first voltage value E1. Therefore, the difference between the second voltage value E2 and the first voltage value E1 is larger than the first voltage value E1 and smaller than the second voltage value E2. That is, E1 <(E2-E1) <E2. Therefore, when switching between the first low voltage mode driven by the first voltage value E1 and the second low voltage mode driven by the second voltage value E2, the second voltage value E2 and the second voltage value are used as distortion reduction processing between them. By executing the differential voltage mode that is driven by the difference (E2−E1) from the one voltage value E1, the switching voltage width is reduced, so that the current distortion is reduced.

Here, the differential voltage mode will be described with reference to FIGS. 15 and 16.
In the differential voltage mode, the first inverter unit 20 and the second inverter unit 30 are PWM-controlled based on the fundamental wave and the carrier wave based on the voltage command.
In the differential voltage mode, the fundamental wave related to the driving of the first inverter unit 20 and the fundamental wave related to the driving of the second inverter unit 30 have the same phase. That is, the difference voltage mode is different from the high voltage mode in that the fundamental wave related to driving of the first inverter unit 20 and the second inverter unit 30 is in phase. It should be noted that a phase shift to the extent that the second battery 42 can be charged while driving the MG 10 is allowed.

In the differential voltage mode, the PWM control is performed based on the fundamental wave of the same phase, so that the SW elements that are turned on in each phase are the same in the first inverter unit 20 and the second inverter unit 30.
For example, as shown in FIG. 15, in the first inverter unit 20, the U-phase upper arm element 21 is turned on, the V-phase and W-phase lower arm elements 25 and 26 are turned on, and in the second inverter unit 30, The upper arm element 31 of the phase is turned on, and the lower arm elements 35 and 36 of the V phase and the W phase are turned on. In the present embodiment, since the second voltage value E2 is larger than the first voltage value E1, a current flows through a path indicated by an arrow Y2 in FIG. 15, and the difference between the second voltage value E2 and the first voltage value E1 ( That is, the MG 10 is driven in (E2-E1)). As shown in FIG. 16, the height of the drive voltage pulse in the differential voltage mode is the difference between the second voltage value E2 and the first voltage value E1 (E2-E1).

  In the differential voltage mode, when the MG 10 is powered, the first battery 41 is charged and the second battery 42 is discharged. Further, during regeneration of the MG 10, the first battery 41 is discharged and the second battery 42 is charged. That is, in the differential voltage mode, one of the first battery 41 or the second battery 42 is discharged and the other is charged.

  Here, the drive mode switching process in the switching control unit 65 will be described based on the flowchart shown in FIG. This process is executed at predetermined intervals, for example, when the ignition power is turned on. The selection of the drive mode is determined in a separate process with reference to the map of FIG. 10 according to the target rotational speed and target torque of the MG 10 based on the driver operation information such as the accelerator pedal operation amount and the vehicle speed information, for example. The

  In the first step S101 (hereinafter, “step” is omitted and simply indicated by the symbol “S”), it is determined whether or not the current drive mode is the first low voltage mode. When it is determined that the current drive mode is not the first low voltage mode (S101: NO), the following processing is not performed. When it is determined that the current drive mode is the first low voltage mode (S101: YES), the process proceeds to S102.

In S102, it is determined whether or not a switching command signal for switching the drive mode from the first low voltage mode to the second low voltage mode has been acquired. When it is determined that the switching command signal has not been acquired (S102: YES), the process proceeds to S103, and the first low voltage mode is continued. When it is determined that the switching command signal has been acquired (S102: NO), the process proceeds to S104.
In S104, the drive mode is switched to the differential voltage mode. Also, the time after switching the drive mode to the differential voltage mode is counted.

In S105, it is determined whether or not a predetermined time has elapsed since the drive mode was switched to the differential voltage mode. If it is determined that the predetermined time has not elapsed since switching to the differential voltage mode (S105: NO), this determination step is repeated. When it is determined that a predetermined time has elapsed since the drive mode was switched to the differential voltage mode (S105: YES), the process proceeds to S106.
In S106, the drive mode is switched to the second low voltage mode.

In the present embodiment, the distortion reduction process is a differential voltage mode in which one of the first battery 41 or the second battery 42 is charged and the other is discharged. In the present embodiment, the second voltage value E2 that is the voltage value of the second battery 42 is larger than twice the first voltage value E1 that is the voltage value of the first battery 41.
When switching from the first low voltage mode to the second low voltage mode, the switching control unit 65 performs a difference voltage mode for a predetermined time between the first low voltage mode and the second low voltage mode (S104 in FIG. 17). ). Thereby, compared with the case where it switches directly from 1st low voltage mode to 2nd low voltage mode, since a switching voltage width becomes small, distortion of an electric current can be reduced.
In addition, the same effects as those of the above embodiment can be obtained.
In the present embodiment, the processing of S104 corresponds to processing as a function of “distortion reducing means”.

(Third embodiment)
The power converter device by 3rd Embodiment of this invention is shown in FIG.18 and FIG.19.
As shown in FIG. 18, the power conversion device 2 of the present embodiment is provided with a capacitor 43 as a first voltage source instead of the first battery 41 of the above embodiment. The capacitor 43 is assumed to have a relatively large amount of power that can be used as a voltage source such as an electric double layer capacitor or a lithium ion capacitor. In the present embodiment, one battery is replaced with a capacitor 43 whose internal resistance and deterioration with time are relatively small, and a part of charging / discharging is performed by the capacitor 43, thereby improving efficiency and extending the life of the second battery 42. Is possible.
Further, since the voltage of the capacitor 43 is variable, the power conversion device 2 is provided with a voltage detection unit 44 that detects the voltage of the capacitor 43. In the present embodiment, it is assumed that the capacitor voltage value Ec that is the voltage value of the capacitor 43 is smaller than the second voltage value E2 that is the voltage value of the second battery 42. In the present embodiment, the capacitor voltage value Ec corresponds to the “first voltage value”.

The switching control unit 65 controls switching of the drive mode based on the capacitor voltage value Ec detected by the voltage detection unit 44.
First, let me mention the time of regeneration. Since the capacitor 43 has smaller internal resistance and deterioration with time than the second battery 42, it is within a charge limit range that is set according to the breakdown voltage of the entire system of the power conversion device 2, the breakdown voltage of the capacitor 43, etc. during regeneration. If there is, the second inverter unit 30 side is neutralized and the capacitor 43 side is preferentially charged. When the charge limit range of the capacitor 43 is exceeded, the first inverter unit 20 side is neutralized and the second battery 42 is charged.

  Next, switching of drive modes during power running will be described. In the present embodiment, since the capacitor voltage value Ec is smaller than the second voltage value E2, the first low voltage mode in which the second inverter unit 30 side is neutralized is set in the region D shown in FIG. The second low voltage mode in which the first inverter unit 20 side is neutralized is set, and the high voltage mode is set in the region F. Further, since the capacitor voltage value Ec is variable, the solid line T21 that separates the region D and the region E is variable according to the capacitor voltage value Ec.

  Here, the drive mode switching process in the switching control unit 65 will be described based on the flowchart shown in FIG. This process is executed at predetermined intervals, for example, when the ignition power is turned on. As in FIG. 17, the drive mode is selected by a separate process, such as map calculation, according to the target rotational speed and target torque of the MG 10 based on driver operation information such as the accelerator pedal operation amount and vehicle speed information. It is determined.

In the first S201, the capacitor voltage value Ec is acquired from the voltage detector 44.
S202 is the same as S101 in FIG. 16, and it is determined whether or not the current drive mode is the first low voltage mode. When it is determined that the current drive mode is not the first low voltage mode (S202: NO), the following processing is not performed. When it is determined that the current drive mode is the first low voltage mode (S202: YES), the process proceeds to S203.

  S203 is the same as S102 in FIG. 16, and determines whether or not a switching command signal for switching the drive mode from the first low voltage mode to the second low voltage mode has been acquired. When it is determined that the switching command signal has not been acquired (S203: NO), the process proceeds to S204, and the first low voltage mode is continued. When it is determined that the switching command signal has been acquired (S203: YES), the process proceeds to S205.

  In S205, it is determined whether or not the second voltage value E2 is larger than twice the capacitor voltage value Ec. When it is determined that the second voltage value E2 is less than or equal to twice the capacitor voltage value Ec (S205: NO), the process proceeds to S208 without performing the processes of S206 and S207. When it is determined that the second voltage value E2 is larger than twice the capacitor voltage value Ec (S205: YES), the process proceeds to S206.

In S206, the first inverter unit 20 and the second inverter unit 30 are set to a differential voltage mode in which PWM control is performed based on the fundamental wave having the same phase. In the differential voltage mode, the second battery 42 is discharged and the capacitor 43 is charged.
S207 and S208 are the same as S105 and S106 in FIG.

In the present embodiment, the first voltage source is the capacitor 43, and the second voltage source is the second battery 42. In other words, no battery is used for the first voltage source. It can also be understood that the voltage value of the first voltage source is variable. A case in which both the first voltage source and the second voltage source are configured by a battery without using a battery as one voltage source, and configured by a capacitor that is less deteriorated due to internal resistance and charging / discharging than the battery. Compared with efficiency. Moreover, the lifetime of the 2nd battery 42 can be lengthened.
In addition, the same effects as those of the above embodiment can be obtained.
In the present embodiment, the processing of S206 corresponds to processing as a function of “distortion reducing means”.

(Fourth embodiment)
The power converter device by 4th Embodiment of this invention is demonstrated based on FIG.
The power conversion device of this embodiment may have the same circuit configuration as that of the first embodiment or the same as that of the third embodiment.
As described with reference to FIG. 9, when the drive mode is switched from the low voltage mode to the high voltage mode, overcurrent may occur due to current distortion. Therefore, in this embodiment, when switching the drive mode in order to prevent an overcurrent associated with the switching of the drive mode, all the SW elements 21 to 26 and 31 to 36 are temporarily turned off as distortion reduction processing. Execute.

  The drive mode switching process in the switching control unit 65 according to the present embodiment will be described based on the flowchart shown in FIG. This process is executed at predetermined intervals, for example, when the ignition power is turned on. As in FIGS. 16 and 19, the selection of the drive mode is determined in a separate process by map calculation or the like according to the target rotation speed and target torque of MG 10 based on driver operation information, vehicle speed information, and the like.

In first S301, it is determined whether or not a switching command signal for switching the driving mode is acquired. When it is determined that the switching command signal has not been acquired (S301: NO), the process proceeds to S302 and the current drive mode is continued. When it is determined that the switching command signal has been acquired (S301: YES), the process proceeds to S303.
In S303, it is set as the stop mode which turns off all the SW elements 21-26, 31-36. Also, the time after starting the stop mode is counted.

In S304, it is determined whether or not a predetermined time has elapsed since the stop mode was started. The predetermined time here may be the same as or different from the time for executing the differential voltage mode in the third embodiment. If it is determined that the predetermined time has not elapsed (S304: NO), this determination step is repeated. When it is determined that the predetermined time has elapsed (S304: YES), the process proceeds to S305.
In S305, the drive mode is switched.

The distortion reduction process in the present embodiment is an all-off mode in which all the SW elements 21 to 26 and 31 to 36 are turned off. The switching control unit 65 performs an all-off mode for a predetermined time between the pre-switching mode and the post-switching mode. Thereby, the overcurrent accompanying switching of the drive mode can be prevented.
In addition, the same effects as those of the above embodiment can be obtained.

In the present embodiment, the processing of S303 corresponds to processing as a function of “distortion reducing means”.
The predetermined time for performing the “differential voltage mode” of the second embodiment or the third embodiment and the predetermined time for performing the “all-off mode” of the present embodiment, which are executed as distortion reduction processing when switching the drive mode, The same time may be sufficient and different time may be sufficient.

(Other embodiments)
In the first embodiment and the fourth embodiment, the distortion reduction process is performed regardless of the pre-switching mode and the post-switching mode. As described in the second embodiment, when the drive mode is changed in the direction in which the drive voltage is reduced, the current is distorted in the direction in which the current is reduced. Therefore, switching to the drive mode does not cause an overcurrent. . Therefore, in another embodiment, when the maximum voltage that can be applied to the winding is smaller in the post-switching mode than in the pre-switching mode, the distortion reduction process may be omitted.

  In the first embodiment, the timing at which the electrical angle is shifted by 30 [°] from the peak of each phase current is set as the switching permission timing. In other embodiments, any timing may be used as the switching permission timing as long as it deviates from the peak of each phase current. Further, the timing when a predetermined time has elapsed from the peak of each phase current may be set as the switching permission timing.

Moreover, in the said 2nd Embodiment and 3rd Embodiment, when switching from 1st low voltage mode to 2nd low voltage mode, the difference voltage mode of predetermined time is performed as distortion reduction processing. In another embodiment, when switching from the first low voltage mode to the high voltage mode, a differential voltage mode for a predetermined time may be performed as the distortion reduction processing.
In addition, when switching from the second low voltage mode to the first low voltage mode, or when switching from the high voltage mode to the first low voltage mode, a difference voltage mode for a predetermined time may be performed as the distortion reduction processing. Thereby, since the distortion of the current when the drive mode is changed in the direction in which the drive voltage decreases, the torque ripple can be reduced.

In the first embodiment, the voltage value of the first voltage source is equal to the voltage value of the second voltage source. In the second embodiment, the voltage value of the second voltage source is greater than twice the voltage value of the first voltage source. In other embodiments, the voltage values of the first voltage source and the second voltage source may be any value.
In the third embodiment, the first voltage source is a capacitor, and the second voltage source is a battery. In another embodiment, the first voltage source may be a battery and the second voltage source may be a capacitor.

  In the third embodiment, the voltage value of the capacitor is smaller than the voltage value of the battery. In another embodiment, the voltage value of the capacitor may be configured and controlled to be larger than the voltage value of the battery, for example, by chopper control or the like. In this case, after determining the magnitude of the battery voltage and the capacitor voltage, if the larger one of the battery voltage and the capacitor voltage is more than twice the smaller voltage, the differential voltage mode is executed as the distortion control process. May be.

In the first embodiment, the switching timing adjustment process for adjusting the switching timing of the drive mode is performed as the distortion reduction process. In the second embodiment and the third embodiment, the differential voltage mode is performed between the pre-switching mode and the post-switching mode. In other embodiments, when the first embodiment is combined with the second or third embodiment and the mode is shifted from the pre-switching mode to the differential voltage mode, the switching may be performed at a timing shifted from the peak of each phase current. . Similarly, when shifting from the differential voltage mode to the post-switching mode, switching may be performed at a timing shifted from the peak of each phase current. Thereby, the overcurrent by current distortion can be suppressed more.
Similarly, when the first embodiment and the fourth embodiment are combined, when shifting from the pre-switching mode to the all-off mode, or when shifting from the all-off mode to the after-switching mode, the timing shifted from the peak of each phase current It may be switched at.

In the above embodiment, a current detection unit that detects each phase current is provided. In another embodiment, for example, when the switching timing adjustment process is not performed as the distortion reduction process, the current detection unit may be omitted. Even when the switching timing adjustment process is performed, the current detection unit may be omitted if the switching timing is controlled based on each phase current estimated in the control unit.
In the above embodiment, the motor generator is applied to the main vehicle of an electric vehicle. In other embodiments, the motor generator may be applied to a vehicle auxiliary machine or may be applied to other devices.
As mentioned above, this invention is not limited to the said embodiment at all, In the range which does not deviate from the meaning of invention, it can implement with a various form.

DESCRIPTION OF SYMBOLS 1, 2 ... Power converter 10 ... Motor generator 11-13 ... Coil (winding)
DESCRIPTION OF SYMBOLS 20 ... 1st inverter part 30 ... 2nd inverter part 41 ... 1st battery (1st voltage source)
42 ... Second battery (second voltage source)
43. Capacitor (first voltage source)
60 ... Control unit 65 ... Switch control unit (drive mode selection means, distortion reduction means)

Claims (7)

A power converter (1) for converting the power of a motor generator (10) having windings (11-13),
It has the 1st switching element (21-26) provided corresponding to each phase of the above-mentioned winding, and it is between one end (111, 121, 131) of the above-mentioned winding, and the 1st voltage source (41, 43) A first inverter unit (20) connected to
A second switching element (31-36) provided corresponding to each phase of the winding; between the other end (112, 122, 132) of the winding and the second voltage source (42); A second inverter unit (30) to be connected;
A controller (60) for controlling on / off operation of the first switching element and the second switching element;
With
The controller is
A first low voltage mode in which the first voltage source is charged / discharged according to a rotation speed and torque of the motor generator, a second low voltage mode in which the second voltage source is charged / discharged, or the first voltage source Driving mode selection means (65) for selecting any driving mode of a high voltage mode in which both of the second voltage sources are charged and discharged;
When switching from the pre-switching mode that is one of the first low-voltage mode, the second low-voltage mode, or the high-voltage mode to the post-switching mode that is the driving mode different from the pre-switching mode, Distortion reducing means (65) for performing distortion reduction processing for reducing distortion of the current passed through the winding;
The power converter characterized by having. The distortion reduction process is an all-off mode in which all the first switching elements and the second switching elements are turned off,
The power converter according to claim 1, wherein the distortion reducing unit performs the all-off mode for a predetermined time between the pre-switching mode and the post-switching mode. The distortion reduction process is a differential voltage mode in which one of the first voltage source or the second voltage source is charged and the other is discharged,
A second voltage value that is a voltage value of the second voltage source is greater than twice a first voltage value that is a voltage value of the first voltage source;
When one of the pre-switching mode and the post-switching mode is the first low-voltage mode and the other is the second low-voltage mode or the high-voltage mode, the distortion reducing means The power conversion device according to claim 1, wherein the differential voltage mode for a predetermined time is performed between the post-switching mode. The distortion reduction process is a switching timing adjustment process,
The distortion reducing means switches from the pre-switching mode to the post-switching mode at a switching permission timing that is a timing shifted from a peak of each phase current energized to each phase of the winding. The power converter device as described in any one of 1-3.   The power conversion apparatus according to claim 4, wherein the switching permission timing is an intermediate timing between the adjacent peaks.   6. The distortion reduction unit according to claim 1, wherein the distortion reduction unit performs the distortion reduction processing when the maximum voltage that can be applied to the winding is larger in the post-switching mode than in the pre-switching mode. The power conversion device according to claim 1.   7. The power converter according to claim 1, wherein one of the first voltage source and the second voltage source is a battery (42), and the other is a capacitor (43). (2).

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