JP2014509419A5 - - Google Patents

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Publication number
JP2014509419A5
JP2014509419A5 JP2013550709A JP2013550709A JP2014509419A5 JP 2014509419 A5 JP2014509419 A5 JP 2014509419A5 JP 2013550709 A JP2013550709 A JP 2013550709A JP 2013550709 A JP2013550709 A JP 2013550709A JP 2014509419 A5 JP2014509419 A5 JP 2014509419A5
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JP
Japan
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processor
cus
vector
apus
instructions
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JP2013550709A
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Japanese (ja)
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JP2014509419A (ja
JP5971635B2 (ja
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Priority claimed from PCT/CA2011/000080 external-priority patent/WO2012100316A1/en
Publication of JP2014509419A publication Critical patent/JP2014509419A/ja
Publication of JP2014509419A5 publication Critical patent/JP2014509419A5/ja
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JP2013550709A 2011-01-25 2011-01-25 ベクトルユニット共有の装置および方法 Active JP5971635B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CA2011/000080 WO2012100316A1 (en) 2011-01-25 2011-01-25 Apparatus and method of vector unit sharing

Publications (3)

Publication Number Publication Date
JP2014509419A JP2014509419A (ja) 2014-04-17
JP2014509419A5 true JP2014509419A5 (https=) 2015-08-20
JP5971635B2 JP5971635B2 (ja) 2016-08-17

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JP2013550709A Active JP5971635B2 (ja) 2011-01-25 2011-01-25 ベクトルユニット共有の装置および方法

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US (1) US9727526B2 (https=)
JP (1) JP5971635B2 (https=)
CA (1) CA2859999A1 (https=)
DE (1) DE112011104770B4 (https=)
WO (1) WO2012100316A1 (https=)

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US9063974B2 (en) * 2012-10-02 2015-06-23 Oracle International Corporation Hardware for table scan acceleration
JP6102528B2 (ja) * 2013-06-03 2017-03-29 富士通株式会社 信号処理装置及び信号処理方法
KR102332523B1 (ko) * 2014-12-24 2021-11-29 삼성전자주식회사 연산 처리 장치 및 방법
CN105335130B (zh) * 2015-09-28 2018-06-26 深圳市中兴微电子技术有限公司 一种处理器及其处理任务的方法
US10620957B2 (en) 2015-10-22 2020-04-14 Texas Instruments Incorporated Method for forming constant extensions in the same execute packet in a VLIW processor
US10241946B2 (en) 2017-01-18 2019-03-26 Nxp Usa, Inc. Multi-channel DMA system with command queue structure supporting three DMA modes
US12189564B2 (en) * 2022-02-14 2025-01-07 SambaNova Systems, Inc. Dynamically-sized data structures on data flow architectures
US20230418604A1 (en) * 2022-06-27 2023-12-28 Intel Corporation Reconfigurable vector processing in a memory

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JPS58134357A (ja) 1982-02-03 1983-08-10 Hitachi Ltd ベクトルプロセッサ
NL192637C (nl) * 1984-02-27 1997-11-04 Nippon Telegraph & Telephone Stelselprocessor.
US4771380A (en) * 1984-06-22 1988-09-13 International Business Machines Corp. Virtual vector registers for vector processing system
US4760525A (en) * 1986-06-10 1988-07-26 The United States Of America As Represented By The Secretary Of The Air Force Complex arithmetic vector processor for performing control function, scalar operation, and set-up of vector signal processing instruction
US5010477A (en) * 1986-10-17 1991-04-23 Hitachi, Ltd. Method and apparatus for transferring vector data between parallel processing system with registers & logic for inter-processor data communication independents of processing operations
US5475656A (en) 1989-09-27 1995-12-12 Hitachi, Ltd. Optical disk memory and information processing apparatus
US5197130A (en) * 1989-12-29 1993-03-23 Supercomputer Systems Limited Partnership Cluster architecture for a highly parallel scalar/vector multiprocessor system
JPH0520283A (ja) 1991-07-11 1993-01-29 Mitsubishi Electric Corp 並列データ処理装置
CA2073516A1 (en) * 1991-11-27 1993-05-28 Peter Michael Kogge Dynamic multi-mode parallel processor array architecture computer system
JP3639323B2 (ja) * 1994-03-31 2005-04-20 富士通株式会社 メモリ分散型並列計算機による連立１次方程式計算処理方法および計算機
US5513366A (en) * 1994-09-28 1996-04-30 International Business Machines Corporation Method and system for dynamically reconfiguring a register file in a vector processor
US6317819B1 (en) * 1996-01-11 2001-11-13 Steven G. Morton Digital signal processor containing scalar processor and a plurality of vector processors operating from a single instruction
JP3344345B2 (ja) 1998-12-15 2002-11-11 日本電気株式会社 共有メモリ型ベクトル処理システムとその制御方法及びベクトル処理の制御プログラムを格納する記憶媒体
IL145245A0 (en) * 2001-09-03 2002-06-30 Jtc 2000 Dev Delaware Inc System and method including vector-matrix multiplication
ATE372542T1 (de) * 2002-05-24 2007-09-15 Nxp Bv Zugriff zum breiten speicher
EP1512100A2 (en) * 2002-05-24 2005-03-09 Koninklijke Philips Electronics N.V. A scalar/vector processor
US6986023B2 (en) * 2002-08-09 2006-01-10 Intel Corporation Conditional execution of coprocessor instruction based on main processor arithmetic flags
US7334110B1 (en) * 2003-08-18 2008-02-19 Cray Inc. Decoupled scalar/vector computer architecture system and method
JP5240424B2 (ja) * 2004-11-05 2013-07-17 日本電気株式会社 Ｓｉｍｄ型並列演算装置、プロセッシング・エレメント、ｓｉｍｄ型並列演算装置の制御方式
US20090150648A1 (en) * 2007-12-06 2009-06-11 Eric Oliver Mejdrich Vector Permute and Vector Register File Write Mask Instruction Variant State Extension for RISC Length Vector Instructions
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