JP2014212166A - Optical waveguide device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an optical waveguide device capable of reducing transmission loss of light while suppressing manufacturing cost.SOLUTION: An optical waveguide device 10 of the present invention includes a wiring board 20, an optical element 40, and an optical waveguide 30. The optical element 40 has, on its element main surface 41, an element-side terminal 45 and an optical function part 44 having at least one of a light-emitting function and a light-receiving function and is mounted on the side of a substrate main surface 21 with its element rear surface 42 facing the substrate main surface 21. The optical waveguide 30 is formed at a position facing the optical function part 44 on the element main surface 41 and has a core 33 serving as an optical path in which an optical signal propagates and claddings 34 and 35 surrounding the core 33. A wiring pattern 52 connected to the element-side terminal 45 is formed on the element main surface 41, element side surfaces 43, and the outermost surface 50 of the wiring board 20.

Description

  The present invention relates to an optical waveguide device having a structure in which an optical signal propagates.

  In recent years, with the development of information communication technology represented by the Internet and the dramatic improvement in the processing speed of information processing apparatuses, there is an increasing need for transmitting and receiving large-capacity data such as images. An information transmission speed of 10 Gbps or higher is desirable to exchange such a large amount of data freely through an information communication facility, and great expectations are placed on optical communication technology as a technology that can realize such a high-speed communication environment. On the other hand, signals can be transmitted at high speeds even on signal transmission paths at relatively short distances, such as connections between wiring boards in equipment, connections between semiconductor chips in wiring boards, connections within semiconductor chips, etc. It has been desired in recent years. For this reason, it is considered that the transition from metal cables and metal wirings, which have been conventionally common, to optical transmission using an optical transmission medium such as an optical fiber or an optical waveguide is ideal.

  Moreover, recently, in order to transmit and receive large-capacity data at higher speed, it is required to perform optical transmission using a multi-channel, small, and low-profile optical transmission medium. For this reason, various optical waveguide devices including a plurality of optical waveguides have been proposed (see, for example, Patent Document 1). More specifically, Patent Document 1 proposes a technique of flip-chip connecting optical elements arrayed at a narrow pitch to wiring formed on an optical waveguide. However, since the optical signal emitted from the optical element travels toward the wiring substrate that supports the optical waveguide from the lower side, a structure for taking out the optical signal to the outside is required, which increases complexity and cost. There's a problem. Accordingly, as shown in FIG. 9, the optical waveguide device 101 includes the optical element 102 mounted on the wiring board 103, and the optical signal emitted from the optical element 102 advances in a direction away from the wiring board 103. A structure that enters the optical waveguide 104 is preferable.

Japanese Patent Application No. 2010-237038 (FIGS. 1, 2, etc.)

  By the way, in the optical waveguide device 101, a substrate-side connection terminal (not shown) is provided on the wiring substrate 103, and an element-side terminal (not shown) is provided on the optical element 102. The substrate-side connection terminal and the element-side terminal are connected to each other via a bonding wire 105 having a height of several tens of μm or more, and if higher, 100 μm or more. However, since the bonding wire 105 has a three-dimensional shape that protrudes upward, there is a problem that when the optical waveguide 104 and the optical element 102 are optically coupled, the loop of the bonding wire 105 interferes with the optical waveguide 104 ( (Refer area | region A1 of FIG. 9). In this case, since the optical waveguide 104 cannot be brought close to the optical element 102, the light transmission loss increases. If the optical waveguide 104 is forced to approach the optical element 102, the loop may be deformed or disconnected, or the optical waveguide 104 may be damaged. In the case of ball bonding, the optical waveguide may interfere with the ball portion, so that the optical waveguide may not be accessible to the optical element.

  It is also conceivable to reduce optical transmission loss by interposing an optical component such as a lens between the optical waveguide 104 and the optical element 102. However, since a lens and a structure for positioning and fixing the lens are required, there is a problem that the manufacturing cost of the optical waveguide device 101 increases. Further, instead of using the optical element 102 in which the element side terminal (front surface electrode) is disposed on the element main surface 106, an optical element in which the element side terminal (back surface electrode) is disposed on the element back surface 107 is used, and the back electrode is mounted on the substrate. It is also conceivable that the optical waveguide is brought closer to the optical element by omitting the bonding wire 105 by directly connecting to the side connection terminal. However, since at least one of the process of thinning the optical element and the process of forming the back electrode on the element back surface 107 is required, the manufacturing cost of the optical element, and hence the manufacturing cost of the optical waveguide device, increases. There is.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide an optical waveguide device capable of reducing light transmission loss while suppressing manufacturing cost.

  Means (Means 1) for solving the above-described problems include a wiring board having a substrate main surface and a substrate back surface, an element main surface, an element back surface, and an element side surface, and at least one function of light emission and light reception. And an optical element mounted on the substrate main surface side with the element back surface facing the substrate main surface, and an optical element mounted on the substrate main surface side. An optical waveguide device, comprising: a core formed on a surface facing the optical functional unit and serving as an optical path through which an optical signal propagates; and an optical waveguide having a clad surrounding the core. There is an optical waveguide device characterized in that a wiring pattern connected to the element-side terminal is formed on the element side surface and on the outermost surface of the wiring substrate.

  Therefore, according to the optical waveguide device of means 1, the wiring pattern is connected to the element side terminal of the optical element. The wiring pattern is formed in layers on the element main surface and the element side surface of the optical element so as to come into contact with the surface of the optical element, and is formed in a layer on the outermost surface of the wiring board so that the surface of the wiring board is formed. It is flat because it touches. Therefore, when the optical waveguide and the optical element are optically coupled, the wiring pattern is prevented from interfering with the optical waveguide. As a result, the optical waveguide can be reliably brought close to the optical element, so that the light transmission loss can be reduced. In addition, in order to reduce the light transmission loss, it is not necessary to interpose an optical component such as a lens between the optical waveguide and the optical element or to arrange the element side terminal on the back surface of the element. Device manufacturing costs can be reduced.

  Here, as a wiring board provided in the optical waveguide device, for example, a resin wiring board, a ceramic wiring board, a glass wiring board, and a metal wiring board can be used. However, using a resin wiring board is advantageous in terms of cost. . Use of a ceramic wiring board is advantageous in terms of rigidity. Furthermore, since the ceramic wiring board has higher thermal conductivity than the resin wiring board, the generated heat is efficiently dissipated, which is effective for extending the life of the optical element. In this case, if the optical element is mounted on the wiring board, the shift of the emission wavelength due to the deterioration of the heat dissipation is avoided, so that a wiring board having excellent operational stability and reliability can be realized.

  Examples of such resin wiring boards include wiring boards made of EP resin (epoxy resin), PI resin (polyimide resin), BT resin (bismaleide-triazine resin), PPE resin (polyphenylene ether resin), and the like. . In addition, a wiring board made of a composite material of these resins and organic fibers such as glass fibers (glass woven fabric or glass nonwoven fabric) or polyamide fibers may be used. Further, preferred examples of the ceramic wiring board include wiring boards made of alumina, aluminum nitride, silicon nitride, boron nitride, beryllia, mullite, low-temperature fired glass ceramic, glass ceramic, and the like. Preferable examples of the metal wiring board include a wiring board made of copper, a wiring board made of a copper alloy, a wiring board made of a single metal other than copper, and a wiring board made of an alloy other than copper.

  In addition, a plurality of board-side connection terminals are disposed on the board main surface side of the wiring board. In this case, the wiring pattern may connect the board side connection terminal and the element side terminal. In this case, by forming the wiring pattern so as to extend linearly, the electrical path connecting the substrate side connection terminal and the element side terminal can be shortened. Therefore, the transmission loss of the signal flowing between the board-side connection terminal and the element-side terminal is reduced, so that signal quality deterioration can be prevented. The wiring board may be a multilayer wiring board formed by laminating a plurality of wiring layers and a plurality of insulating layers. Furthermore, via conductors may be formed inside the substrate in order to achieve interlayer connection between these wiring layers. The substrate side connection terminal, the wiring layer, and the via conductor are, for example, conductive made of gold (Au), silver (Ag), copper (Cu), platinum (Pt), tungsten (W), molybdenum (Mo), or the like. It is formed by printing or filling a metal paste. An electric signal flows through these board side connection terminals, wiring layers, and via conductors. In addition to such a multilayer wiring board, for example, it is allowed to use a build-up multilayer wiring board having a build-up layer formed by alternately laminating wiring layers and insulating layers on one side or both sides of the core board. The This makes it easy to increase the density of the wiring board.

  Further, as a wiring board, a land grid array (LGA) type constituted only by a plurality of terminal pads formed on the back surface of the board, or a plurality of terminal pads and a plurality of solders formed on the surface of the terminal pads are used. Examples include a ball grid array (BGA) type constituted by bumps, and a pin grid array (PGA) type constituted by a plurality of terminal pads and a plurality of pins bonded on the surface of the terminal pads. It is done.

  In addition, a wiring pattern connected to the element-side terminal is formed on the element main surface, the element side surface, and the outermost surface of the wiring substrate. Therefore, when the board main surface of the wiring board is the outermost surface, the wiring pattern is arranged on the board main surface. Here, examples of the method for forming the wiring pattern include etching, plating, printing and baking of a metal paste, sticking of a metal foil, sputtering, vapor deposition, ion plating, and the like. When forming a wiring pattern by sputtering, it is difficult to form a wiring pattern on the side surface of the element. In addition, when a wiring pattern is formed by vapor deposition or ion plating, only a thin wiring pattern can be formed, which may reduce reliability. Moreover, since an apparatus for performing vapor deposition and ion plating is required, there is a problem that the cost is increased. Therefore, the wiring pattern is preferably formed by spraying ink containing a conductive material, for example. In this case, the wiring pattern can be accurately and reliably formed at an arbitrary place. In addition, a sufficient thickness of the wiring pattern can be ensured. Furthermore, since a fine wiring pattern can be formed without preparing a high-cost mask having a fine pattern or performing an etching process, manufacturing cost can be reduced. In addition, as a method for forming a wiring pattern by spraying ink, printing using an ink jet apparatus, ink coating, and the like can be given. Moreover, it is although it does not specifically limit as a conductive material, For example, the 1 type, or 2 or more types of metal selected from gold | metal | money, silver, copper, platinum, tungsten, molybdenum etc. can be mentioned.

  In addition, when a solder resist is formed on the board | substrate main surface of a wiring board, you may arrange | position a wiring pattern on the surface of the soldering resist used as the outermost surface. In this way, the wiring pattern can be easily formed even when the optical element is mounted after the solder resist is formed. Moreover, when forming a wiring pattern on the surface of a soldering resist, the wiring pattern may be arrange | positioned on the surface of the soldering resist via the coupling agent. In this way, since the adhesion strength of the wiring pattern to the solder resist is improved, the reliability of the optical waveguide device can be improved. In addition, when a wiring pattern is formed on the surface of the solder resist by spraying ink, a liquid repellent is applied to the surface of the solder resist, and a wiring pattern is formed in a non-application area between the application areas of the liquid repellent. May be. In this way, since the ink can be prevented from spreading by the liquid repellent, the wiring pattern can be formed more accurately. In addition, it is difficult for the ink to bleed, and the thickness of the wiring pattern can be easily secured. When a wiring pattern is formed on the surface of the solder resist, the outermost wiring layer may be a ground layer in the wiring board. With this configuration, the microstrip line can be formed by the solder resist as the insulating layer, the wiring pattern, and the outermost wiring layer (that is, the ground layer), so that the characteristic impedance can be matched with the optical element. Become.

  When the optical element is mounted on the substrate main surface side through a die bonding portion having a fillet portion having a fillet shape, the wiring pattern is on the element main surface, on the element side surface, on the surface of the fillet portion, and It may be formed on the outermost surface of the wiring board. In this way, the wiring pattern formed on the element side surface and the wiring pattern formed on the outermost surface of the wiring board are gently connected via the wiring pattern formed on the surface of the fillet portion. Therefore, the wiring pattern is difficult to be disconnected. Further, the wiring pattern usually includes a resin component such as a dispersant, and the fillet portion is usually made of a material in which the resin component is filled with an inorganic filler. That is, since both the wiring pattern and the fillet portion contain a resin component, the wiring pattern and the fillet portion are well-matched, and the wiring pattern is securely adhered to the surface of the fillet portion. From the above, since the wiring pattern is formed with sufficient strength, the reliability is improved. Furthermore, since a part of the die bonding part (fillet part) is formed into a fillet shape, the optical element can be mounted on the substrate main surface side with sufficient strength, so that reliability is improved.

  Here, one or two or more optical elements are mounted on a wiring board included in the optical waveguide device. As the mounting method, for example, normal die bonding can be adopted. In addition, when the optical elements are roughly classified, an optical functional part (light emitting part) having a light emitting function (light emitting part) in the main surface of the element (that is, a light emitting element) and an optical functional part having a light receiving function (light receiving part) are provided. There are one having a main surface (that is, a light receiving element) and one having an optical function portion (light emitting / receiving portion) having both functions of light emission and light reception (that is, a light emitting / receiving element). Specific examples of the light emitting element include a light emitting diode (LED), a semiconductor laser diode (LD), a surface emitting laser (VCSEL), and the like. These light emitting elements have a function of converting an inputted electric signal into an optical signal and then emitting the optical signal from a light emitting portion toward a predetermined portion. On the other hand, specific examples of the light receiving element include a pin photo diode (pin PD), an avalanche photo diode (APD), and the like. These light receiving elements have a function of causing an optical signal to be incident on the light receiving unit, converting the incident optical signal into an electric signal, and outputting the electric signal. Such an optical element is operated by an operation circuit. Specifically, the operation circuit for the light emitting element is called, for example, a driver IC, and the operation circuit for the light receiving element is called, for example, an amplifier or a transimpedance amplifier (TIA). The optical element and the operation circuit are electrically connected through, for example, a wiring layer formed on the wiring board. Examples of suitable materials used for the optical element include Si, Ge, InGaAs, GaAsP, AlGaAs, and InP.

  The optical element includes an optical functional unit group in which a plurality of optical functional units are arranged on a straight line at an equal pitch, and an element side terminal group in which a plurality of element side terminals are arranged in the element main surface. The pitch between adjacent element-side terminals is normally 125 μm, but the minimum value may be set to 40 μm or less. In this way, it is possible to increase the number of wiring patterns connected to the element side terminals and increase the density of the entire apparatus. Further, by setting the minimum value of the pitch between the element side terminals to 40 μm or less, it is possible to reduce the size of the optical element and consequently the optical waveguide device. If the pitch between adjacent element-side terminals is larger than 125 μm, it is difficult to increase the number of wiring patterns connected to the element-side terminals. In addition, when the number of element-side terminals is increased, the size of the optical element, and hence the optical waveguide device, is easily increased. Furthermore, if an angle shift occurs when mounting the optical element, the positional accuracy of the optical functional unit at the end portion is greatly reduced, and thus high mounting accuracy is required.

  Furthermore, the optical element may have a plurality of rows of optical functional unit groups and element-side terminal groups alternately in the element main surface. In this case, if the substrate side connection terminal and the element side terminal are connected to each other via the bonding wire, the optical waveguide cannot be brought close to the bonding wire in order to interfere with the bonding wire. The bonding wire loop connected to the element-side terminal in the upper part passes over the optical function part in the front row, so that the optical function part becomes a shadow of the loop, and the optical coupling efficiency is lowered. There is a fear. On the other hand, in the present invention, the substrate-side connection terminal and the element-side terminal can be connected using a wiring pattern formed in a layered manner on the element main surface. It is possible to reliably prevent a decrease in optical coupling efficiency due to the occurrence of.

  The optical waveguide device includes an optical waveguide. Note that the optical waveguide device may include only one optical waveguide or may include two or more optical waveguides. An optical waveguide refers to a member having a core that serves as an optical path through which an optical signal propagates and a clad surrounding the core. For example, an organic optical waveguide made of a polymer material or the like, an inorganic optical light made of quartz glass, a compound semiconductor, or the like. There are waveguides. As the polymer material, photosensitive resin, thermosetting resin, thermoplastic resin, and the like can be selected. Specifically, polyimide resin such as fluorinated polyimide, epoxy resin, UV curable epoxy resin, PMMA (polyethylene) Acrylic resins such as methyl methacrylate), deuterated PMMA, and deuterated fluorinated PMMA, polyolefin resins, and the like are suitable. Both the material forming the core and the material forming the clad preferably have translucency. The core needs to be separated for each channel, but the clad may be integrated.

The schematic plan view which shows the optical waveguide device of this embodiment. 1 is a schematic cross-sectional view showing an optical waveguide device. The principal part sectional view showing the optical waveguide device in other embodiments. The principal part sectional view showing the optical waveguide device in other embodiments. The principal part sectional view showing the optical waveguide device in other embodiments. The principal part sectional view showing the optical waveguide device in other embodiments. The schematic plan view which shows VCSEL in other embodiment. The schematic sectional drawing which shows the optical waveguide device in other embodiment. Sectional drawing for demonstrating the problem in the optical waveguide device of a prior art.

  Hereinafter, an embodiment embodying the present invention will be described in detail with reference to the drawings.

  As shown in FIGS. 1 and 2, the optical waveguide device 10 includes a wiring substrate 20 having a substrate main surface 21 and a substrate back surface 22 located on the opposite side of the substrate main surface 21. The wiring board 20 of the present embodiment has a substantially rectangular plate-shaped core substrate 11 made of glass epoxy, and has a main surface side buildup layer 14 on the core main surface 12 (upper surface in FIG. 2), and the core back surface. 13 is a build-up multilayer wiring board having a back-side build-up layer 15 on 13 (the lower surface in FIG. 2).

  As shown in FIG. 2, through-hole conductors 16 that penetrate the core main surface 12 and the core back surface 13 are formed at a plurality of locations on the core substrate 11. These through-hole conductors 16 connect and conduct the core main surface 12 side and the core back surface 13 side of the core substrate 11. The inside of the through-hole conductor 16 is filled with a closing body 17 such as an epoxy resin. A lid-like conductor 18 made of a copper plating layer is formed in the opening in the through-hole conductor 16, and as a result, the through-hole conductor 16 is closed.

  The back-side buildup layer 15 has a structure in which two resin insulation layers 61 (insulation layers) made of thermosetting resin (epoxy resin) and two wiring layers 62 made of copper are alternately laminated. ing. In addition, via conductors 63 connected to the wiring layer 62 are formed by copper plating at a plurality of locations in each resin insulating layer 61. Terminal pads 64 electrically connected to the wiring layer 62 are arranged in an array at a plurality of locations on the lower surface of the second resin insulating layer 61. Further, the lower surface of the second resin insulating layer 61 is almost entirely covered with a solder resist 65. An opening 66 for exposing the terminal pad 64 is formed at a predetermined location of the solder resist 65. On the surface of the terminal pad 64, a plurality of pins 67 are joined by soldering.

  As shown in FIG. 2, the main surface side buildup layer 14 has substantially the same structure as the back surface side buildup layer 15 described above. That is, the main surface side buildup layer 14 has a structure in which two resin insulation layers 71 (insulation layers) made of thermosetting resin (epoxy resin) and two wiring layers 62 made of copper are alternately laminated. have. In addition, via conductors 72 connected to the wiring layer 62 are formed by copper plating at a plurality of locations in each resin insulating layer 71.

  As shown in FIGS. 1 and 2, a plurality of substrate-side connection terminals 73 are formed on the substrate main surface 21 of the wiring substrate 20 (specifically, on the surface of the second resin insulation layer 71). Has been. Each of the board-side connection terminals 73 is electrically connected to the outermost wiring layer 62 and is disposed in a region that becomes the outer periphery of the board on the board main surface 21 and has a circular shape in plan view. In the present embodiment, a part of the outermost wiring layer 62 constitutes a ground layer in the wiring board 20.

  As shown in FIG. 2, the substrate main surface 21 of the wiring substrate 20 (on the surface of the second resin insulating layer 71) is almost entirely covered with a solder resist 75. An opening 76 that exposes the board-side connection terminal 73 is formed at a predetermined location of the solder resist 75. In each opening 76, via conductors 77 connected to the board-side connection terminals 73 are formed by, for example, copper plating or ink spraying containing a conductive material. Each via conductor 77 has a cylindrical shape, and its diameter is set to about 10 μm to 50 μm. The board side connection terminal 73 connected to the via conductor 77 is not connected to other conductors.

  Note that an IC chip (CPU), which is a semiconductor integrated circuit element, is bonded to the optical waveguide device 10. An IC chip having a function as an MPU has one chip main surface, one chip back surface, and four chip side surfaces, and is a substantially rectangular plate of 10.0 mm long × 10.0 mm wide × 0.7 mm thick. It has a shape. The IC chip has a circuit element (not shown) in the chip main surface. In addition, an operation circuit for a light emitting element and an operation circuit for a light receiving element are arranged around the IC chip. Note that the IC chip and the operation circuit are bonded to the surface of the solder resist 75 which is the outermost surface 50 of the wiring substrate 20 or with an adhesive such as a die bonding agent in a state where the back surface of the chip is in contact with the opening of the solder resist. It is installed. The electrical connection between the IC chip and the operation circuit may be performed by wiring on the surface of the solder resist 75 or the surface of the die bonding agent in the same method as the method of forming the wiring pattern 51 of the present embodiment. . As long as the region does not interfere with the optical waveguide 30, connection may be made by a conventional method such as wiring formed on the substrate main surface 21 of the wiring substrate 20 or wire bonding.

  As shown in FIGS. 1 and 2, the optical waveguide device 10 includes a VCSEL 40 that is a kind of optical element (surface light emitting element). The VCSEL 40 has one element main surface 41 (upper surface in FIG. 2), one element back surface 42 (lower surface in FIG. 2), and four element side surfaces 43, and is 3.5 mm long × 1.5 mm wide × It has a substantially rectangular flat plate shape with a thickness of 0.5 mm. The VCSEL 40 has five light emitting portions 44 (light functional portions) having a light emitting function on the element main surface 41. Further, the VCSEL 40 has the element back surface 42 facing the substrate main surface 21 (specifically, the element back surface 42 is in contact with the surface of the solder resist 75) and the substrate main surface 21 side (specifically). Is mounted on the surface of the solder resist 75). Each light emitting section 44 emits laser light (optical signal) having a predetermined wavelength in a direction orthogonal to the waveguide back surface 32 of the optical waveguide 30 (upward in FIG. 2).

  As shown in FIG. 1, the VCSEL 40 includes a light emitting unit group 46 (optical functional unit group) in which the five light emitting units 44 are arranged in a straight line at an equal pitch in the element main surface 41. Have. Note that the pitch L1 of the light emitting units 44 constituting the light emitting unit group 46 is normally set to about 250 μm. Further, the VCSEL 40 has a row of element-side terminal groups 47 formed by arranging ten element-side terminals 45 on a straight line at an equal pitch in the element main surface 41. Each element-side terminal 45 has a circular shape in plan view, and its diameter is set to about 40 to 70 μm. The pitch L2 between the adjacent element side terminals 45 is normally set to 125 μm. In the present embodiment, the two element-side terminals 45 are connected to one light emitting unit 44 via the wiring pattern 48.

  As shown in FIGS. 1 and 2, the optical waveguide device 10 includes a driver IC 80 that is a semiconductor integrated circuit element for driving the VCSEL 40. The driver IC 80 has one element main surface 81 (upper surface in FIG. 2), one element back surface 82 (lower surface in FIG. 2), and four element side surfaces 83, and is 3.5 mm long × 2.5 mm wide. It has a substantially rectangular flat plate shape. The driver IC 80 has a functional unit 84 serving as a current source for the VCSEL 40 in the element main surface 81. The driver IC 80 is mounted on the surface of the solder resist 75 with the element back surface 82 in contact with the surface of the solder resist 75. Further, the driver IC 80 has an element side terminal group 86 in which ten element side terminals 85 are arranged on a straight line at an equal pitch, and ten element side terminals 87 are arranged on a straight line at an equal pitch. An element side terminal group 88 is provided in the element main surface 81. Each of the element side terminals 85 and 87 has a rectangular shape in plan view, and their diameter is set to about 40 to 70 μm. In each of the element side terminal groups 86 and 88, the pitch L2 between the adjacent element side terminals 85 and 87 is normally set to 125 μm.

  Furthermore, a plurality (10 in this embodiment) of wiring patterns 51 are formed in a region located between the IC chip and the driver IC 80 on the surface of the solder resist 75. Each wiring pattern 51 has a layer shape (thin film shape) having a width of 5 to 70 μm and a thickness of 4 μm, and is formed to extend linearly and in parallel to each other. Each wiring pattern 51 is also formed on the chip main surface and the chip side surface of the IC chip, and is also formed on the element main surface 81 and the element side surface 83 of the driver IC 80. Each wiring pattern 51 electrically connects the chip side element of the IC chip and the element side terminal 85 of the driver IC 80. The wiring pattern 51 of this embodiment is formed by spraying ink containing a conductive material (copper paste in this embodiment) using an inkjet apparatus (not shown). Further, each wiring pattern 51 is connected to the surface of the solder resist 75, the chip main surface and the chip side surface of the IC chip, and the element of the driver IC 80 via a coupling agent (a silane coupling agent in the present embodiment) (not shown). It is arranged on the main surface 81 and the element side surface 83. Further, a liquid repellent (not shown) is applied to the surface of the solder resist 75, and a wiring pattern 51 is formed in a non-application area between the application areas of the liquid repellent. In addition, although the wiring pattern 51 of this embodiment is formed by spraying copper paste, after forming a wiring pattern by spraying depending on the kind of paste, at least heat treatment, plasma irradiation treatment, and ultra-low oxygen reduction treatment are performed. You may make it reduce the resistivity of a conductor (wiring pattern) by performing one process. Moreover, you may use a silver paste instead of a copper paste. Since the copper paste is easily oxidized, the silver paste can often obtain a lower resistivity, but the silver paste has a problem that the ion migration is easy and the material cost is high.

  As shown in FIGS. 1 and 2, a plurality of (in this embodiment, ten) wiring patterns 52 are formed in a region located between the driver IC 80 and the VCSEL 40 on the surface of the solder resist 75. . Each wiring pattern 52 is set to have a width of 50 μm and a thickness of 4 μm, and is formed to extend linearly and in parallel to each other. Each wiring pattern 52 is also formed on the element main surface 81 and the element side surface 83 of the driver IC 80 and also on the element main surface 41 and the element side surface 43 of the VCSEL 40. Further, each wiring pattern 52 is cut into two on the surface of the solder resist 75 which becomes the outermost surface 50 of the wiring substrate 20. Each wiring pattern 52 is electrically connected to the element side terminal 87 of the driver IC 80 and the element side terminal 45 of the VCSEL 40. Each wiring pattern 52 is configured to electrically connect the substrate side connection terminal 73 (and the via conductor 77) and the element side terminals 45 and 87. That is, each wiring pattern 52 is configured to electrically connect the element side terminal 45 and the element side terminal 87 via the substrate side connection terminal 73 and the via conductor 77. In addition, the wiring pattern 52 and the via conductor 77 of this embodiment are formed by spraying the above ink using an ink jet apparatus. Also, each wiring pattern 52 is formed on the surface of the solder resist 75, on the element main surface 81 and the element side surface 83 of the driver IC 80, on the element main surface 41 and on the element side surface 43 of the VCSEL 40 via the coupling agent. Is arranged. Further, the above-described liquid repellent is applied to the surface of the solder resist 75, and a wiring pattern 52 is formed in a non-application area between the application areas of the liquid repellent.

  As shown in FIGS. 1 and 2, the optical waveguide device 10 includes an optical waveguide 30 having a waveguide main surface 31 and a waveguide back surface 32 located on the opposite side of the waveguide main surface 31. The optical waveguide 30 is formed on the element main surface 41 of the VCSEL 40 at a position facing the four light emitting portions 44. The waveguide back surface 32 and the element main surface 41 are separated by 10 μm or less (0 μm in this embodiment). The optical waveguide 30 is composed of four cores 33 having a thickness of 50 μm, a lower cladding 34 having a thickness of 25 μm, and an upper cladding 35 having a thickness of 25 μm, and the total thickness is 100 μm. Each core 33 has a width of 50 μm and is formed to extend linearly and in parallel. Each core 33 is a portion that substantially becomes an optical path through which an optical signal propagates, and is surrounded by a lower clad 34 and an upper clad 35. In the present embodiment, transparent polymer materials having different refractive indexes are used for the core 33 and the clads 34 and 35. Specifically, the material for forming the core 33 is about 2% (specifically, about 0.2% to 4.0%, about 10% at the maximum) than the material for forming the clads 34 and 35. The refractive index is high.

  As shown in FIGS. 1 and 2, optical path conversion units 36 that convert the path of an optical signal propagating in the optical path are formed at both ends of the optical waveguide 30. Furthermore, the optical path conversion unit 36 has a reflection surface 37 that is inclined at an angle of 45 ° with respect to the waveguide back surface 32. As a result, an optical path changing mirror that reflects light at an angle of 90 ° is configured.

  The optical waveguide device (not shown) connected via the optical waveguide 30 includes a photodiode (not shown) which is a kind of optical element (surface light receiving element). The photodiode of this embodiment has a configuration that is almost the same as that of the VCSEL 40. That is, this photodiode has one element main surface, one element back surface, and four element side surfaces, and has a substantially rectangular flat plate shape of 3.5 mm length × 1.5 mm width × 0.5 mm thickness. ing. The photodiode has five light receiving portions (light functional portions) having a light receiving function on the element main surface. That is, the same number of light emitting units 44 and light receiving units exist. In addition, the photodiode has a substrate main surface side (specifically, with the element back surface facing the substrate main surface of the wiring substrate (specifically, the element back surface being in contact with the surface of the solder resist)). Is mounted on the surface of the solder resist. Each light receiving portion is configured to easily receive a laser beam (optical signal) directed in a direction orthogonal to the waveguide back surface 32 (downward in FIG. 2).

  Further, the photodiode has, in the element main surface, one row of light receiving portion groups (optical functional portion group) in which five light receiving portions are arranged on a straight line and at equal pitches. The pitch of the light receiving parts constituting the light receiving part group is normally set to about 250 μm. In addition, the photodiode has a group of element-side terminals formed by arranging ten element-side terminals on a straight line at an equal pitch in the element main surface. Each element-side terminal has a circular shape in plan view, and its diameter is set to about 40 to 70 μm. The pitch between adjacent element side terminals is normally set to 125 μm. In the present embodiment, the two element-side terminals are connected to one light receiving portion via a wiring pattern.

  Further, the optical waveguide device includes a receiver IC that is a semiconductor integrated circuit element for driving the photodiode. This receiver IC has one element main surface, one element back surface, and four element side surfaces, and has a substantially rectangular flat plate shape of 3.5 mm long × 2.5 mm wide. The receiver IC has a functional unit that serves as an amplifier for the photodiode in the element main surface. The receiver IC is mounted on the surface of the solder resist in a state where the element back surface is in contact with the surface of the solder resist. The receiver IC has an element side terminal group in which 10 element side terminals are arranged in a straight line at an equal pitch in the element main surface. Each element-side terminal has a rectangular shape in plan view, and its diameter is set to about 40 to 70 μm. In the element-side terminal group, the pitch between adjacent element-side terminals is normally set to 125 μm.

  A plurality (10 in this embodiment) of wiring patterns are formed in a region located between the receiver IC and the photodiode on the surface of the solder resist. Each wiring pattern is formed on the element main surface and the element side surface of the receiver IC, and is formed on the element main surface and the element side surface of the photodiode. Each wiring pattern is electrically connected to the element side terminal of the receiver IC or the element side terminal of the photodiode. In addition, the wiring pattern of this embodiment is formed by spraying said ink using an inkjet apparatus.

  A general operation of the optical waveguide device 10 configured as described above will be briefly described.

  The VCSEL 40 and the photodiode operate via a circuit board (not shown) connected to the wiring board 20 and the wiring. When an electrical signal is output from the driver IC 80 to the VCSEL 40, the VCSEL 40 converts the input electrical signal into an optical signal, and then directs the optical signal toward the reflection surface 37 of the optical path conversion unit 36 and from the light emitting unit 44 as laser light. Exit. The laser light emitted from the light emitting unit 44 is incident from the waveguide back surface 32 side of the optical waveguide 30 and reaches the reflection surface 37. The laser beam that has reached the reflecting surface 37 changes its traveling direction by 90 ° and enters one end of the core 33. The laser beam that has propagated through the core 33 and reached the other end is reflected by the reflecting surface of the optical path changing unit provided there, and again changes the traveling direction by 90 °. For this reason, the laser light is emitted from the waveguide back surface 32 side of the optical waveguide 30 and enters the light receiving portion of the photodiode. Then, the photodiode converts the optical signal into an electric signal and outputs it to the receiver IC. The receiver IC amplifies it and outputs it to the substrate.

  Next, a method for manufacturing the optical waveguide device 10 will be described with reference to the drawings.

  First, a substrate preparation step is performed, and the wiring substrate 20 is prepared by a conventionally known method and prepared in advance. The wiring board 20 is manufactured as follows. First, a copper clad laminate (not shown) in which a copper foil is pasted on both surfaces of a base 50 mm long × 50 mm wide × 0.8 mm thick is prepared. Then, laser drilling is performed using a YAG laser or a carbon dioxide gas laser, and a through hole penetrating the copper-clad laminate is formed in advance at a predetermined position. Next, after the through-hole conductor 16 is formed by performing electroless copper plating and electrolytic copper plating according to a conventionally known method, the closure body 17 is filled in the through-hole conductor 16. Further, after performing copper plating, the lid-like conductor 18 is patterned by etching the copper foil on both sides of the copper-clad laminate. Specifically, after electroless copper plating, exposure and development are performed to form a predetermined pattern of plating resist. In this state, after electrolytic copper plating is performed using the electroless copper plating layer as a common electrode, first, the resist is dissolved and removed, and further unnecessary electroless copper plating layer is removed by etching. As a result, the core substrate 11 is obtained.

  Next, a photosensitive epoxy resin is applied to the core main surface 12 and the core back surface 13 of the core substrate 11, and exposure and development are performed, whereby a first layer having a blind hole at a position where the via conductor 72 is to be formed. The resin insulation layers 61 and 71 are formed. Note that the first resin insulation layers 61 and 71 having blind holes may be formed by applying laser irradiation after depositing an epoxy resin on the core main surface 12 and the core back surface 13. Further, electrolytic copper plating is performed according to a conventionally known method (for example, a semi-additive method) to form a via conductor 72 in the blind hole and to form a wiring layer 62 on the resin insulating layers 61 and 71.

  Next, a photosensitive epoxy resin is deposited on the first resin insulation layers 61 and 71, and exposure and development are performed, whereby the second layer having blind holes at positions where the via conductors 72 are to be formed. Resin insulating layers 61 and 71 are formed. The second resin insulation layers 61 and 71 having blind holes may be formed by applying laser light after depositing an epoxy resin on the first resin insulation layers 61 and 71. Good. Next, electrolytic copper plating is performed according to a conventionally known method to form a via conductor 72 inside the blind hole. Further, the terminal pads 64 are formed on the second resin insulation layer 61, and the plurality of substrate-side connection terminals 73 are formed on the second resin insulation layer 71. At this point, the wiring board 20 in which the board side connection terminals 73 are arranged on the board main surface 21 side is completed.

  After the substrate preparation step, a solder resist forming step is performed to form a solder resist 75 on the substrate main surface 21 (on the second resin insulating layer 71). Also, a solder resist 65 is formed on the substrate back surface 22 (on the second resin insulating layer 61). Next, exposure and development are performed with a predetermined mask placed, and openings 66 and 76 are patterned in the solder resists 65 and 75. Thereafter, electroless gold plating is performed according to a conventionally known method. Further, a pin 67 is attached to the terminal pad 64 exposed in the opening 66 by soldering. Note that the via conductor 77 in the opening 76 can be formed by the same method as that for forming the wiring pattern 52.

  Further, an optical waveguide preparation step is performed, and the optical waveguide 30 is prepared by a conventionally known technique and prepared in advance. The optical waveguide preparation process includes an upper clad forming process, a core forming process, and a lower clad forming process.

In the upper clad forming step, the upper clad 35 in the optical waveguide 30 is formed. For example, first, an epoxy compound [alicyclic epoxy compound (EHPE3150 manufactured by Daicel Chemical Industries, Ltd.) is 99.5% by mass, and a polymerization initiator (photoacid generator SP172 manufactured by Asahi Denka Kogyo Co., Ltd.) is included. A curable composition containing 0.5% by mass] and a solvent (methyl ethyl ketone) are mixed and dissolved to prepare a mixed solution having a solid content of 78%. Then, the obtained mixed solution is apply | coated by the casting method on a support body (PET film of thickness 38 micrometers). Next, drying is performed for 30 minutes while heating to 70 ° C. As a result, the solvent is removed, and an uncured film for clad formation is obtained. Then, the uncured film is transferred by laminating the uncured film on a predetermined substrate such as a metal foil. Specifically, a pressure of 0.5 MPa is applied in the stacking direction of the substrate and the uncured film while being heated to 40 ° C. to 50 ° C. Furthermore, after peeling the PET film, drying is performed for 30 minutes in a state heated to 70 ° C. As a result, the solvent is removed and the uncured upper clad 35 is obtained. Instead of the above method, it is also possible to form the uncured upper clad 35 by applying a clad forming liquid by a known method such as spin coating and drying. Thereafter, the uncured upper clad 35 is exposed using an ultraviolet lamp (exposure amount: 2000 mJ / cm ² , about 7 minutes), post-baked (120 ° C., 30 minutes), and main curing (150 ° C., 1 minute). Time), a fully hardened upper cladding 35 is obtained.

In the subsequent core forming step, the core 33 in the optical waveguide 30 is formed. For example, first, epoxy compound [aromatic epoxy compound (Epicoat 1001 manufactured by Japan Epoxy Resin Co., Ltd.) is 44.5% by mass, alicyclic epoxy compound (EHPE3150 manufactured by Daicel Chemical Industries, Ltd.) is 55. A curable composition containing 0.0% by mass and 0.5% by mass of a polymerization initiator (photoacid generator SP172 manufactured by Asahi Denka Kogyo Co., Ltd.) is prepared. Next, this curable composition and a solvent (methyl ethyl ketone) are mixed and dissolved to prepare a mixed solution having a solid content of 78%. Then, the obtained mixed solution is apply | coated by the casting method on a support body (for example, PET film with a thickness of 38 micrometers). Next, drying is performed for 30 minutes while heating to 70 ° C. As a result, the solvent is removed, and an uncured film for core formation is obtained. The obtained uncured film is laminated on the upper clad 35 and laminated. Specifically, a pressure of 0.5 MPa is applied in the lamination direction of the upper clad 35 and the uncured film while being heated to 40 ° C. to 50 ° C. Furthermore, after peeling the PET film, the core 33 in an uncured state is formed by performing drying for 30 minutes in a state heated to 70 ° C. After that, a photomask having a predetermined pattern is placed on the uncured core 33, and in this state, exposure using an ultraviolet lamp (exposure amount: 500 mJ / cm ² , about 2 minutes) and post-baking (120 (C, 30 minutes). As a result, the exposed portion is in a temporarily cured state. Next, the development (30 seconds) using 2-methoxyethanol is performed to remove the uncured resin, and the residue of the uncured resin is washed and removed using isopropyl alcohol (IPA). The core 33 in the state is patterned. Then, the completely cured core 33 is obtained by performing main curing (150 ° C., 1 hour). Instead of forming the core 33 by performing exposure and development, the core 33 may be formed by using another method depending on the material. For example, the core 33 may be formed by performing photobleaching. Also good.

In the lower cladding formation step, the lower cladding 34 in the optical waveguide 30 is formed. Here, the same uncured film (uncured film for forming the lower clad) used in the upper clad forming step is prepared. Then, the obtained uncured film is laminated on the core 33 and the upper clad 35 and heated to 40 ° C. to 50 ° C., and 0.5 MPa in the laminating direction of the upper clad 35, the core 33 and the uncured film. Apply pressure. Thereafter, the PET film is peeled off, and then dried for 30 minutes while being heated to 70 ° C., thereby forming the uncured lower clad 34. Next, an uncured lower clad 34 is exposed using an ultraviolet lamp (exposure amount 2000 mJ / cm ² , about 7 minutes), post-baking (120 ° C., 30 minutes), and main curing (150 ° C., 1 hour), a completely hardened lower clad 34 is obtained, and the optical waveguide 30 is completed.

  Next, the IC chip is placed on the substrate main surface 21 with the chip back surface of the IC chip facing the substrate main surface 21 side (specifically, the chip back surface is in contact with the surface of the solder resist 75). Is installed. The driver IC 80 has a driver back surface on the substrate main surface 21 in a state where the element back surface 82 faces the substrate main surface 21 side (specifically, the element back surface 82 is in contact with the surface of the solder resist 75). IC80 is mounted. The receiver IC is mounted on the substrate main surface 21 through the same process as the driver IC 80.

  In the subsequent optical element mounting step, the VCSEL 40 is mounted on the substrate main surface 21 side with the element back surface 42 facing the substrate main surface 21 of the wiring substrate 20 by normal die bonding. The photodiode is mounted on the substrate main surface 21 side through the same process as the VCSEL 40.

  In the wiring pattern formation process after the optical element mounting process, the wiring pattern 52 connected to the element side terminal 87 of the driver IC 80 or the element side terminal 45 of the VCSEL 40 is sprayed with ink (copper paste) containing a conductive material. Form. In the wiring pattern formation step, the wiring pattern 51 that connects the chip-side element of the IC chip and the element-side terminal 85 of the driver IC 80 is formed together with the wiring pattern 52 by spraying ink.

  More specifically, first, a nozzle of an ink jet device (not shown) (an electrostatic ink jet device in the present embodiment) is disposed above the chip main surface of the IC chip. Then, ink is ejected from the nozzles to form wiring patterns 51 on the chip main surface. Next, the ink jet apparatus (and the nozzle) is linearly moved from the IC chip toward the driver IC 80 while ejecting ink from the nozzle. As a result, the wiring pattern 51 is formed in the order of the chip side surface of the IC chip, the surface of the solder resist 75, the element side surface 83 of the driver IC 80, and the element main surface 81 of the driver IC 80 (on the element side terminal 85). .

  Thereafter, the ejection of ink from the nozzles is stopped, and the nozzles of the ink jet apparatus are moved above the element side terminals 87. Then, the ink is again ejected from the nozzles, and the wiring pattern 52 is formed on the element main surface 81 (on the element side terminal 87). Next, the ink jet apparatus (and the nozzle) is linearly moved from the driver IC 80 toward the VCSEL 40 while ejecting ink from the nozzle. As a result, a part of the wiring pattern 52 is formed in order of the element side surface 83 of the driver IC 80 → the surface of the solder resist 75 (and the end surface of the solder resist 75 in the via conductor 77 on the driver IC 80 side). . At this time, the ejection of ink from the nozzles is stopped again, and the nozzles of the inkjet device are moved to the VCSEL 40 side. Next, ink is again ejected from the nozzles, and the ink jet apparatus (and the nozzles) are linearly moved toward the VCSEL 40. As a result, on the surface of the solder resist 75 (and on the surface side end surface of the solder resist 75 in the via conductor 77 on the VCSEL 40 side) → on the element side surface 43 of the VCSEL 40 → on the element main surface 41 of the VCSEL 40 (on the element side terminal 45) The remaining portions of the wiring pattern 52 are formed in this order.

  In the subsequent optical coupling step, the reflecting surface 37 of the optical waveguide 30 is arranged so as to be optically coupled with the optical function part (light emitting part 44, light receiving part), and fixed by a positioning mechanism such as a guide pin (not shown). At this point, the optical waveguide device 10 is completed.

  Therefore, according to the present embodiment, the following effects can be obtained.

  (1) According to the optical waveguide device 10 of the present embodiment, the wiring pattern 52 is connected to the element side terminal 45 of the VCSEL 40. The wiring pattern 52 adheres to the surface of the VCSEL 40 by being layered on the element main surface 41 and the element side surface 43, and adheres to the surface of the wiring substrate 20 by being layered on the outermost surface 50. Therefore, it is planar. Therefore, when the optical waveguide 30 and the VCSEL 40 are optically coupled, the wiring pattern 52 is prevented from interfering with the optical waveguide 30. As a result, the optical waveguide 30 can be reliably approached (and contacted) with the VCSEL 40, so that the light transmission loss can be reduced. Moreover, in order to reduce the light transmission loss, an optical component such as a lens is interposed between the optical waveguide 30 and the VCSEL 40, or the element-side terminal 45 is disposed on a surface different from the light emitting unit 44 (for example, on the element back surface 42). Since it does not need to move, an increase in the number of parts and man-hours can be prevented, and the manufacturing cost of the optical waveguide device 10 can be suppressed.

  (2) By the way, in the prior art using the bonding wire 105 (see FIG. 9), a ball portion having an outer diameter of about 50 μm is formed at the primary side end of the bonding wire 105 (that is, the connection portion with the element side terminal of the optical element 102). It is necessary to form a wedge part (in the case of ball bonding) or a wedge part (in the case of wedge bonding) having a length of about 50 μm. As a result, the diameter of the element-side terminal needs to be about 50 μm, so the minimum value of the pitch between the adjacent element-side terminals is about 125 μm.

  On the other hand, in this embodiment, not the bonding wire 105 but the wiring pattern 52 is connected to the element side terminal 45 of the VCSEL 40. Since the width of the wiring pattern 52 of this embodiment can be 5 μm, the element-side terminal 45 can have a diameter of about 5 μm, and the pitch between adjacent element-side terminals can be greatly reduced to about 10 μm. can do. As a result, the element-side terminal 45 can be reduced in size, and consequently the VCSEL 40 can be reduced in size. Along with this, many channels can be arranged in the same region, so that the transmission capacity can be increased.

  In addition, the wiring pattern 52 formed by the ink jet apparatus has a parasitic inductor smaller than that of the bonding wire 105, so that signal reflection due to impedance mismatch can be suppressed. Therefore, an electrical path that is effective for high-speed signal transmission and that can suppress noise can be obtained. In the present embodiment, since the wire bonding by the bonding wire 105 is not performed, the VCSEL 40 is not subjected to ultrasonic vibration or impact during the wire bonding. Therefore, failure of the VCSEL 40 due to wire bonding can be avoided. Furthermore, the wiring pattern 52 is not made of gold or silver generally used for the bonding wire 105 but is made of copper which is cheaper than gold or silver, so that the cost can be reduced.

  (3) Although it is conceivable to form the wiring patterns 51 and 52 by using a piezo-type ink jet device, there is a possibility that a part (so-called bulge) or a thin part of ink is generated in a part of the wiring patterns 51 and 52. There is. On the other hand, in the present embodiment, since the wiring patterns 51 and 52 are formed using an electrostatic ink jet apparatus, the above problem can be solved. In addition, the wiring patterns 51 and 52 having excellent linearity can be formed.

  (4) In this embodiment, since the wiring pattern 51 that connects the chip-side element of the IC chip and the element-side terminal 85 of the driver IC 80 is formed to extend linearly, the chip-side terminal and the element-side terminal 85. The electrical path connecting between the two becomes shorter. Therefore, the transmission loss of the signal flowing between the chip-side element and the element-side terminal 85 is reduced, so that signal quality deterioration can be prevented.

  In addition, you may change this embodiment as follows.

  The optical waveguide device 10 of the above embodiment is formed at a position facing the light emitting unit 44 on the wiring substrate 20, the VCSEL 40 mounted on the substrate main surface 21 of the wiring substrate 20, and the element main surface 41 of the VCSEL 40. And an optical waveguide 30 having a structure. However, the optical waveguide device 10 may have other structures.

  For example, as shown in the optical waveguide device 110 in FIG. 3, the VCSEL 111 is mounted on the substrate main surface 115 side of the wiring substrate 114 via the die bonding portion 113 having the fillet portion 112 having a fillet shape, and the wiring pattern 116 is mounted. May be formed on the element main surface 117, the element side surface 118, the surface 119 of the fillet portion 112, and the outermost surface 120 of the wiring substrate 114. In this way, by forming a part of the die bonding part 113 (fillet part 112) into a fillet shape, the VCSEL 111 can be mounted on the substrate main surface 115 side with sufficient strength, so that the reliability is improved. . As shown in the optical waveguide device 210 in FIG. 4, a recess 213 that opens on the outermost surface 212 of the wiring substrate 211 is provided, the VCSEL 214 is accommodated in the recess 213, and the gap between the recess 213 and the VCSEL 214 is formed as a die bonding portion. You may make it fill with a part of 215. FIG. In this way, even if the die bonding part 215 is provided, the VCSEL 214 can be mounted at a low position, so that the optical waveguide device 210 can be thinned. Further, as shown in the optical waveguide device 310 of FIG. 5, the optical waveguide 311 may be connected to the VCSEL 312 from above.

  By the way, the solder resist 75 is generally lower in strength than the resin insulating layer 71. Therefore, as shown in the optical waveguide device 410 of FIG. 6, a recess 414 for exposing the substrate main surface 412 (the surface of the resin insulating layer 413) is provided in the solder resist 411 so that the VCSEL 415 is accommodated in the recess 414. It may be. In this case, the VCSEL 415 is directly supported by the resin insulating layer 413 having higher strength than the solder resist 411, so that reliability is improved.

  In the above embodiment, the solder resist 75 is formed on the substrate main surface 21 of the wiring substrate 20, and the wiring patterns 51 and 52 are formed on the surface of the solder resist 75 that becomes the outermost surface 50. However, the solder resist 75 may be omitted, and the wiring patterns 51 and 52 may be formed on the substrate main surface 21 that is the outermost surface.

  In the above embodiment, the wiring pattern 52 and the substrate side connection terminal 73 are connected via the via conductor 77. However, the wiring pattern 52 and the board-side connection terminal 73 may be directly connected by forming the board-side connection terminal 73 on the surface of the solder resist 75.

  The VCSEL 40 (optical element) of the above embodiment has the light emitting unit group 46 (optical functional unit group) and the element side terminal group 47 in the element main surface 41 one by one. However, the optical functional unit group and the element side terminal group may have a plurality of rows alternately in the element main surface. For example, as illustrated in FIG. 7, the VCSEL 540 may include two rows of light emitting unit groups 546 and element side terminal groups 547 alternately in the element main surface 541.

  The wiring pattern 52 of the above embodiment electrically connects between the board side connection terminal 73 and the element side terminal 45 of the VCSEL 40, or between the board side connection terminal 73 and the element side terminal 87 of the driver IC 80. It was. The wiring pattern 52 is configured to electrically connect the element side terminal 45 and the element side terminal 87 via the substrate side connection terminal 73 and the via conductor 77. However, unlike the optical waveguide device 610 shown in FIG. 8, without connecting the wiring pattern 611 and the substrate side connection terminal 612, the element side terminal 614 of the driver IC 613 and the element side terminal 616 of the VCSEL 615 (optical element) May be directly connected by the wiring pattern 611. In this way, the electrical path connecting the element side terminals 614 and 616 is shortened. Therefore, since the transmission loss of the signal flowing between the element side terminals 614 and 616 is reduced, signal quality deterioration can be prevented.

  Next, the technical ideas grasped by the embodiment described above are listed below.

  (1) A method for manufacturing an optical waveguide device according to the above means 1, wherein a substrate preparation step for preparing the wiring substrate, an optical waveguide preparation step for preparing the optical waveguide, and the element main surface through the optical waveguide An optical element mounting step of mounting the optical element on the substrate main surface side in a state where the optical element is in contact with the waveguide and the back surface of the element faces the main surface of the substrate; A wiring pattern forming step of forming a wiring pattern connected to the element-side terminal on the surface, the element side surface, and the outermost surface of the wiring substrate by spraying ink containing a conductive material. A method for manufacturing an optical waveguide device.

  (2) In the technical tree idea (1), after the substrate preparation step and before the optical element mounting step, a solder resist forming step for forming a solder resist on the substrate main surface is performed, and in the wiring pattern forming step, The method of manufacturing an optical waveguide device, wherein the wiring pattern is formed on a surface of the solder resist which is the outermost surface.

  (3) In the technical idea (1) or (2), the wiring pattern is formed using an ink jet apparatus, and the ink jet apparatus is an electrostatic ink jet apparatus. Method.

10, 110, 210, 310, 410, 610 ... optical waveguide devices 20, 114, 211 ... wiring boards 21, 115, 412 ... substrate main surface 22 ... substrate back surface 30, 311 ... optical waveguide 33 ... core 34 ... as cladding Lower clad 35... Upper clad 40, 111, 214, 311, 415, 540, 615 as a clad VCSEL as an optical element
41, 117, 541 ... element main surface 42 ... element back surface 43, 118 ... element side face 44 ... light emitting part 45, 616 ... element side terminal 46, 546 ... light emitting part group 47 as an optical function part group, 547... Element side terminal groups 50, 120, 212... Outermost surfaces 52, 116, 611 of the wiring board .. wiring patterns 61, 71, 413... Resin insulating layer 62 as an insulating layer. 411 ... Solder resist 112 ... Fillet portions 113, 215 ... Die bonding portion 119 ... Surface L2 of fillet portion ... Pitch between adjacent element side terminals

Claims (10)

A wiring board having a substrate main surface and a substrate back surface;
The device main surface has an element main surface, an element back surface, and an element side surface, and has an optical function part having at least one function of light emission and light reception and an element side terminal on the element main surface, and the element back surface is the substrate main surface. With the optical element mounted on the substrate main surface side,
An optical waveguide device comprising an optical waveguide formed on a position facing the optical functional unit on the element main surface and having a core serving as an optical path through which an optical signal propagates and a clad surrounding the core,
An optical waveguide device, wherein a wiring pattern connected to the element-side terminal is formed on the element main surface, the element side surface, and the outermost surface of the wiring substrate.   2. The optical waveguide device according to claim 1, wherein a solder resist is formed on the substrate main surface of the wiring substrate, and the wiring pattern is disposed on a surface of the solder resist that is the outermost surface. .   The optical waveguide device according to claim 2, wherein the wiring pattern is disposed on a surface of the solder resist via a coupling agent.   4. The wiring board according to claim 2, wherein the wiring board is formed by laminating a plurality of wiring layers and a plurality of insulating layers, and the wiring layer as the outermost layer is a ground layer in the wiring board. Optical waveguide device.   5. A plurality of board side connection terminals are arranged on the board main surface side, and the wiring pattern connects the board side connection terminals and the element side terminals. 2. An optical waveguide device according to item 1. The optical element includes an optical functional unit group in which a plurality of optical functional units are arranged on a straight line at an equal pitch, and an element side terminal group in which a plurality of the element side terminals are arranged. Have in
The optical waveguide device according to any one of claims 1 to 5, wherein a minimum value of a pitch between adjacent element-side terminals is set to 40 µm or less.   The optical element includes an optical functional unit group in which a plurality of optical functional units are arranged on a straight line at an equal pitch, and an element side terminal group in which a plurality of the element side terminals are arranged. The optical waveguide device according to any one of claims 1 to 6, wherein the optical waveguide device has a plurality of rows alternately in a plane. The optical element is mounted on the substrate main surface side through a die bonding portion having a fillet portion having a fillet shape,
8. The wiring pattern according to claim 1, wherein the wiring pattern is formed on the element main surface, the element side surface, the surface of the fillet portion, and the outermost surface of the wiring substrate. An optical waveguide device according to 1.   The optical waveguide device according to any one of claims 1 to 8, wherein the wiring pattern is formed by spraying ink containing a conductive material.   5. A liquid repellent agent is applied to a surface of the solder resist, and the wiring pattern is formed in a non-application area between the application areas of the liquid repellent agent. An optical waveguide device according to item.

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