JP2014154571A - Power module substrate - Google Patents

Power module substrate Download PDF

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JP2014154571A
JP2014154571A JP2013020019A JP2013020019A JP2014154571A JP 2014154571 A JP2014154571 A JP 2014154571A JP 2013020019 A JP2013020019 A JP 2013020019A JP 2013020019 A JP2013020019 A JP 2013020019A JP 2014154571 A JP2014154571 A JP 2014154571A
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semiconductor element
copper plate
power module
raised portion
substrate
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Takayuki Kamae
隆行 鎌江
Naoyuki Kanehara
尚之 金原
Hideki Matsunaga
秀樹 松永
Akihiro Hidaka
明弘 日高
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Nippon Steel and Sumikin Electronics Devices Inc
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Nippon Steel and Sumikin Electronics Devices Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Abstract

PROBLEM TO BE SOLVED: To provide a power module substrate which reduces a residual void in a solder layer when joining a semiconductor device.SOLUTION: A power module substrate 10 comprises one or more copper plates which are joined to both principal surfaces of a ceramic substrate 11 by heating according to a direct junction method or an active metal brazing filler material junction method and of which the regions are independent, respectively. The power module substrate 10 further comprises: an overlay part 16 which protrudes on a mount copper plate 15 for placing a semiconductor device 14 thereon, among the copper plates smaller than a size of the semiconductor device 14 while flattening the top face thereof, for placing the semiconductor device 14 thereon; a groove-like or a hole-like recess 17 which is formed on the top face of the overlay part 16 with a depth equal to or less than a thickness of the overlay part 16; and a notch 18 extending to an outer edge of the overlay part 16 while communicating to the recess 17.

Description

本発明は、セラミック基板の両主面のそれぞれに銅板が接合され、大量の熱を発する半導体素子を銅板の中のマウント用銅板に半田接合した時の半導体素子の接合信頼性を確保できるパワーモジュール用基板に関する。   The present invention relates to a power module capable of ensuring the bonding reliability of a semiconductor element when a copper element is bonded to each of both main surfaces of a ceramic substrate and a semiconductor element emitting a large amount of heat is soldered to a mounting copper sheet in the copper sheet. It is related with a substrate.

従来より、半導体素子を半田で接合させると共に、ボンディングワイヤで電気的に接続状態とし、半導体素子からの発熱を速やかに放熱させて大電力化、高速化、高集積化の進むパワートランジスタ等の高熱を発する半導体素子の信頼性を維持できるパワーモジュール用基板は、民生機器用や、自動車、電気自動車等の車載用等に採用されている。このようなパワーモジュール用基板は、通常、１個分のセラミック基板や、複数個分がマトリックス状に配列することができるセラミック基板に、予めパターン形成された銅板を銅の融点を利用して直接加熱接合する直接接合法や、活性金属ろうを介して加熱接合する活性金属ろう材接合法で接合して形成されている。そして、複数個分がマトリックス状に配列するセラミック基板の場合には、最後に分割溝で分割して個片体にすることでパワーモジュール用基板が形成されている。また、パワーモジュール用基板には、大型のセラミック基板の両主面のそれぞれに大型の銅板を直接接合法、又は活性金属ろう材接合法で加熱接合した後、それぞれの大型銅板の主面をエッチングして個片体用の銅板を形成する場合もある。   Conventionally, a semiconductor element is joined with solder and electrically connected with a bonding wire, and heat generated from the semiconductor element is quickly dissipated to increase the power, speed, and integration of the power transistor. Power module substrates capable of maintaining the reliability of semiconductor elements that emit light are used for consumer equipment, and for in-vehicle use such as automobiles and electric cars. Such a power module substrate is usually obtained by directly applying a pre-patterned copper plate to a ceramic substrate for one piece or a ceramic substrate in which a plurality of pieces can be arranged in a matrix using the melting point of copper. It is formed by bonding by a direct bonding method in which heat bonding is performed or an active metal brazing material bonding method in which heat bonding is performed through an active metal brazing. In the case of a ceramic substrate in which a plurality of ceramic substrates are arranged in a matrix, a power module substrate is formed by finally dividing the ceramic substrate into divided pieces to form individual pieces. For power module substrates, a large copper plate is heated and bonded to each of the main surfaces of a large ceramic substrate by direct bonding or active metal brazing, and then the main surfaces of the large copper plates are etched. In some cases, a copper plate for an individual piece is formed.

上記のパワーモジュール用基板には、セラミック基板の両主面のそれぞれに接合された銅板の中のマウント用銅板に半導体素子が数十μｍの厚さの半田で接合されるようになっている。パワーモジュール用基板は、この半田接合において、熱膨張率の異なる銅板と、半導体素子が薄い半田層で接合されると、半田層で銅と、半導体素子の熱膨張率差を吸収できず、機械的強度の弱い半導体素子に熱応力が集中して半導体素子の機械的信頼性に影響を及ぼすこととなるので、半田層の厚さをある程度厚くすることが必要となっている。また、パワーモジュール用基板は、この半田接合において、加熱接合時に溶融した半田の中に気泡を巻き込み易く、しかも、半田層の厚さが厚くなると更に半田の中に気泡を巻き込む、所謂、ボイドの発生が多くなり、半田層中のボイドで半田が半導体素子の外周から溢れ出して半導体素子を持ち上げて傾けたりする原因となるので、残留するボイドの大小を吸収できる程度の半田層の厚さにすることが必要となっている。しかしながら、パワーモジュール用基板は、大、小のさまざまな大きさの残留ボイドを十分に吸収できる程度に半田層の厚さを厚くしすぎると、半田の熱伝導率が銅に比べて低いのと、半田層の中のボイドによって半導体素子からの発熱の放熱性を阻害したり、半導体素子接合時のバランスが取り辛くなるので、これらを防止できるボイドが少なく、適正な厚みの半田層にコントロールすることが必要となっている。   In the power module substrate, a semiconductor element is bonded to a mounting copper plate in a copper plate bonded to each of the two main surfaces of the ceramic substrate with solder having a thickness of several tens of micrometers. In this solder joint, the power module substrate cannot absorb the difference in thermal expansion coefficient between the copper and the semiconductor element when the copper element having a different thermal expansion coefficient and the semiconductor element are joined with a thin solder layer. Since thermal stress concentrates on a semiconductor element with low mechanical strength and affects the mechanical reliability of the semiconductor element, it is necessary to increase the thickness of the solder layer to some extent. In addition, the power module substrate is easy to entrain bubbles in the solder melted during the heat joining in this solder joint, and further entrains the bubbles in the solder when the solder layer becomes thicker. Since the generation of the voids in the solder layer causes the solder to overflow from the outer periphery of the semiconductor element and cause the semiconductor element to be lifted and tilted, the thickness of the solder layer is sufficient to absorb the size of the remaining void. It is necessary to do. However, if the thickness of the solder layer is too thick for the power module substrate to sufficiently absorb residual voids of various sizes, large and small, the thermal conductivity of the solder is lower than that of copper. Since the voids in the solder layer hinder the heat dissipation of the heat generated from the semiconductor element and the balance at the time of bonding the semiconductor element becomes difficult, there are few voids that can prevent these and control the solder layer to an appropriate thickness It is necessary.

しかしながら、従来のパワーモジュール用基板は、半田接合において半田層に発生する残留ボイドの発生量も、発生したボイドの抜け量の何れの制御も困難であり、マウント用銅板に半導体素子を接合させるための半田量を正しく見積もることができなくなっている。従って、半田層は、残留ボイドがなければ半田容積は最小になり、逆に残留ボイドが多いと見かけの半田容積が大きくなっている。   However, in the conventional power module substrate, it is difficult to control either the amount of residual voids generated in the solder layer or the amount of voids generated in the solder bonding, and the semiconductor element is bonded to the mounting copper plate. The amount of solder cannot be estimated correctly. Therefore, the solder layer has a minimum solder volume if there are no residual voids. Conversely, if there are many residual voids, the apparent solder volume increases.

そこで、パワーモジュール用基板ではないが、半導体素子がリードフレームのダイパッドに傾いて搭載されることを防止できる半導体装置には、ダイパッドの中央部に上面が平坦になされた、上面の面積が半導体素子の面積より小さく、高さが２０μｍ以上の突起部が形成されたものが提案されている（例えば、特許文献１参照）。   Therefore, in a semiconductor device that is not a power module substrate but can prevent the semiconductor element from being inclined and mounted on the die pad of the lead frame, the upper surface is flat at the center of the die pad. The one in which a protrusion having a height of 20 μm or more is formed (see, for example, Patent Document 1).

また、半導体素子付けの半田層を均一厚に保ち、且つ、熱抵抗を増加させないパワー系半導体装置には、リードフレームの一部に半導体素子が半田ろう材を介して接続され、この半田ろう材が半導体素子中央部とその近傍の直下部の厚さが厚くなるように、リードフレーム面の半導体素子取付部周縁に沿って溝ないし凹凸段差が形成されているものが提案されている（例えば、特許文献２参照）。   In addition, in a power semiconductor device that maintains a uniform solder layer with a semiconductor element and does not increase thermal resistance, a semiconductor element is connected to a part of the lead frame via a solder brazing material. Has been proposed in which grooves or uneven steps are formed along the periphery of the semiconductor element mounting portion on the lead frame surface so that the thickness of the semiconductor element central portion and the immediate lower portion in the vicinity thereof is increased (for example, Patent Document 2).

更に、半導体素子を銅回路板に半田接合する際の半田層の中のボイドの発生を防止し、半導体素子とセラミック基板との間の熱抵抗値のばらつきを低減するとともに、半導体素子搭載部に作用する熱応力を緩和することが可能な従来のパワーモジュール用基板には、セラミック基板上の所定位置に銅回路板を配置して加熱することにより銅回路板を直接接合し、この銅回路板上の半導体素子搭載部に半田層を介して半導体素子を接合するセラミック回路基板において、溝または穴を形成した銅板要素を上記半導体素子搭載部に直接接合し、この銅板要素の溝または穴を形成した側の表面上に半田層を介して半導体素子を一体に接合したものが提案されている（例えば、特許文献３参照）。   Furthermore, it prevents voids in the solder layer when soldering a semiconductor element to a copper circuit board, reduces variations in the thermal resistance value between the semiconductor element and the ceramic substrate, and allows the semiconductor element mounting portion to A copper circuit board is directly joined to a conventional power module board capable of relaxing the applied thermal stress by placing and heating the copper circuit board at a predetermined position on the ceramic substrate. In a ceramic circuit board that joins a semiconductor element to the upper semiconductor element mounting part via a solder layer, a copper plate element in which a groove or a hole is formed is directly joined to the semiconductor element mounting part, and a groove or hole of the copper plate element is formed. There has been proposed one in which a semiconductor element is integrally joined to the surface on the soldered side via a solder layer (see, for example, Patent Document 3).

なお、パワーモジュール用基板ではないが、半田の厚みを所定の厚みに精度良く調整でき、半導体素子がリードフレームのダイパッドに対して傾くことを抑制できるモールド樹脂封止型の半導体装置には、半導体素子と、半導体素子を半田で接合して搭載するリードフレームのダイパッドとを備え、ダイパッドの半導体素子が搭載される面に、半導体素子とダイパッドとを半田で接合する際に両者の間隔を所定間隔に保つ突起部を設けたものが提案されている（例えば、特許文献４参照）。この特許文献４で開示されるような、半導体装置に突起部を設けることは、セラミック基板の両主面のそれぞれに銅板が接合され、大量の熱を発する半導体素子を銅板の中のマウント用銅板に半導体素子を半田接合するパワーモジュール用基板にも応用することができる。   Although not a power module substrate, a mold resin-encapsulated semiconductor device in which the thickness of the solder can be accurately adjusted to a predetermined thickness and the semiconductor element can be prevented from being inclined with respect to the die pad of the lead frame includes a semiconductor. An element and a die pad of a lead frame on which the semiconductor element is bonded and mounted by soldering, and when the semiconductor element and the die pad are bonded to the surface of the die pad on which the semiconductor element is mounted by using a predetermined interval The thing which provided the projection part kept in this is proposed (for example, refer patent document 4). Providing the semiconductor device with protrusions as disclosed in Patent Document 4 is that a copper plate is bonded to each of both main surfaces of the ceramic substrate, and a semiconductor element that generates a large amount of heat is mounted on the copper plate for mounting in the copper plate. It can also be applied to a power module substrate to which a semiconductor element is soldered.

特開平８−１１６００７号公報JP-A-8-116007 特開平６−３７１２２号公報JP-A-6-37122 特開平７−２０２０６３号公報JP-A-7-202063 特開２００８−１８１９０８号公報JP 2008-181908 A

しかしながら、前述したような従来のパワーモジュール用基板は、次のような問題がある。
（１）特開平８−１１６００７号公報で開示される半導体装置を応用するパワーモジュール用基板や、特開平６−３７１２２号公報で開示されるようなパワー系半導体装置を応用するパワーモジュール用基板は、半田接合において突起部の上面や、半導体素子取付部の上面に発生する半田層の中の残留ボイドの抜け口が無く、残留ボイドによって熱伝導性が低下して半導体素子からの発熱の放熱性を阻害することとなっている。また、このようなパワーモジュール用基板は、半田層の中に巻き込む残留ボイドによって半導体素子の平坦性が阻害され、ボンディングワイヤ等の接続信頼性を低下させることとなっている。
（２）特開平７−２０２０６３号公報で開示されるようなパワーモジュール用基板は、銅板要素である突起部に設ける溝又は穴が半導体素子より小さい形態となっているので、半田巣である半田層の中の残留ボイドが溝又は穴に閉じ込められ、半田層の中に閉じ込められた残留ボイドによって、熱伝導性が低下して半導体素子からの発熱の放熱性を阻害することとなっている。また、銅板要素である突起部に設ける溝又は穴に閉じ込められた残留ボイドは、半導体素子を突起部上で傾いて接合させることとなるので、ボンディングワイヤ等の接続信頼性を低下させることとなっている。 However, the conventional power module substrate as described above has the following problems.
(1) A power module substrate to which a semiconductor device disclosed in JP-A-8-116007 is applied, or a power module substrate to which a power semiconductor device as disclosed in JP-A-6-37122 is applied. In addition, there is no exit hole for residual voids in the solder layer generated on the upper surface of the protrusions and the upper surface of the semiconductor element mounting part in solder bonding, and the thermal conductivity is reduced by the residual voids, and heat dissipation from the semiconductor element It is supposed to inhibit. Further, in such a power module substrate, the flatness of the semiconductor element is hindered by residual voids wound in the solder layer, and the connection reliability of bonding wires and the like is lowered.
(2) A power module substrate as disclosed in Japanese Patent Application Laid-Open No. 7-202063 has a groove or a hole provided in a protrusion, which is a copper plate element, smaller than a semiconductor element. Residual voids in the layer are confined in the grooves or holes, and the residual voids confined in the solder layer lower the thermal conductivity and inhibit the heat dissipation of the heat generated from the semiconductor element. In addition, residual voids confined in the grooves or holes provided in the protrusions, which are copper plate elements, cause the semiconductor element to be inclined and bonded on the protrusions, thereby reducing the connection reliability of bonding wires and the like. ing.

本発明は、かかる事情に鑑みてなされたものであって、半導体素子接合時の半田層の中の残留ボイドを少なくするパワーモジュール用基板を提供することを目的とする。   The present invention has been made in view of such circumstances, and an object of the present invention is to provide a power module substrate that reduces residual voids in a solder layer at the time of joining a semiconductor element.

前記目的に沿う本発明に係るパワーモジュール用基板は、セラミック基板の両主面のそれぞれに直接接合法、又は活性金属ろう材接合法で加熱接合され、それぞれの領域が独立する１、又は複数個からなる銅板を有するパワーモジュール用基板において、銅板の中の半導体素子を搭載するためのマウント用銅板上に半導体素子の大きさより小さく上面を平坦面として突出する半導体素子を載置させるための嵩上げ部と、嵩上げ部の上面に嵩上げ部の厚み以下の深さからなる溝状、又は穴状の凹み部と、凹み部に連通して嵩上げ部の外周縁に延設する切り欠き部を有する。   One or a plurality of power module substrates according to the present invention that meet the above-mentioned objects are heat-bonded to the respective main surfaces of the ceramic substrate by a direct bonding method or an active metal brazing material bonding method, and each region is independent. A power module substrate having a copper plate comprising: a raised portion for mounting a semiconductor element protruding smaller than the size of the semiconductor element and having a flat upper surface on the mounting copper plate for mounting the semiconductor element in the copper plate And a groove-shaped or hole-shaped dent having a depth equal to or less than the thickness of the raised portion, and a notch portion that communicates with the recessed portion and extends to the outer peripheral edge of the raised portion.

上記のパワーモジュール用基板は、銅板の中の半導体素子を搭載するためのマウント用銅板上に半導体素子の大きさより小さく上面を平坦面として突出する半導体素子を載置させるための嵩上げ部と、嵩上げ部の上面に嵩上げ部の厚み以下の深さからなる溝状、又は穴状の凹み部と、凹み部に連通して嵩上げ部の外周縁に延設する切り欠き部を有するので、半導体素子を半田を介してマウント用銅板上の嵩上げ部に載置して加熱接合させるときに、嵩上げ部上の半田層に巻き込まれる気泡が凹み部及び切り欠き部を介して嵩上げ部の外に押し出されると共に、嵩上げ部の外周縁から外側で半導体素子の下面及び側面と、マウント用銅板上との間に半田溜まりを形成して接合でき、半導体素子を嵩上げ部上の半田層の中に大きな残留ボイドの形成を防止して平坦に接合できる半導体素子の接合信頼性が高く、ボンディングワイヤ等の接続信頼性に優れ、半導体素子からの発熱の放熱性に優れるパワーモジュール用基板を提供することができる。   The power module substrate includes a raised portion for placing a semiconductor element that protrudes with a flat upper surface smaller than the size of the semiconductor element on the mounting copper plate for mounting the semiconductor element in the copper plate; Since there is a groove-shaped or hole-shaped recess having a depth equal to or less than the thickness of the raised portion on the upper surface of the raised portion, and a notch portion that communicates with the recessed portion and extends to the outer peripheral edge of the raised portion. When placed on the raised portion on the mounting copper plate via solder and heat-bonded, the air bubbles caught in the solder layer on the raised portion are pushed out of the raised portion through the recess and notch In addition, a solder pool can be formed between the lower surface and side surface of the semiconductor element and the mounting copper plate on the outside from the outer peripheral edge of the raised portion, and a large residual void can be formed in the solder layer on the raised portion. form High bonding reliability of the semiconductor device can be flat bonded by preventing, excellent connection reliability such as a bonding wire, it is possible to provide a power module substrate which is excellent in heat radiation heat generated from the semiconductor element.

（Ａ）、（Ｂ）はそれぞれ本発明の一実施の形態に係るパワーモジュール用基板の平面図、Ａ−Ａ’線縦断面図である。(A), (B) is the top view of the board | substrate for power modules which concerns on one embodiment of this invention, respectively, and an A-A 'line longitudinal cross-sectional view. （Ａ）、（Ｂ）はそれぞれ同変形例のパワーモジュール用基板の平面図、Ｂ−Ｂ’線縦断面図である。(A), (B) is the top view of the board | substrate for power modules of the modification, respectively, and a B-B 'line longitudinal cross-sectional view.

続いて、添付した図面を参照しつつ、本発明を具体化した実施の形態について説明し、本発明の理解に供する。
図１（Ａ）、（Ｂ）に示すように、本発明の一実施の形態に係るパワーモジュール用基板１０は、焼成済みのセラミック基板１１の上面側である一方の主面に、それぞれの領域が独立する熱伝導率の高い銅板の複数個で回路を形成する表銅板１２が直接接合法、又は活性金属ろう材接合法で加熱接合されている。また、パワーモジュール用基板１０は、この焼成済みのセラミック基板１１の下面側である他方の主面に、１、又は複数個からなる回路のないベタ状の裏銅板１３が直接接合法、又は活性金属ろう材接合法で加熱接合されている。 Next, embodiments of the present invention will be described with reference to the accompanying drawings to provide an understanding of the present invention.
As shown in FIGS. 1A and 1B, a power module substrate 10 according to an embodiment of the present invention has respective regions on one main surface on the upper surface side of a fired ceramic substrate 11. However, the surface copper plate 12 forming a circuit with a plurality of independent copper plates having high thermal conductivity is heat-bonded by a direct bonding method or an active metal brazing material bonding method. Further, in the power module substrate 10, a solid back copper plate 13 having one or a plurality of circuits and having no circuit is directly bonded or activated on the other main surface on the lower surface side of the fired ceramic substrate 11. Heat-bonded by metal brazing material bonding method.

上記のセラミック基板１１には、酸化アルミニウム（Ａｌ２Ｏ３）、窒化アルミニウム（ＡｌＮ）、ジルコニア入り酸化アルミニウム等からなるセラミックを用いることができ、絶縁性、耐熱性、熱伝導性、基板強度等に優れることで、半導体素子１４にかかる高電圧、及び半導体素子１４からの高熱に対して問題なく使用することができる。ここで、セラミックの一例であるＡｌ２Ｏ３からなるセラミック基板１１を作製するには、アルミナ粉末にマグネシア、シリカ、カルシア等の焼結助剤を適当量加えた粉末に、ジオクチルフタレート等の可塑剤と、アクリル樹脂等のバインダー、及び、トルエン、キシレン、アルコール類等の溶剤が加えられ、十分に混練いた後、脱泡して粘度２０００〜４００００ｃｐｓのスラリーを作製している。そして、このスラリーは、ドクターブレード法等によって、例えば、厚さ０．６４ｍｍ程度のロール状のシートに形成され、適当なサイズにカットしてセラミックグリーンシートを作製し、大気中約１５５０℃程度で焼成してセラミック基板１１を作製している。 For the ceramic substrate 11, a ceramic made of aluminum oxide (Al 2 O 3 ), aluminum nitride (AlN), aluminum oxide containing zirconia, or the like can be used. Insulation, heat resistance, thermal conductivity, substrate strength, etc. It can be used without problems with respect to the high voltage applied to the semiconductor element 14 and the high heat from the semiconductor element 14. Here, in order to manufacture the ceramic substrate 11 made of Al 2 O 3 which is an example of ceramic, a plastic material such as dioctyl phthalate is added to a powder obtained by adding an appropriate amount of a sintering aid such as magnesia, silica and calcia to alumina powder. An agent, a binder such as an acrylic resin, and a solvent such as toluene, xylene, and alcohol are added and kneaded sufficiently, and then defoamed to prepare a slurry having a viscosity of 2000 to 40000 cps. Then, this slurry is formed into a roll-like sheet having a thickness of about 0.64 mm by a doctor blade method or the like, cut into an appropriate size to produce a ceramic green sheet, and about 1550 ° C. in the atmosphere. The ceramic substrate 11 is produced by firing.

また、セラミックの一例であるＡｌＮからなるセラミック基板１１を作製するには、窒化アルミニウム粉末に焼結助剤を添加し、可塑剤、バインダー、及び溶剤を加えてシート状のセラミックグリーンシートとし、これを適当なサイズにカットし、窒素雰囲気中約１７００℃程度の高温で焼成して形成している。   In order to produce a ceramic substrate 11 made of AlN, which is an example of ceramic, a sintering aid is added to aluminum nitride powder, and a plasticizer, a binder, and a solvent are added to form a sheet-like ceramic green sheet. Is cut into an appropriate size and fired at a high temperature of about 1700 ° C. in a nitrogen atmosphere.

更に、セラミックの一例であるジルコニア入り酸化アルミニウムからなるセラミック基板１１を作製するには、主成分の酸化アルミニウムを７０〜９７ｗｔ％の範囲にして、これにジルコニア（ＺｒＯ２）を２〜２９．９ｗｔ％の範囲で添加し、イットリア、カルシア、マグネシア、セリアのいずれか１種以上の焼結助剤を０．１〜２ｗｔ％の範囲で添加し、可塑剤、バインダー、及び溶剤を加えて、例えば、厚さ０．２５ｍｍのシート状のセラミックグリーンシートとしている。そして、このセラミックグリーンシートは、適当なサイズにカットし、大気中約１５５０℃程度で焼成してセラミック基板１１を作製している。なお、Ａｌ２Ｏ３を主成分として、これに上記割合のＺｒＯ２が添加された焼成体からなるセラミック基板１１は、Ａｌ２Ｏ３単体の基板と熱伝導率を同等程度に保ちながら基板強度、特に曲げ強度を大幅に高めることができる（Ａｌ２Ｏ３単体では、３．１ＭＰａ・ｍ０．５、ジルコニア系アルミナセラミックでは、４．４ＭＰａ・ｍ０．５）。また、イットリア、カルシア、マグネシア、セリアのいずれか１種以上を添加することで、基板の焼成温度をＡｌ２Ｏ３単体の基板と同等程度に抑えつつ、ＺｒＯ２結晶粒の靭性を改善することができる。これらによって、セラミック基板１１は、ＡｌＮの基板より熱伝導率が低下するものの、厚みを薄くすることで、熱伝導率の低さを補うことができ、Ａｌ２Ｏ３単体の基板より優れ、ＡｌＮの基板に匹敵する優れた放熱性を有することができる。 Furthermore, in order to produce the ceramic substrate 11 made of zirconia-containing aluminum oxide, which is an example of ceramic, the main component aluminum oxide is in the range of 70 to 97 wt%, and zirconia (ZrO 2 ) is added to 2 to 29.9 wt%. %, Yttria, calcia, magnesia, ceria at least one kind of sintering aid is added in the range of 0.1 to 2 wt%, plasticizer, binder, and solvent are added, for example, , A sheet-like ceramic green sheet having a thickness of 0.25 mm. The ceramic green sheet is cut to an appropriate size and fired at about 1550 ° C. in the atmosphere to produce the ceramic substrate 11. The ceramic substrate 11 made of a fired body containing Al 2 O 3 as a main component and the above-mentioned ratio of ZrO 2 added thereto has a substrate strength while maintaining the same thermal conductivity as the Al 2 O 3 single substrate. , can greatly increase the particularly flexural strength (in Al 2 O 3 alone, 3.1 MPa · m 0.5, the zirconia alumina ceramic, 4.4MPa · m 0.5). In addition, by adding at least one of yttria, calcia, magnesia, and ceria, the toughness of the ZrO 2 crystal grains can be improved while suppressing the firing temperature of the substrate to the same level as that of the substrate of Al 2 O 3 alone. Can do. As a result, although the thermal conductivity of the ceramic substrate 11 is lower than that of the AlN substrate, it is possible to compensate for the low thermal conductivity by reducing the thickness, and the ceramic substrate 11 is superior to the Al 2 O 3 single substrate. It is possible to have excellent heat dissipation comparable to that of the substrate.

上記のようなセラミック基板１１に表銅板１２や、裏銅板１３を加熱接合させる直接接合法とは、予め表面を酸化させた表銅板１２や、裏銅板１３用の銅板をセラミック基板１１の表面に当接させ、窒素雰囲気中で酸化銅の融点（１０８３℃）以下で、銅と酸化銅の共晶温度（１０６５℃）以上の温度で加熱して銅と微量の酸素との反応により生成するＣｕ−Ｏ共晶液相を結合剤として直接セラミック基板１１に接合する方法である。なお、セラミック基板１１がＡｌＮからなる場合には、セラミック基板１１の表面に酸化膜を形成、すなわち、ＡｌＮの表面をＡｌ２Ｏ３としておく必要がある。 The direct bonding method in which the front copper plate 12 and the back copper plate 13 are heat-bonded to the ceramic substrate 11 as described above is a method in which the front copper plate 12 whose surface is oxidized in advance and the copper plate for the back copper plate 13 are attached to the surface of the ceramic substrate 11. Cu formed by a reaction between copper and a trace amount of oxygen by heating at a temperature not higher than the melting point (1083 ° C.) of copper oxide and not lower than the eutectic temperature of copper and copper oxide (1065 ° C.) in a nitrogen atmosphere. In this method, the -O eutectic liquid phase is directly bonded to the ceramic substrate 11 as a binder. When the ceramic substrate 11 is made of AlN, it is necessary to form an oxide film on the surface of the ceramic substrate 11, that is, to make the AlN surface Al 2 O 3 .

また、上記のようなセラミック基板１１に表銅板１２や、裏銅板１３を加熱接合させる活性金属ろう材接合法とは、チタン、ジルコニウム、ベリリウム等のような極めて反応性の大きい、いわゆる活性な金属をＡｇ−Ｃｕ系ろう等に加えた活性金属ろう材を用いてセラミック基板１１と、表銅板１２や、裏銅板１３用の銅板を接合する方法である。この方法での接合は、先ず、活性金属ろう材からなるペーストをセラミック基板１１のそれぞれの表面に塗布し、その上に予め表面を酸化させた表銅板１２や、裏銅板１３用の銅板を当接させ、約７５０〜８５０℃程度で加熱して活性金属の酸素との親和力の強さを利用して、直接セラミック基板１１に接合する方法である。なお、活性金属ろう材は、セラミック基板１１がジルコニア系アルミナセラミックからなる場合には、例えば、ジルコニウム、チタン、フッ化水素、ニオブのいずれか１種以上をＡｇ−Ｃｕ系ろうに含有させたものを用いることができ、セラミック基板１１への親和力を高めることで接合反応強度を高めて強固に接合することができる。   Moreover, the active metal brazing material joining method in which the front copper plate 12 and the back copper plate 13 are heat-joined to the ceramic substrate 11 as described above is a so-called active metal having extremely high reactivity such as titanium, zirconium, beryllium and the like. This is a method of joining the ceramic substrate 11 to the front copper plate 12 and the copper plate for the back copper plate 13 using an active metal brazing material in which is added to an Ag—Cu brazing filler metal or the like. In this method of joining, first, a paste made of an active metal brazing material is applied to each surface of the ceramic substrate 11, and a front copper plate 12 or a copper plate for the back copper plate 13 whose surface has been previously oxidized is applied thereto. This is a method of bonding directly to the ceramic substrate 11 by utilizing the strength of affinity with active metal oxygen by heating at about 750 to 850 ° C. When the ceramic substrate 11 is made of zirconia-based alumina ceramic, the active metal brazing material contains, for example, one or more of zirconium, titanium, hydrogen fluoride, and niobium in Ag-Cu-based brazing. By increasing the affinity for the ceramic substrate 11, it is possible to increase the bonding reaction strength and firmly bond.

上記のパワーモジュール用基板１０は、表銅板１２が配線回路状態のパターンになるように形成されており、表銅板１２や、裏銅板１２の銅板の中のパワートランジスタ等の高熱を発する半導体素子１４を搭載するためのマウント用銅板１５上に半導体素子１４を載置させるための嵩上げ部１６を有している。この嵩上げ部１６は、平面視する半導体素子１４の外形寸法より小さい寸法の上面を平坦面として突出するようにして設けられている。なお、裏銅板１２の銅板をマウント用銅板１５とする場合には、図示しないが、セラミック基板１１に平面視する半導体素子１４の外形寸法より大きい貫通孔を設け、セラミック基板１１の裏面に貫通孔を塞ぐように加熱接合された裏銅板１２をマウント用銅板１５とし、マウント用銅板１５上に半導体素子１４を載置させるための嵩上げ部１６を有している。   The power module substrate 10 is formed such that the front copper plate 12 has a pattern of a wiring circuit state, and a semiconductor element 14 that generates high heat, such as a power transistor in the copper plate of the front copper plate 12 or the back copper plate 12. And a raised portion 16 for placing the semiconductor element 14 on the mounting copper plate 15 for mounting the semiconductor device 14. The raised portion 16 is provided so as to protrude with an upper surface having a size smaller than the outer size of the semiconductor element 14 in plan view as a flat surface. When the copper plate of the back copper plate 12 is used as the mount copper plate 15, although not shown, a through hole larger than the outer dimension of the semiconductor element 14 in plan view is provided in the ceramic substrate 11, and the through hole is formed in the back surface of the ceramic substrate 11. The back copper plate 12 that is heat-bonded so as to close the cover is used as a mount copper plate 15, and a raised portion 16 for placing the semiconductor element 14 on the mount copper plate 15 is provided.

また、このパワーモジュール用基板１０は、マウント用銅板１５上の嵩上げ部１６の上面に嵩上げ部１６の厚み以下の深さからなる溝状の凹み部１７を有している。そして、このパワーモジュール用基板１０は、この溝状の凹み部１７の少なくとも一方の端部に連通して嵩上げ部１６の外周縁に延設する切り欠き部１８を有している。   Further, the power module substrate 10 has a groove-like recess 17 having a depth equal to or less than the thickness of the raised portion 16 on the upper surface of the raised portion 16 on the mounting copper plate 15. The power module substrate 10 has a notch 18 that communicates with at least one end of the groove-shaped recess 17 and extends to the outer peripheral edge of the raised portion 16.

あるいは、図２（Ａ）、（Ｂ）に示すように、変形例のパワーモジュール用基板１０ａは、マウント用銅板１５上の嵩上げ部１６の上面に嵩上げ部１６の厚み以下の深さからなる穴状の凹み部１７ａを有している。そして、このパワーモジュール用基板１０ａは、この穴状の凹み部１７ａの少なくとも一箇所に連通して嵩上げ部１６の外周縁に延設する切り欠き部１８ａを有している。   Alternatively, as shown in FIGS. 2A and 2B, the power module substrate 10 a according to the modification has a hole formed on the upper surface of the raised portion 16 on the mounting copper plate 15 with a depth equal to or less than the thickness of the raised portion 16. It has the shape-like dent part 17a. The power module substrate 10 a has a notch 18 a that communicates with at least one portion of the hole-shaped recess 17 a and extends to the outer peripheral edge of the raised portion 16.

なお、上記のパワーモジュール用基板１０、１０ａは、嵩上げ部１６や、凹み部１７、１７ａや、切り欠き部１８、１８ａの形成方法を限定するものではないが、例えば、マウント用銅板１５上に嵩上げ部１６が浮き出るように、マウント用銅板１５上の嵩上げ部１６形状となる周囲をエッチングして嵩上げ部１６を設けると共に、嵩上げ部１６上をエッチングして凹み部１７、１７ａと、切り欠き部１８、１８ａを設けることができる。あるいは、パワーモジュール用基板１０、１０ａは、嵩上げ部１６の外形寸法からなる銅板に予め、打ち抜きプレス加工や、エッチング加工等で凹み部１７、１７ａと、切り欠き部１８、１８ａを設け、この銅板をマウント用銅板１５上に加熱接合させることで凹み部１７、１７ａと、切り欠き部１８、１８ａを有する嵩上げ部１６を設けることができる。   The power module substrates 10 and 10a are not limited to the method of forming the raised portions 16, the recessed portions 17 and 17a, and the cutout portions 18 and 18a. The raised portion 16 is etched around the mounting copper plate 15 so that the raised portion 16 is raised so that the raised portion 16 is formed, and the raised portion 16 is etched to form the recessed portions 17 and 17a and the cutout portion. 18, 18a can be provided. Alternatively, the power module substrates 10 and 10a are provided with recesses 17 and 17a and notches 18 and 18a in advance on a copper plate having the outer dimensions of the raised portion 16 by punching or etching. Can be provided on the mounting copper plate 15 to provide the raised portion 16 having the recessed portions 17 and 17a and the notched portions 18 and 18a.

上記のパワーモジュール用基板１０、１０ａは、表銅板１２のマウント用銅板１５、及びその上に設ける嵩上げ部１６に搭載される半導体素子１４のパッド電極と他の配線回路部の表銅板１２とをボンディングワイヤ等で接続するようになっていると共に、半導体素子１４からの発熱を嵩上げ部１６及びマウント用銅板１５と、セラミック基板１１を介して裏銅板１３側に伝熱させるようになっている。また、図示しないが、裏銅板１３をマウント用銅板１５とするパワーモジュール用基板１０、１０ａは、マウント用銅板１５、及びその上に設ける嵩上げ部１６に搭載される半導体素子１４のパッド電極と表銅板１２とをボンディングワイヤ等で接続するようになっていると共に、半導体素子１４からの発熱を嵩上げ部１６、及びマウント用銅板１５である裏銅板１３に直接伝熱させるようになっている。なお、パワーモジュール用基板１０、１０ａは、セラミックと銅の熱膨張係数が大きく異なるが、セラミック基板１１の一方の主面に表銅板１２、他方の主面に裏銅板１３を接合するサンドイッチ状態によって、反りや、変形を防止することができるようになっている。   The power module substrates 10 and 10a include the mounting copper plate 15 of the surface copper plate 12, and the pad electrode of the semiconductor element 14 mounted on the raised portion 16 provided thereon and the surface copper plate 12 of another wiring circuit portion. In addition to being connected by a bonding wire or the like, heat from the semiconductor element 14 is transferred to the back copper plate 13 side through the raised portion 16 and the mounting copper plate 15 and the ceramic substrate 11. Although not shown, the power module substrates 10 and 10a having the back copper plate 13 as the mount copper plate 15 are mounted on the mount copper plate 15 and the pad electrode of the semiconductor element 14 mounted on the raised portion 16 provided thereon. The copper plate 12 is connected with a bonding wire or the like, and heat generated from the semiconductor element 14 is directly transferred to the raised portion 16 and the back copper plate 13 which is the mounting copper plate 15. The power module substrates 10 and 10a differ greatly in thermal expansion coefficient between ceramic and copper. However, depending on the sandwich state in which the front copper plate 12 is joined to one main surface of the ceramic substrate 11 and the back copper plate 13 is joined to the other main surface. Warpage and deformation can be prevented.

上記のようなパワーモジュール用基板１０、１０ａは、半導体素子１４を半田を介してマウント用銅板１５上の嵩上げ部１６に載置して加熱接合させるときに、嵩上げ部１６上の半田層に巻き込まれる気泡が凹み部１７、１７ａ、及び切り欠き部１８、１８ａを介して嵩上げ部１６の外に容易に押し出すことができる。また、上記のようなパワーモジュール用基板１０、１０ａは、嵩上げ部１６の外周縁から外側で半導体素子１４の下面及び側面と、マウント用銅板１５上との間に半田溜まりを形成して接合でき、半導体素子１４を嵩上げ部１６上の半田層の中に大きな残留ボイドの形成を防止して平坦に接合することができる。従って、パワーモジュール用基板１０、１０ａは、マウント用銅板１５上の嵩上げ部１６への半導体素子１４の接合信頼性が高く、半導体素子１４のパッド電極と表銅板１２とのボンディングワイヤ等の接続信頼性に優れ、半導体素子１４からの発熱の放熱性に優れるパワーモジュール用基板１０、１０ａとすることができる。   The power module substrates 10 and 10a as described above are caught in the solder layer on the raised portion 16 when the semiconductor element 14 is placed on the raised portion 16 on the mounting copper plate 15 and soldered via solder. The bubble to be generated can be easily pushed out of the raised portion 16 through the recessed portions 17 and 17a and the notched portions 18 and 18a. Further, the power module substrates 10 and 10a as described above can be joined by forming a solder pool between the lower surface and the side surface of the semiconductor element 14 and the mounting copper plate 15 from the outer peripheral edge of the raised portion 16 to the outside. The semiconductor element 14 can be joined flatly in the solder layer on the raised portion 16 while preventing the formation of large residual voids. Therefore, the power module substrates 10 and 10a have high bonding reliability of the semiconductor element 14 to the raised portion 16 on the mounting copper plate 15, and the connection reliability of the bonding wire and the like between the pad electrode of the semiconductor element 14 and the surface copper plate 12 is high. The power module substrates 10 and 10a are excellent in heat dissipation and heat dissipation of heat generated from the semiconductor element 14.

通常、パワーモジュール用基板１０、１０ａは、パワーモジュール用基板１０、１０ａの個片体が複数個配列する集合体から形成される場合には、半導体素子１４が実装された後に、セラミック基板１１に設けられている分割溝で分割して、あるいは、分割溝で分割した後に個片体のパワーモジュール用基板１０、１０ａに半導体素子１４が実装されるようになる。この個片体にするための分割溝は、焼成されて形成されるセラミック基板１１に、予め焼成される前のセラミックグリーンシートに形成された押圧溝、あるいは、焼成された後にレーザー加工等で形成される連続する点状の溝として設けられている。   In general, when the power module substrates 10 and 10a are formed of an assembly in which a plurality of individual pieces of the power module substrates 10 and 10a are arranged, the semiconductor element 14 is mounted on the ceramic substrate 11. The semiconductor element 14 is mounted on the individual power module substrates 10 and 10a after being divided by the provided dividing grooves or after being divided by the dividing grooves. The divided grooves for forming the individual pieces are formed on the ceramic substrate 11 formed by firing, the pressing grooves formed on the ceramic green sheet before being fired in advance, or by laser processing or the like after being fired. It is provided as a continuous point-like groove.

本発明のパワーモジュール用基板は、高電圧が流れ、大量の熱を発生する半導体素子を実装し、例えば、インバーター用や、自動車部品用等として用いるためのパワーモジュール用基板に利用することができる。   The power module substrate of the present invention is mounted with a semiconductor element that generates a large amount of heat through a high voltage, and can be used as a power module substrate for use in, for example, an inverter or an automobile part. .

１０、１０ａ：パワーモジュール用基板、１１：セラミック基板、１２：表銅板、１３：裏銅板、１４：半導体素子、１５：マウント用銅板、１６：嵩上げ部、１７、１７ａ：凹み部、１８、１８ａ：切り欠き部   10, 10a: Power module substrate, 11: Ceramic substrate, 12: Front copper plate, 13: Back copper plate, 14: Semiconductor element, 15: Copper plate for mounting, 16: Raised portion, 17, 17a: Recessed portion, 18, 18a : Notch

Claims (1)

セラミック基板の両主面のそれぞれに直接接合法、又は活性金属ろう材接合法で加熱接合され、それぞれの領域が独立する１、又は複数個からなる銅板を有するパワーモジュール用基板において、
前記銅板の中の半導体素子を搭載するためのマウント用銅板上に前記半導体素子の大きさより小さく上面を平坦面として突出する前記半導体素子を載置させるための嵩上げ部と、該嵩上げ部の上面に前記嵩上げ部の厚み以下の深さからなる溝状、又は穴状の凹み部と、該凹み部に連通して前記嵩上げ部の外周縁に延設する切り欠き部を有することを特徴とするパワーモジュール用基板。 In the power module substrate having one or a plurality of copper plates that are heat bonded to each of the main surfaces of the ceramic substrate by a direct bonding method or an active metal brazing material bonding method, and each region is independent,
On the copper plate for mounting for mounting the semiconductor element in the copper plate, a raised portion for placing the semiconductor element which projects smaller than the size of the semiconductor element and has an upper surface as a flat surface, and an upper surface of the raised portion A power having a groove-like or hole-like dent having a depth equal to or less than the thickness of the raised portion, and a cutout portion communicating with the dent and extending to the outer peripheral edge of the raised portion. Module board.
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