JP2014150528A5 - - Google Patents

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Publication number
JP2014150528A5
JP2014150528A5 JP2014013030A JP2014013030A JP2014150528A5 JP 2014150528 A5 JP2014150528 A5 JP 2014150528A5 JP 2014013030 A JP2014013030 A JP 2014013030A JP 2014013030 A JP2014013030 A JP 2014013030A JP 2014150528 A5 JP2014150528 A5 JP 2014150528A5
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JP
Japan
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binary
bits
pages
flash memory
likelihood ratio
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JP2014013030A
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Japanese (ja)
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JP2014150528A (ja
JP6367562B2 (ja
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Priority claimed from US13/755,717 external-priority patent/US9086984B2/en
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Publication of JP6367562B2 publication Critical patent/JP6367562B2/ja
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JP2014013030A 2013-01-31 2014-01-28 選択的なバイナリ復号および非バイナリ復号を用いるフラッシュ・メモリ内の検出および復号 Expired - Fee Related JP6367562B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/755,717 2013-01-31
US13/755,717 US9086984B2 (en) 2011-01-04 2013-01-31 Detection and decoding in flash memories with selective binary and non-binary decoding

Publications (3)

Publication Number Publication Date
JP2014150528A JP2014150528A (ja) 2014-08-21
JP2014150528A5 true JP2014150528A5 (enExample) 2017-01-26
JP6367562B2 JP6367562B2 (ja) 2018-08-01

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JP2014013030A Expired - Fee Related JP6367562B2 (ja) 2013-01-31 2014-01-28 選択的なバイナリ復号および非バイナリ復号を用いるフラッシュ・メモリ内の検出および復号

Country Status (5)

Country Link
EP (1) EP2763042B1 (enExample)
JP (1) JP6367562B2 (enExample)
KR (1) KR102154789B1 (enExample)
CN (1) CN103971751B (enExample)
TW (1) TWI613674B (enExample)

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US9633740B1 (en) * 2016-02-11 2017-04-25 Seagate Technology Llc Read retry operations where likelihood value assignments change sign at different read voltages for each read retry
US9460783B2 (en) 2014-06-03 2016-10-04 Micron Technology, Inc. Determining soft data
CN105304143B (zh) * 2014-07-21 2018-10-02 群联电子股份有限公司 解码方法、存储器控制电路单元及存储器存储装置
US9613664B2 (en) * 2015-01-20 2017-04-04 Samsung Electronics Co., Ltd. Method of operating memory device including multi-level memory cells
US9564921B1 (en) 2015-02-04 2017-02-07 Microsemi Storage Solutions (U.S.), Inc. Method and system for forward error correction decoding based on a revised error channel estimate
JP2016184189A (ja) * 2015-03-25 2016-10-20 ルネサスエレクトロニクス株式会社 診断プログラム、診断方法および半導体装置
US9589655B1 (en) * 2015-10-02 2017-03-07 Seagate Technology Llc Fast soft data by detecting leakage current and sensing time
US10382064B2 (en) * 2015-10-13 2019-08-13 SK Hynix Inc. Efficient LDPC encoder for irregular code
US9984752B2 (en) 2016-03-14 2018-05-29 Toshiba Memory Corporation Memory system and data encoding and decoding method to mitigate inter-cell interference
KR102564441B1 (ko) 2016-04-11 2023-08-08 에스케이하이닉스 주식회사 데이터 저장 장치 및 그것의 동작 방법
TWI634556B (zh) * 2017-10-12 2018-09-01 群聯電子股份有限公司 解碼方法、記憶體儲存裝置及記憶體控制電路單元
CN109697134B (zh) * 2017-10-20 2022-10-21 群联电子股份有限公司 解码方法、存储器存储装置及存储器控制电路单元
CN108154902B (zh) * 2017-12-22 2020-11-13 联芸科技（杭州）有限公司 存储器的高可靠性错误检测方法、读取控制方法及装置
JP7039298B2 (ja) 2018-01-16 2022-03-22 キオクシア株式会社 メモリシステム
KR102741031B1 (ko) * 2018-08-13 2024-12-11 에스케이하이닉스 주식회사 에러 정정 회로 및 이의 동작 방법
KR102755335B1 (ko) 2018-08-17 2025-01-17 에스케이하이닉스 주식회사 에러 정정 장치, 그것의 동작 방법 및 그것을 포함하는 전자 장치
KR102707030B1 (ko) 2018-08-22 2024-09-20 에스케이하이닉스 주식회사 에러 정정 장치 및 그것을 포함하는 전자 장치
JP7309551B2 (ja) * 2019-09-19 2023-07-18 キオクシア株式会社 メモリシステム

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7814401B2 (en) * 2006-12-21 2010-10-12 Ramot At Tel Aviv University Ltd. Soft decoding of hard and soft bits read from a flash memory
US8406048B2 (en) * 2008-08-08 2013-03-26 Marvell World Trade Ltd. Accessing memory using fractional reference voltages
KR20110061649A (ko) * 2008-09-30 2011-06-09 엘에스아이 코포레이션 소프트 데이터 값 생성 방법
KR101633048B1 (ko) * 2010-02-25 2016-06-24 삼성전자주식회사 메모리 시스템 및 그것의 데이터 처리 방법
GB2481051B (en) * 2010-06-10 2016-06-01 Samsung Electronics Co Ltd Method for mapping and de-mapping of non-binary symbols in data communication systems
US8549380B2 (en) 2011-07-01 2013-10-01 Intel Corporation Non-volatile memory error mitigation
US8566666B2 (en) * 2011-07-11 2013-10-22 Lsi Corporation Min-sum based non-binary LDPC decoder

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