JP2014135317A - Printed board equipped with interlayer connection hole, and arrangement method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a printed board equipped with an interlayer connection hole which is required for improvement in the component mounting density of a multilayer substrate and high speed operation and prevents leakage of an unnecessary signal between signals.SOLUTION: On the inner wall of an interlayer connection hole of a printed board which transmits high speed signals, an electrode connected to a signal line and an electrode connected to ground are alternately arranged while keeping them insulated from each other, and a plurality of interlayer connection holes are arranged so that the electrode connected to the signal line and the electrode connected to the ground in neighboring interlayer connection holes are adjacent to each other.

Description

  The present invention relates to a printed circuit board having interlayer connection holes and an arrangement method.

  In many electronic devices that handle high-speed and high-frequency circuits, circuits are formed in each layer of a multilayer printed board, and the layers are connected to each other using a non-penetrating via hole, a penetrating via hole, or a through hole. By transmitting these via holes or through holes, information transmission between elements mounted on the printed circuit board is realized, thereby realizing the function of the apparatus. In order to realize the progress of miniaturization of parts and the speeding up of operation, the arrangement of parts has been increased. As a result, the wiring density increases and the above-described interlayer connection hole arrangement interval tends to be narrowed. Therefore, when the interlayer connection holes are arranged adjacent to each other, it is necessary to prevent one signal from leaking an unnecessary signal to the other signal line and not disturb the transmission waveform. is there.

  Document 1 divides the electrodes of the interlayer connection holes, connects the signal line wiring and the signal return current wiring to each electrode, and reverses the direction of the current passing through each electrode. The technique of wiring is described as follows. When the technology described in Document 1 is applied to a printed circuit board, the magnetic field generated when a signal passes through each electrode of the interlayer connection hole can be canceled, and the inductance of the interlayer connection hole described above can be reduced equivalently. I can do it.

  Document 2 discloses a technique for preventing a signal from leaking to the outside from a signal line and preventing an external signal from entering the signal line by arranging a large number of ground vias so as to surround the signal via. Have been described.

JP 2002-64255 A JP 2003-133801 A

  When the technique of Patent Document 1 is applied to a printed circuit board that requires high-speed transmission, wiring that forms a pair of an induction line and an induced line is required for the interlayer connection hole. When the technique of Patent Document 1 is applied to a printed circuit board of a device that requires high-speed transmission and requires a large number of signal wirings, it is necessary to prepare a signal line and a wiring through which a return current flows. Therefore, it is necessary to secure twice the number of wires as usual. For this reason, high-density mounting cannot be realized.

The technique of Patent Document 2 provides a printed circuit board suitable for high-speed signal transmission by arranging a large number of ground vias around signal signal vias. However, it is necessary to allocate one signal to each via and arrange a large number of ground vias, which increases the area for arranging the vias necessary for transmitting one signal.

  When the technology of Patent Document 2 is applied to a printed circuit board for an information processing device that requires high-density mounting and a large amount of wiring, the interlayer connection holes required within the limited area of the printed circuit board The quantity cannot be secured. Therefore, this technique also has a problem that a printed circuit board that realizes high-density mounting cannot be provided.

  The present invention has been made in view of the above, and can provide a printed circuit board having an interlayer connection hole and an arrangement method that solve at least the above-described problems.

A printed circuit board with a plurality of interlayer connection holes that transmit high-speed signals
On the inner wall of the interlayer connection hole, the electrode connected to the signal line and the electrode connected to the ground are alternately arranged while maintaining an insulation state from each other,
The plurality of interlayer connection holes are arranged so that the electrode connected to the signal line and the electrode connected to the ground of the adjacent interlayer connection holes are adjacent to each other.

An arrangement method for arranging a plurality of interlayer connection holes on a printed circuit board that transmits high-speed signals is
On the inner wall of the interlayer connection hole, the electrode connected to the signal line and the electrode connected to the ground are alternately arranged while maintaining an insulation state from each other,
The plurality of interlayer connection holes are arranged so that the electrode connected to the signal line and the electrode connected to the ground of the adjacent interlayer connection holes are adjacent to each other.

  According to the present invention, it is possible to provide a printed circuit board that transmits high-speed signals and realizes high-density mounting.

It is a figure of a via of a 1st embodiment of the present invention. It is a perspective view of the printed circuit board of a 1st embodiment of the present invention. It is a figure of a via of a 2nd embodiment of the present invention. It is a perspective view of the printed circuit board of a 2nd embodiment of the present invention. It is a perspective view of the printed circuit board of the 3rd embodiment of the present invention. It is a figure of a via of a 4th embodiment of the present invention. It is a perspective view of the printed circuit board of the 4th Embodiment of this invention.

(First embodiment)
A first embodiment of the present invention will be described with reference to the drawings.

  In the printed circuit board having the interlayer connection hole according to the first embodiment of the present invention, the electrode connected to the signal line and the electrode connected to the ground are kept insulated from each other on the inner wall of the interlayer connection hole. Interlayer connection holes arranged alternately are provided. Further, when the above-described interlayer connection holes are arranged on the printed board, the signal electrodes and the ground electrodes of the adjacent interlayer connection holes are arranged at positions adjacent to each other. As a result, each signal line is shielded by the ground electrode, and signal leakage between the signal line and other signal lines can be prevented.

  FIG. 1 shows a structure of an interlayer connection hole in which an electrode on the inner wall of a hole 1 provided in a printed board is divided into a signal line electrode 5 and a GND electrode 6. FIG. 1 omits the description of the insulating substrate of the printed circuit board, and shows only wiring and electrode portions. FIG. 1 shows a state in which the surface of the printed circuit board is seen through from the oblique upper part to the back surface.

  The signal line electrode 5 is connected to the signal line land 2 formed on the front surface of the printed circuit board and the signal line land 2 formed on the back surface of the printed circuit board.

  The GND electrode 6 is connected to a GND land 3 formed on the surface of the printed circuit board, a GND land 3 formed on the back surface of the printed circuit board, and a GND layer 4 formed of a layer inside the printed circuit board.

  Between the signal line electrode 5 and the two signal line lands 2 on both sides of the printed circuit board, and the GND electrode 6 and the two GND lands 3 on both sides of the printed circuit board, over the entire length of the hole 1 in the thickness direction of the printed circuit board. A part of the metal of the electrode is removed and separated and insulated by a clearance 7 which is a gap (referred to as clearance).

  The signal line electrode 5 is separated from the GND layer 4 by a GND layer clearance 8 which is formed by removing a part of the metal of the GND layer 4 and is insulated.

  FIG. 2 is a perspective view from the surface of the printed circuit board provided with the interlayer connection hole according to the first embodiment of the present invention. In addition, the name provided in common in FIG. 1 and FIG. 2 shows the same site | part.

  In this figure, the coordinate origin of the printed circuit board is the lower left of the drawing. The X axis of the printed circuit board is a coordinate axis drawn rightward from the origin, and the Y axis is drawn perpendicularly from the origin to the X axis.

The center of each interlayer connection hole is arranged at the intersection of the lattice formed by a line group parallel to the X axis and a line group parallel to the Y axis of the printed circuit board. In the case of FIG. 2, the holes 1 indicated by A1 to A4 and B1 to B4 are arranged in a lattice pattern. The signal line electrode 5 in each hole 1 and the GND electrode 6 in each hole 1 adjacent to each other are arranged adjacent to each other.

  The term “adjacent” described here means that the signal line electrode 5 in a certain hole 1 is closer to the GND electrode 6 in the adjacent hole 1 than the signal electrode 5 in the adjacent hole 1.

  Here, the adjacent state in both the direction in which the holes 1 are arranged on the straight line group parallel to the X axis and the direction in which the holes 1 are arranged on the straight line group parallel to the Y axis will be described. For example, the A1 signal line electrode 5 and the A2 GND electrode 6 are adjacent to each other in the X-axis direction, and the A1 signal line electrode 5 and the B1 GND electrode 6 are adjacent to each other in the Y-axis direction.

  Assume that the distance between the adjacent holes 1 is an optimum distance for wiring. The wiring interval is irrelevant to the present invention and will not be described.

  The first operation and effect of the printed circuit board of the present invention will be described with reference to FIG.

  First, the effect of shielding by the GND electrode 6 in one independent hole 1 will be described. In FIG. 1, the signal flows in from the signal wiring 9 on the front surface of the printed circuit board, and flows out from the signal wiring 9 on the back surface of the printed circuit board through the signal line electrode 5.

  A direct current and a high-frequency signal flow simultaneously through the signal line electrode 5, and a part of the power of the high-frequency signal is radiated from the signal line electrode 5 to the outside as a radio wave. This radiated radio wave is transmitted to the other electrodes via the stray capacitance, resulting in signal leakage. Here, stray capacitance is not intended by the designer, which is generated inside an electronic component or in an electronic circuit, due to their physical structure, for example, close wiring, between components, or via an insulator. Refers to capacitance, also called parasitic capacitance.

  When the GND electrode 6 is disposed in the vicinity of the signal line electrode 5, the stray capacitance formed between the signal line electrode 5 and the signal line electrode 5 disposed at another location is reduced by the presence of the GND electrode 6. Therefore, the output of the signal transmitted from the signal line electrode 5 to the external electrode is reduced, and signal leakage can be prevented.

  Next, as shown in FIG. 2, the further effect when the hole 1 of FIG. 1 is arranged on the printed board will be described.

  Each of the holes 1 is arranged so that the signal line electrode 5 of the hole 1 and the GND electrode 6 of the hole 1 arranged next to each other are adjacent to each other in the arrangement of the holes 1 parallel to the X axis shown in A1 to A4 and B1 to B4. The electrodes are arranged. With this arrangement, the signal line electrode 5 is sandwiched between the GND electrodes 6. For example, the signal line electrode 5 of A2 is sandwiched between the GND electrode 6 of A2 and the GND electrode 6 of A3 which is the hole 1 adjacent to A2. This structure is common to all the signal line electrodes 5 in the arranged holes 1. Accordingly, each signal line electrode 5 is shielded from the signal line electrode 5 in the adjacent hole 1 by its own GND electrode 6 and the GND electrode 6 in the adjacent hole 1. For this reason, coupling due to stray capacitance between the signal line electrode 5 of itself and the signal line electrode 5 of the adjacent hole 1 is blocked.

  Further, in the arrangement of the holes 1 on the line parallel to the Y axis from B1 to A1, the GND electrode 6 of A1 and the signal line electrode 5 of the hole 1 of B1 arranged next to each other are adjacent to each other. Further, the same electrode arrangement as that of the hole 1 of B1 is performed for each electrode of the holes 1 of B1 to B4.

  The action of preventing signal leakage when the holes 1 described above are arranged will be described.

  As an example, it is assumed that the signal line electrode 5 of each hole 1 in the vicinity of A2 is viewed around the signal line electrode 5 of A2.

  The stray capacitance between the A1 signal line electrode 5 and the A2 signal line electrode 5 is reduced by the A2 GND electrode 6.

  The stray capacitance between the A3 signal line electrode 5 and the A2 signal line electrode 5 is reduced by the A3 GND electrode 6.

  The influence of the stray capacitance between the signal line electrode 5 of B1 and the signal line electrode 5 of A2 is reduced by the GND electrode 6 of B1.

  The stray capacitance between the B2 signal line electrode 5 and the A2 signal line electrode 5 is reduced by the B2 GND electrode 6 and the A2 GND electrode 6.

  The stray capacitance between the signal line electrode 5 of B3 and the signal line electrode 5 of A2 is reduced by the GND electrode 6 of B2 and the GND electrode 6 of A3.

As described above, the printed circuit board having the interlayer connection hole of the present invention can be mounted with high density. The reason is that the GND electrode 6 disposed between the signal line electrode 5 and the signal line electrode 5 in the adjacent hole 1 serves as a radio wave shield, reduces signal leakage, and increases the mounting density of the interlayer connection holes. Because it can.
(Second Embodiment)
A second embodiment of the present invention will be described with reference to the drawings.

  The printed circuit board having the interlayer connection hole according to the second embodiment of the present invention has a signal line connected to an electrode in which the length of the arc of the cross section of the inner wall of the interlayer connection hole is approximately one-fourth of the circumference. And an interlayer connection hole for connecting a ground to an electrode whose arc length of the cross section of the inner wall is approximately three-fourths of the circumference. Further, when the above-described interlayer connection holes are arranged on the printed circuit board, the signal electrode and the ground electrode of the adjacent interlayer connection holes are arranged at positions adjacent to each other. As a result, each signal line is shielded by the ground electrode having a larger area than the first embodiment described above, and signal leakage between the signal line and other signal lines can be prevented.

  In FIG. 3, the electrode on the inner wall of the hole 1 provided in the printed circuit board is divided into a signal line electrode 5 and a GND electrode 6, the signal line electrode has an area of about 1/4, and the ground electrode has about 3/4. The structure of the interlayer connection hole divided into two is shown. Note that FIG. 3 omits the description of the insulating substrate of the printed board, and shows only the wiring and electrode portions.

  The signal line electrode 5 is connected to the signal line land 2 formed on the front surface of the printed circuit board and the signal line land 2 formed on the back surface of the printed circuit board. A signal wiring 9 is connected to each signal line land 2.

  The GND electrode 6 is connected to a GND land 3 formed on the front surface of the printed circuit board, a GND land 3 formed on the back surface of the printed circuit board, and a GND layer 4 inside the printed circuit board.

  Between the signal line electrode 5 and the two signal line lands 2 on both sides of the printed circuit board, and the GND electrode 6 and the two GND lands 3 on both sides of the printed circuit board, over the entire length of the hole 1 in the thickness direction of the printed circuit board. A part of the metal of the electrode is removed, and the gap 7 is separated and insulated by a clearance 7.

  The signal line electrode 5 is separated from the GND layer 4 by a GND layer clearance 8 which is formed by removing a part of the metal of the GND layer 4 and is insulated.

  FIG. 4 is a perspective view from the surface of the printed circuit board provided with the interlayer connection hole according to the second embodiment of the present invention. In addition, the name provided in common in FIG. 3 and FIG. 4 shows the same site | part.

  In this figure, the coordinate origin of the printed circuit board is the lower left of the drawing. The X axis of the printed circuit board is a coordinate axis drawn rightward from the origin, and the Y axis is drawn perpendicularly from the origin to the X axis.

  The centers of the interlayer connection holes are arranged at the intersections of the lattice formed by the line group parallel to the X axis and the line group parallel to the Y axis of the printed circuit board. In the case of FIG. 4, the holes 1 indicated by C1 to C4 and D1 to D4 are arranged in a lattice pattern. The signal line electrode of each hole 1 and the GND electrode of each adjacent hole 1 are arranged adjacent to each other.

  Referring to FIG. 4, the arrangement is the same as the arrangement of the holes 1 shown in FIG. 2 of the first embodiment. Therefore, the signal leakage preventing function is the same, and the detailed description is omitted. The feature of the second embodiment is that the area of the GND electrode 6 is about three times as large as that of the signal line electrode 5. Since the area of the GND electrode 6 is large, the shielding effect is increased, and signal leakage can be further reduced as compared with the first embodiment.

As described above, the printed circuit board provided with the interlayer connection holes of the present invention can be mounted with a higher density than in the first embodiment. The reason is that since the GND electrode 6 for blocking the coupling due to the stray capacitance between the signal line electrode 5 and the other electrode is wider, the action of blocking the coupling is increased, and the signal leakage can be further reduced. Because.
(Third embodiment)
A third embodiment of the present invention will be described with reference to the drawings.

  The printed circuit board having the interlayer connection hole according to the third embodiment of the present invention connects the signal line to an electrode in which the length of the arc of the cross section of the inner wall of the interlayer connection hole is approximately one-fourth of the circumference. And an interlayer connection hole for connecting a ground to an electrode whose arc length of the cross section of the inner wall is approximately three-fourths of the circumference. Further, when the above-mentioned interlayer connection holes are arranged on the printed board, each of the interlayer connection holes is arranged so that one of the boundary lines between the signal line electrode and the GND electrode is parallel to the coordinate axis X passing through the origin of the printed board. Deploy. With the above-described arrangement of the interlayer connection holes, the periphery of the signal line electrode is surrounded by the GND electrode, and signal leakage can be prevented.

  This will be described with reference to FIGS. In addition, the hole 1 of 3rd Embodiment is the same structure as the hole 1 demonstrated in 2nd Embodiment, as shown in FIG.

  FIG. 5 is a perspective view from the surface of a printed circuit board having an interlayer connection hole according to the third embodiment of the present invention. The names given in common to FIGS. 3 and 5 indicate the same parts.

  In this figure, the coordinate origin of the printed circuit board is at the lower left of the drawing. The X axis of the printed circuit board is a coordinate axis drawn rightward from the origin, and the Y axis is drawn perpendicularly from the origin to the X axis.

  The centers of the interlayer connection holes are arranged at the intersections of the lattice formed by the line group parallel to the X axis and the line group parallel to the Y axis of the printed circuit board. In the case of FIG. 5, the holes 1 indicated by E1 to E4 and F1 to F4 are arranged in a lattice pattern.

  The feature of the printed circuit board in the third embodiment is that the electrodes of each hole 1 are aligned so that one of the boundary lines between the signal line electrode 5 and the GND electrode 6 is parallel to the X axis of the printed circuit board. It is a point that is arranged.

  Here, the boundary line is a straight line that is in the center portion of the clearance 7 of the hole 1 and is parallel to the end face where the signal line land 2 and the GND land 3 face each other.

  This figure shows an example in which all the holes 1 from E1 to E4 and F1 to F4 are viewed from above, and the boundary line of the clearance 7 on the right side of the signal electrode 5 is arranged to be parallel to the X axis. Therefore, the GND electrode 6 of each hole 1 surrounds the signal line electrode 5.

  For example, when the signal line electrode 5 of each hole 1 of E3, F3, and F2 is viewed from the signal line electrode 5 of the hole 1 at the position of E2, the GND of each hole 1 of E2, E3, F3, and F2 The electrode 6 becomes a shield, and the signal line electrodes 5 in the holes 1 of E3, F3, and F2 cannot be directly seen. This positional relationship is common to all the other holes 1 formed on the printed circuit board.

  This means that signal coupling due to stray capacitance between the signal line electrodes 5 is very small. Therefore, this structure can prevent signal leakage.

As described above, the printed circuit board provided with the interlayer connection holes of the present invention can be mounted with higher density than the first and second embodiments. The reason is that by arranging the signal line electrode 5 so as to be surrounded by the GND electrode 6, shielding can be performed to prevent leakage of a signal having a higher frequency, and the interlayer connection holes can be arranged at a high density. It is.
(Fourth embodiment)
A fourth embodiment of the present invention will be described with reference to the drawings.

  The printed circuit board provided with the interlayer connection hole according to the fourth embodiment of the present invention divides the electrode of the interlayer connection hole into four equal parts and arranges the electrode connected to the signal and the electrode connected to GND adjacent to each other. Has a connection hole. Further, when the above-described interlayer connection holes are arranged on the printed board, the signal electrodes and the ground electrodes of the adjacent interlayer connection holes are arranged adjacent to each other. As a result, two sets of signal lines can be mounted in one interlayer connection hole. Further, since each signal line is shielded by the ground electrode, signal leakage between the signal line and other signal lines can be prevented.

  FIG. 6 shows that the electrode on the inner wall of the hole 1 provided on the printed circuit board is 4 etc. on the first signal line electrode 51, the second signal line electrode 52, the first GND electrode 61, and the second GND electrode 62. The structure of the interlayer connection hole divided into minutes is shown. In FIG. 6, the first signal line electrode 51, the first GND electrode 61, and the second GND electrode 62 are disposed adjacent to each other, and similarly, the signal electrode 52, the first GND electrode 61, and the second GND electrode are arranged. The structure of an interlayer connection hole in which 62 is arranged adjacent to each other is shown. In FIG. 6, the insulating substrate of the printed circuit board is omitted, and only wiring and electrode portions are shown.

  The number of electrodes to be divided may be an even number of four or more. The ratio of the area of the electrode is not equally divided, and may be changed depending on the type of electrode.

  The first signal line electrode 51 is connected to the first signal line land 21 formed on the front surface of the printed circuit board and the first signal line land 21 formed on the back surface of the printed circuit board.

  A first signal wiring 91 is connected to each first signal line land 21.

  The second signal line electrode 52 is connected to the second signal line land 22 formed on the front surface of the printed circuit board and the second signal line land 22 formed on the back surface of the printed circuit board.

  A second signal wiring 92 is connected to each second signal line land 22.

  The first GND electrode 61 is connected to the first GND land 31 formed on the surface of the printed circuit board, the first GND land 31 formed on the back surface of the printed circuit board, and the GND layer 4 inside the printed circuit board. .

  The second GND electrode 62 is connected to the second GND land 32 formed on the surface of the printed circuit board, the second GND land 32 formed on the back surface of the printed circuit board, and the GND layer 4 inside the printed circuit board. .

  The first signal line electrode 51 and the first signal line land 21, and the first GND electrode 61 and the first GND land 31 are separated and insulated by a clearance 7.

  The first signal line electrode 51 and the first signal line land 21, and the second GND electrode 62 and the second GND land 32 are separated and insulated by a clearance 7.

  The second signal line electrode 52 and the second signal line land 22, and the second GND electrode 62 and the second GND land 32 are separated and insulated by a clearance 7.

  The second signal line electrode 52 and the second signal line land 22, and the first GND electrode 61 and the first GND land 31 are separated and insulated by a clearance 7.

  The first signal line electrode 51 is separated from the GND layer 4 by a first GND layer clearance 81 and insulated.

  The second signal line electrode 52 is separated from the GND layer 4 by a second GND layer clearance 82 and insulated.

  FIG. 7 is a perspective view from the surface of a printed circuit board having an interlayer connection hole according to the fourth embodiment of the present invention. Note that the names given in common to FIGS. 6 and 7 indicate the same parts.

  Next, the operation and effect when the hole 1 of FIG. 6 is arranged on the printed circuit board will be described.

  In the array of holes 1 parallel to the X axis shown in G1 to G4 and H1 to H4, the first signal line electrode 51 in the hole 1 and the second GND electrode 62 in the hole 1 arranged next to each other are adjacent to each other. The respective electrodes of the hole 1 are arranged in the above. With this arrangement, the first signal line electrode 51 is sandwiched between the second GND electrode 62 and the second GND electrode 62 in the hole 1 adjacent to the second GND electrode 62. For example, the first signal line electrode 51 of G2 is sandwiched between the second GND electrode 62 of G3 which is the hole 1 adjacent to the second GND electrode 62 of G2. This structure is common to the other holes 1 arranged in a lattice pattern, all the first signal line electrodes 51 and all the second signal line electrodes 52.

  Accordingly, each of the first signal line electrode 51 and the second signal line electrode 52 is connected to the second signal line electrode 52 of the other hole 1 adjacent to the second signal line electrode 52 of the other hole 1. Therefore, the stray capacitance is reduced by the first GND electrode 61 and the second GND electrode 62 in each hole 1.

  The operation of preventing signal leakage that occurs when the holes 1 are arranged as described above will be described. As an example, it is assumed that the first signal line electrode 51 and the second signal line electrode 52 of the hole 1 in the vicinity of G2 are viewed with the first signal line electrode 51 of G2 as the center.

  The stray capacitance between the first signal line electrode 51 of G2 and the second signal line electrode 52 of G2 is reduced by the first GND electrode 61 of G2 and the second GND electrode 62 of G2.

  The stray capacitance between the first signal line electrode 51 of G2 and the second signal line electrode 52 of H2 is reduced by the second GND electrode 62 of G2 and the first GND electrode 61 of H2.

  The stray capacitance between the first signal line electrode 51 of G2 and the second signal line electrode 52 of G3 is reduced by the first GND electrode 61 of G2 and the second GND electrode 62 of G3.

  The stray capacitance between the first signal line electrode 51 of G2 and the second signal line electrode 52 of H3 is reduced by the first GND electrode 61 of H2 and the second GND electrode 62 of G3.

  The function of preventing signal leakage between the first signal line electrode 51 and the second signal line electrode 52 of the hole 1 in the vicinity of the second signal electrode 52 is the first signal. This is the same as the case of the line electrode 51.

  As described above, the printed circuit board having the interlayer connection hole of the present invention can prevent signal leakage and realize high-density mounting wiring. The reason is that the signal wiring density of the printed circuit board can be increased by mounting two sets of electrodes in which the signal line electrode and the GND electrode are adjacent to each other in the interlayer connection hole.

  Although the present invention has been described above with reference to the embodiments (and examples), the present invention is not limited to the above embodiments (and examples). Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.

1 hole 2 signal line land 3 GND land 4 GND layer 5 signal line electrode 6 GND electrode 7 clearance 8 GND layer clearance 9 signal wiring 21 first signal line land 22 second signal line land 31 first GND land 32 first 2 GND lands 51 First signal line electrode 52 Second signal line electrode 61 First GND electrode 62 Second GND electrode 81 First GND layer clearance 82 Second GND layer clearance 91 First signal wiring 92 Second signal wiring

Claims (8)

A printed circuit board having a plurality of interlayer connection holes for transmitting high-speed signals,
On the inner wall of the interlayer connection hole, the electrode connected to the signal line and the electrode connected to the ground are alternately arranged while maintaining an insulation state from each other,
The printed circuit board in which the plurality of interlayer connection holes are arranged so that the electrode connected to the signal line and the electrode connected to the ground of the adjacent interlayer connection holes are adjacent to each other.   The printed board according to claim 1, wherein two electrodes for dividing the interlayer connection hole so that the arcs of the cross section of the inner wall have the same length are disposed on the inner wall of the interlayer connection hole.   On the inner wall of the interlayer connection hole, the interlayer connection hole includes a first electrode in which the length of the arc of the cross section of the inner wall is approximately a quarter of the circumference and the length of the arc of the cross section of the inner wall. 2. The print according to claim 1, wherein a second electrode having a thickness of approximately three-fourths of a circumference is disposed, the first electrode is connected to a signal line, and the second electrode is connected to a ground. substrate.   4. The printed circuit board according to claim 3, wherein each of the interlayer connection holes is disposed so that one of the boundary lines between the first electrode and the second electrode is parallel to a coordinate axis X passing through the origin of the printed circuit board. A method of arranging a plurality of interlayer connection holes on a printed circuit board that transmits high-speed signals,
On the inner wall of the interlayer connection hole, the electrode connected to the signal line and the electrode connected to the ground are alternately arranged while maintaining an insulation state from each other,
An arrangement method of arranging the plurality of interlayer connection holes in the adjacent interlayer connection holes so that the electrode connected to the signal line and the electrode connected to the ground are adjacent to each other.   6. The arrangement method according to claim 5, wherein two electrodes for dividing the interlayer connection hole so that the arcs of the cross section of the inner wall have the same length are disposed on the inner wall of the interlayer connection hole.   The length of the first electrode in which the length of the arc of the cross-section of the inner wall is approximately one-fourth of the circumference and the length of the arc of the cross-section of the inner wall on the inner wall of the interlayer connection hole 6. A placement method according to claim 5, wherein a second electrode having a length of approximately three-fourths of the circumference is placed, the first electrode is connected to a signal line, and the second electrode is connected to the ground.   8. The printed circuit board according to claim 7, wherein each of the interlayer connection holes is arranged so that one of the boundary lines between the first electrode and the second electrode is parallel to a coordinate axis X passing through the origin of the printed circuit board. How to place connection holes.