JP2014086662A - Method for manufacturing printed board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a printed board capable of preventing a short circuit between upper and lower wirings and deterioration in insulation resistance.SOLUTION: A method for manufacturing a printed board comprises the steps of: forming an insulating film 7 above an insulating substrate 1; forming a seed layer 11 on the insulating film 7; forming a resist 13 on the seed layer 11; forming wiring grooves 13a to 13e in the resist 13; forming metal wirings 15a to 15e thinner than the resist 13 in the wiring grooves 13a to 13e by electrolytic plating; making the resist 13 thinner than the metal wirings 15a to 15e by etching; removing protrusions t from exposed surfaces of the metal wirings 15a to 15e by polishing; removing the resist 13 by etching; and removing the seed layer 11 exposed from the metal wirings 15a to 15e by etching.

Description

  The present invention relates to a method for manufacturing a printed circuit board.

  A printed circuit board on which a semiconductor device, a resistance element, and the like are mounted is formed by, for example, a built method using a semi-additive manufacturing method. The build method is one of the methods for forming a multilayer wiring structure by repeatedly laminating wiring and insulating layers on a core substrate, and the semi-additive manufacturing method is a wiring forming method as shown below.

  First, an insulating resin film is laminated on a core substrate having a first layer wiring formed on the surface to form an insulating layer. After that, a via hole is formed by irradiating a part of the insulating layer with a laser beam. Furthermore, after a metal seed layer is formed by chemical plating in the via hole and on the insulating layer, a resist pattern is formed on the metal seed layer, and a metal wiring is formed in the resist pattern wiring groove by electrolytic plating. To do. Subsequently, after removing the resist pattern, the metal seed layer in a region not covered with the metal wiring is removed by etching using the metal wiring as a mask.

  As described above, the metal wiring is formed by electrolytic plating in the wiring groove of the resist pattern. However, the difference in the density and position of the wiring groove causes a difference in the formation rate of the plating metal, and the film thickness distribution is not good. It is known that the film thickness becomes uniform and the film thickness of the metal wiring tends to vary. Further, it is known that the metal wiring formed by the electrolytic plating method tends to be thicker with the center raised.

  In order to make the film thickness of such metal wiring uniform, it is known to adjust the film thickness of the metal wiring by forming the metal wiring higher than the resist pattern and then adjusting the etching conditions. It is also known that the bulge at the center of the metal wiring is flattened by etching.

JP 2008-258483 A JP 2007-329325 A

  By the way, when the metal wiring is formed by the electrolytic plating method, a protrusion is formed on the surface of the metal wiring, and the protrusion reaches a maximum of 40 μm. If the upper insulating layer and the upper metal wiring are formed in this order with such protrusions still existing, the upper metal protrusion on the lower metal wiring enters the upper insulating layer and shorts with the upper metal wiring. Or the insulation resistance between the upper and lower metal wirings deteriorates.

  Such protrusions are difficult to remove even when the metal wiring is etched as described above. This is because the protrusion functions as a kind of mask and does not disappear by etching.

  The objective of this invention is providing the manufacturing method of the printed circuit board which can prevent the short circuit of upper and lower wiring, and deterioration of insulation tolerance.

  According to one aspect of the present embodiment, a step of forming an insulating film over an insulating substrate, a step of forming a seed layer on the insulating film, a step of forming a resist on the seed layer, Forming a wiring groove in the resist; forming a metal wiring thinner than the resist in the wiring groove by electrolytic plating; etching the resist to make a thin layer thinner than the metal wiring; There is provided a method for manufacturing a printed circuit board, comprising: removing a protrusion on an exposed surface of a metal wiring by polishing; removing the resist; and removing the seed layer exposed from the metal wiring by etching. The

  According to this embodiment, it is possible to prevent a short circuit between the upper and lower metal wirings and the deterioration of the insulation resistance of the insulating layer therebetween.

Drawing 1 (a)-(c) is a sectional view showing an example of a manufacturing method of a printed circuit board concerning an embodiment. 2A to 2C are cross-sectional views illustrating an example of a printed circuit board manufacturing method according to the embodiment. 3A to 3D are cross-sectional views illustrating an example of a method for manufacturing a printed circuit board according to the embodiment. 4A to 4C are cross-sectional views illustrating an example of a printed circuit board manufacturing method according to the embodiment. 5A to 5C are cross-sectional views illustrating a method for manufacturing a printed circuit board according to a comparative example.

  Embodiments will be described below with reference to the drawings. In the drawings, similar components are given the same reference numerals.

  1-4 is sectional drawing which shows an example of the manufacturing method of the printed circuit board concerning this embodiment, and FIG. 3 is expanding and showing a part of printed circuit board among those figures.

Next, steps required until a structure shown in FIG.
First, as the insulating substrate 1, for example, a substrate formed of glass epoxy or glass fiber is used, and a metal film such as a copper foil film is laminated on the lower surface and the upper surface thereof. Through holes 1 a to 1 d are formed in a part of the insulating substrate 1 using a drill or a laser. Conductive contact layers 3a to 3d are formed on at least the inner peripheral surfaces of the through holes 1a to 1d by electroless plating or conductive paste filling.

  The respective metal films on the lower surface and the upper surface of the insulating substrate 1 are patterned using a resist pattern (not shown) and an etching technique. As a result, first-layer metal wirings 4a to 4d, pads (not shown) and the like are formed on the lower surface side of the insulating substrate 1, and first-layer metal wirings 5a to 5d, pads (not shown) and the like are formed on the upper surface side. It is formed.

  Next, as shown in FIG. 1B, the first insulating resin films 6 and 7 are laminated on the lower surface and the upper surface of the insulating substrate 1, respectively. For example, a polyimide film is used as the insulating resin films 6 and 7.

Thereafter, by using a CO ₂ laser to irradiate the first insulating resin film 6 on the lower surface side with a laser beam, as shown in FIG. 1C, the first layer metal wiring 4a on the lower surface side. First-layer via holes 8a to 8d exposing a part of ˜4d are formed. Further, by the same method, first-layer via holes 9a to 9d are formed on the first metal wirings 5a to 5d in the first insulating resin film 7 on the upper surface side.

  Subsequently, a desmear process for removing the resin residue adhering to the bottoms of the via holes 8a to 8d and 9a to 9d is performed, and the exposed surfaces of the insulating resin films 6 and 7 are roughened to form seed layers 10 and 11 to be described later. Make it easy to adhere. As the desmear process, for example, either a wet process using a chemical solution such as permanganic acid or a dry process using plasma may be used. When plasma is used, an inert gas such as helium gas is used together with oxygen gas as the gas for generating plasma.

  Next, as shown in FIG. 2A, metal is formed on the exposed surfaces of the first insulating resin films 6 and 7 on the lower surface side and the upper surface side, and on the inner surfaces of the via holes 8a to 8d and 9a to 9d. For example, the copper seed layers 10 and 11 are formed by electroless plating.

  Furthermore, after laminating photosensitive dry film resists 12 and 13 on the exposed surfaces of the seed layers 10 and 11 on the lower surface side and the upper surface side, the dry film resists 12 and 13 are exposed and developed in order. Thereby, as shown in FIG. 2B, wiring grooves 12a to 12d are formed in the dry film resist 12 covering the copper seed layer 10 on the lower surface side. Further, wiring grooves 13 a to 13 e are formed in the photoresist 13 covering the upper copper seed layer 11. A part of the wiring grooves 12a to 12d and 13a to 13e has a planar shape passing over the via holes 8a to 8d and 9a to 9d. The width of the wiring grooves 12a to 12d and 13a to 13e is, for example, about 20 μm.

  Subsequently, as shown in FIG. 2 (c), the seed layers 10 and 11 on the lower surface side and the upper surface side are used for the electrode for plating, and the second layer metal is formed in the wiring grooves 12a to 12d and 13a to 13e. Metal films to be the wirings 14a to 14d and 15a to 15e, for example, copper films or copper alloy films are formed by electrolytic plating. In this case, the metal films formed in the via holes 8a to 8d and 9a to 9d function as vias.

  Thereby, on the lower surface side of the insulating substrate 1, the second-layer metal wirings 14a to 14d and the first-layer metal wirings 4a to 4d are electrically connected via the via holes 8a to 8d. Similarly, on the upper surface side, second-layer metal wirings 15a to 15d and first-layer metal wirings 5a to 5d are electrically connected via via holes 9a to 9d.

  By the way, as shown in FIG. 3A in which the structure on the upper surface side of the insulating substrate 1 shown in FIG. 2C is enlarged, protrusions t are formed on the exposed surfaces of the second-layer metal wirings 15a to 15e. The protrusion t has a height of about 40 μm at the maximum. Further, the target thickness of the second-layer metal wirings 15 a to 15 e is set to be thinner than that of the dry film resist 13. For example, the thickness of the second-layer metal wirings 15a to 15e is about 23 μm, and the thickness of the dry film resist 13 is about 24 μm.

Next, as shown in FIG. 3B, the dry film resist 13 is etched halfway so as to be thinner than the metal wirings 15a to 15e. As the etching method, for example, a plasma etching method using a gas containing O ₂ and CF ₄ is employed.

  The dry film resist 13 after etching has a thickness that prevents the second-layer metal wirings 15a to 15e from being peeled off by a subsequent polishing process, that is, a thickness that is 70% or more and 80% or less of the thickness of the metal wirings 15a to 15e. For example, when the metal wirings 15a to 15e are 23 μm, the thickness is adjusted to be about 16 μm to about 18 μm.

  Thereafter, as shown in FIG. 3C, the second-layer metal wirings 15a to 15e protruding from the upper surface of the dry film resist 13 are polished by buffing (not shown) to thereby form the second-layer metal. The protrusion t of the wirings 15a to 15e is removed. In this case, in order to adjust the roughness of the surface to be polished, for example, 3000 count buffol is used. In this case, the second-layer metal wirings 15a to 15e are slightly thinner, while the dry film resist 13 is adjusted as described above, and is hardly scraped. A flat polishing cloth may be used instead of the buffalo.

  Thereafter, as shown in FIG. 3D, the dry film resist 13 is removed by etching. As an etching method in this case, a wet etching method using a sodium hydroxide solution or the like is used. Note that the above plasma etching method may be used.

  A series of processes including the thinning of the dry film resist 13 as described above, the removal of the protrusions t by polishing, and the removal of the remaining dry film resist 13 are the dry film resist 12 on the lower surface side of the insulating substrate 1. The same applies to the second-layer metal wirings 14a to 14d. As a result, the upper surface side and the lower surface side of the insulating substrate 1 are formed with the second-layer metal wirings 14a to 14d and 15a to 15e and the seed layers 10 and 11 from which the protrusion t is removed, as shown in FIG. It will be in the state exposed on the insulated substrate 1. FIG.

  Next, as shown in FIG. 4B, the second-layer metal wirings 14a to 14d and 15a to 15e are used as a mask, and the exposed seed layers 10 and 11 are removed by etching, whereby 2 The patterns of the metal wirings 14a to 14d and 15a to 15e in the layer are separated. When the seed layers 10 and 11 are made of copper, for example, wet etching using a chemical solution containing hydrogen peroxide and sulfuric acid is used.

  Thereafter, as shown in FIG. 4C, on each of the second-layer metal wirings 14a to 14d and 15a to 15e on the lower surface side and the upper surface side and the first insulating resin films 6 and 7, for example, By laminating the polyimide film, the second insulating resin films 16 and 17 are formed. Thereafter, second via holes are respectively formed in the second insulating resin films 16 and 17 by the same method as described above, and third metal wirings 18 and 19 are formed thereon. A process similar to that described above for removing the protrusions of the metal wirings 18 and 19 in the layer is repeated. Thereby, a multilayer wiring structure is formed on each of the lower surface side and the upper surface side of the insulating substrate 1, and the basic structure of the printed circuit board is completed.

  According to the printed circuit board formed by the manufacturing method as described above, the protrusion t appearing on the upper surfaces of the second-layer metal wirings 14a to 14d and 15a to 15e formed by the electrolytic plating method is removed. Is prevented from entering the second-layer insulating resin films 16 and 17. Thereby, a short circuit between the second-layer metal wirings 14a to 14d and 15a to 15e and the third-layer metal wirings 18 and 19 formed thereabove via the third-layer insulating resin films 16 and 17 and those It is possible to prevent deterioration of insulation resistance between the two.

  By the way, as shown in FIG. 5A, when the dry film resist 13 is removed before the surfaces of the second-layer metal wirings 15a to 15e and the protrusions t are polished with the buffalo, the width of about 20 μm is obtained due to the stress applied by the baffle. Thin metal wirings 15a to 15e are easily peeled off. In particular, as shown in FIGS. 5B and 5C, the metal wiring 15e in the region where the via holes 9a to 9d do not exist below does not have a support against the stress caused by the buffalo, so that it is easy to peel off. Will increase.

  In contrast, in the present embodiment, as described above, when the protrusions t on the upper surfaces of the second-layer metal wirings 14a to 14d and 15a to 15e are removed by polishing, the thicknesses of the dry film resists 12 and 13 are reduced. The metal wires 14a to 14d and 15a to 15e are supported from the side surfaces by remaining in 70% to 80% of the thickness of the second layer metal wires 14a to 14d and 15a to 15e. As a result, the metal wirings 14a to 14d and 15a to 15e are difficult to move due to the stress generated when the protrusions t of the second-layer metal wirings 14a to 14d and 15a to 15e are removed, and the peeling of them is prevented.

  If the dry film resists 12 and 13 are made thinner than 70%, the movement restricting force of the metal wirings 14a to 14d and 15a to 15e by the dry film resists 12 and 13 becomes weak at the time of polishing. The problem described in the above occurs.

  That is, as shown in FIG. 3A, the dry film resists 12 and 13 are left thicker than the second-layer metal wirings 14a to 14d and 15a to 15e, or more than 80% thicker than the above. When the surface is polished, the bafrol also polishes the dry film resists 12 and 13. In such a case, not only the metal particles generated by the polishing but also the particles of the material of the dry film resists 12 and 13 are embedded in the eyes of the buffalo and become clogged. This requires frequent dressing of the baffle by the dresser, resulting in a problem that the work efficiency is reduced and further the deterioration of the baffle becomes severe.

  On the other hand, in this embodiment, after forming the second layer metal wirings 14a to 14d and 15a to 15e thinner than the dry film resists 12 and 13, the thicknesses thereof are changed to the second layer metal wirings 14a to 14d. , 15a to 15e are adjusted to be 70% or more and 80% or less. As a result, it is possible to prevent the dry film resists 12 and 13 from being polished by the buffalo, so that clogging of the baffle is suppressed.

  Furthermore, when dry film resists 12 and 13 thinner than the second-layer metal wirings 14a to 14d and 15a to 15e are formed on the seed layers 10 and 11 in the initial state, the buffalo is dry film resist 12 when the protrusion t is polished. , 13 becomes difficult to contact. However, when the metal wirings 14a to 14d and 15a to 15e are formed thicker than the dry film resists 12 and 13, the metal wirings 14a to 14d and 15a to 15e are not only in the thickness direction but also in the lateral direction on the dry film resists 12 and 13. Also formed to spread. For this reason, the upper portions of the metal wirings 14a to 14d and 15a to 15e are too close to each other in the lateral direction, and a short circuit is likely to occur. Therefore, it is preferable that the second-layer metal wirings 14 a to 14 d and 15 a to 15 e are formed thinner than the dry film resists 12 and 13.

  When the metal wiring is formed of copper or a copper alloy, an antioxidant metal such as tantalum or gold may be formed extremely thin on the surface of the metal wiring by an electrolytic plating method. Thereby, when the dry film resist 13 is thinned by oxygen plasma, oxidation of the metal wirings 14a to 14d and 15a to 15e is prevented. The antioxidant metal may be left during polishing of the protrusion t or may be removed.

  All examples and conditional expressions given here are intended to help the reader understand the inventions and concepts that have contributed to the promotion of technology, such examples and It is interpreted without being limited to the conditions, and the organization of such examples in the specification is not related to showing the superiority or inferiority of the present invention. While embodiments of the present invention have been described in detail, it will be understood that various changes, substitutions and variations can be made thereto without departing from the spirit and scope of the invention.

DESCRIPTION OF SYMBOLS 1 Insulation board | substrate 1a-1d Through-hole 4a-4d, 5a-5d Metal wiring 6 of the 1st layer, 7 Insulation resin film 8a-8d, 9a-9d Via hole 10, 11 Seed layer 12, 13 Dry film resist 12a-12d, 13a to 13e Wiring grooves 14a to 14d, 15a to 15e Metal wiring 16, 17 Second-layer insulating resin film

Claims (5)

Forming an insulating film above the insulating substrate;
Forming a seed layer on the insulating film;
Forming a resist on the seed layer;
Forming a wiring groove in the resist;
Forming a metal wiring thinner than the resist in the wiring groove by electrolytic plating;
Etching the resist to make it thinner and thinner than the metal wiring;
Removing the protrusions on the exposed surface of the metal wiring by polishing;
Removing the resist;
Removing the seed layer exposed from the metal wiring by etching;
A method of manufacturing a printed circuit board having   2. The method of manufacturing a printed circuit board according to claim 1, wherein the thinned resist is thinned to a thickness of 70% or more and 80% or less with respect to a thickness of the metal wiring.   The method for manufacturing a printed circuit board according to claim 1, wherein the resist is thinned by plasma etching.   The method for manufacturing a printed circuit board according to any one of claims 1 to 3, wherein an antioxidant metal is formed on an upper surface of the metal wiring. Before forming the insulating film, forming a lower wiring on the insulating substrate;
Forming a hole on a part of the lower wiring in the insulating film;
Burying a part of the seed layer and the metal wiring in the hole, and connecting the metal wiring and the lower wiring;
5. The method of manufacturing a printed circuit board according to claim 1, wherein

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