JP2014044980A - Lead frame for manufacturing semiconductor device, and method of manufacturing semiconductor device - Google Patents

Lead frame for manufacturing semiconductor device, and method of manufacturing semiconductor device Download PDF

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JP2014044980A
JP2014044980A JP2012184965A JP2012184965A JP2014044980A JP 2014044980 A JP2014044980 A JP 2014044980A JP 2012184965 A JP2012184965 A JP 2012184965A JP 2012184965 A JP2012184965 A JP 2012184965A JP 2014044980 A JP2014044980 A JP 2014044980A
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lead
semiconductor element
lead frame
continuous
suspension
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JP6028454B2 (en
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Satoshi Shibazaki
聡 柴崎
Chikao Ikenaga
知加雄 池永
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Dai Nippon Printing Co Ltd
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Dai Nippon Printing Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747Copper [Cu] as principal constituent

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a multiply demarcated lead frame and a method of manufacturing the same capable of preventing deformation and the like of a tie-bar in a vicinity of a continuous part between the other end part of a suspension lead and an end part of the tie-bar, and to provide a method of manufacturing a semiconductor device using the multiply demarcated lead frame.SOLUTION: A multiply demarcated lead frame comprises: a plurality of unit lead frames arranged in a matrix and each having a semiconductor element mounting part mounting a semiconductor element on an upper surface, a suspension lead whose one end part is continuous to the semiconductor element mounting part and whose the other end part is branched into two, and a plurality of leads juxtaposed around the semiconductor element mounting part; and a tie-bar provided to a boundary part between the unit lead frames and supporting the plurality of leads. The branched end part of one unit lead frame is continuous to that of an adjacent other unit lead frame, and the respective both-end parts of the tie-bar are continuous to the continuous part between the branched end part of adjacent two unit lead frames. A distance from a branch point of the suspension lead to the branched end part is longer than that from the continuous part of the branched end part to the closest lead.

Description

本発明は、半導体装置を製造するために用いられるリードフレーム及び当該リードフレームを用いた半導体装置の製造方法に関する。   The present invention relates to a lead frame used for manufacturing a semiconductor device and a method for manufacturing a semiconductor device using the lead frame.

近年、基板実装の高密度化に伴い、基板に実装される半導体装置の小型化・薄型化が要求されてきている。かかる要求に対応すべく、従来、リードフレームを用い、当該リードフレームの搭載面に搭載した半導体素子を封止樹脂にて封止するとともに、下面側にリードの一部分を露出させてなる、いわゆるQFN(Quad Flat Non-lead)タイプの半導体装置が種々提案されている。   2. Description of the Related Art In recent years, with the increase in density of board mounting, there has been a demand for downsizing and thinning of semiconductor devices mounted on a board. In order to meet such demands, a conventional lead frame is used, and a semiconductor element mounted on the mounting surface of the lead frame is sealed with a sealing resin, and a part of the lead is exposed on the lower surface side, so-called QFN. Various (Quad Flat Non-lead) type semiconductor devices have been proposed.

このようなQFNタイプの半導体装置を製造するためのリードフレームとして、図7及び図8に示すように、上面に半導体素子を搭載するダイパッド200と、ダイパッド200に先端部を対向させるようにして当該ダイパッド200の周囲に並設されている複数のリード300と、一端部410をダイパッド200の四隅に連続させ、ダイパッド200を支持する吊りリード400とを含む単位リードフレームLFUが、縦横に複数マトリックス状に配列されてなるリードフレーム100が提案されている。そして、このリードフレーム100において、隣接する単位リードフレームLFUの境界部には、ダイパッド200の周囲に並設されている複数のリード300を支持するタイバー500が設けられている。   As a lead frame for manufacturing such a QFN type semiconductor device, as shown in FIG. 7 and FIG. 8, the die pad 200 on which the semiconductor element is mounted on the upper surface and the tip of the die pad 200 are made to face each other. A unit lead frame LFU including a plurality of leads 300 arranged in parallel around the die pad 200 and suspension leads 400 that support one end portion 410 at the four corners of the die pad 200 and support the die pad 200 is vertically and horizontally arranged in a matrix. There has been proposed a lead frame 100 that is arranged in the same manner. In the lead frame 100, a tie bar 500 that supports a plurality of leads 300 arranged in parallel around the die pad 200 is provided at the boundary between adjacent unit lead frames LFU.

かかるリードフレーム100において、吊りリード400の他端部420は、二股に分岐した、いわゆるフィッシュテール形状をなしており、隣接する単位リードフレームLFUの分岐端部420a同士が連続している。そして、タイバー500は、その両端部を吊りリード400の一の分岐端部420a(分岐端部420a,420a同士の連続部)に連続させて、隣接する単位リードフレームLFUの境界部に設けられている。   In the lead frame 100, the other end portion 420 of the suspension lead 400 has a so-called fishtail shape that is bifurcated, and branch end portions 420a of adjacent unit lead frames LFU are continuous with each other. The tie bar 500 is provided at the boundary between adjacent unit lead frames LFU, with both ends thereof continuing to one branch end 420a (a continuous portion between the branch ends 420a and 420a) of the suspension lead 400. Yes.

このような構成を有するリードフレーム100においては、吊りリード400の分岐点400Aから分岐端部420aまでの距離D100が、分岐端部420a,420a同士の連続部400Bから当該連続部400Bの最近傍に位置するリード300までの距離D200以下であって、隣接する各リード300,300間の距離D300が、分岐端部420a,420a同士の連続部400Bから当該連続部400Bの最近傍に位置するリード300までの距離D200よりも短く設計されている(特許文献1参照)。   In the lead frame 100 having such a configuration, the distance D100 from the branch point 400A of the suspension lead 400 to the branch end portion 420a is from the continuous portion 400B between the branch end portions 420a and 420a to the nearest to the continuous portion 400B. A lead 300 that is not more than a distance D200 to a lead 300 that is positioned, and the distance D300 between adjacent leads 300, 300 is located from the continuous part 400B between the branch end parts 420a, 420a to the nearest part of the continuous part 400B. It is designed to be shorter than the distance D200 (see Patent Document 1).

特許第3879452号公報Japanese Patent No. 3879452

上記のようなリードフレーム100において、複数のリード300を支持するタイバー500は、その両端部のみが吊りリード400の一の分岐端部420a(分岐端部420a,420a同士の連続部400B)に連続した状態で単位リードフレームLFUの境界部に設けられているため、かかるリードフレーム100の製造工程や当該リードフレーム100を用いた半導体装置の製造工程におけるハンドリング時等にタイバー500が揺動することがある。   In the lead frame 100 as described above, the tie bar 500 that supports the plurality of leads 300 is continuous only at both ends of the branch end portion 420a of the suspension lead 400 (continuous portion 400B between the branch end portions 420a and 420a). In this state, the tie bar 500 swings during handling in the manufacturing process of the lead frame 100 or the manufacturing process of the semiconductor device using the lead frame 100. is there.

ここで、タイバー500と、吊りリード400の一の分岐端部420aとが交差する点(分岐端部420a,420a同士の連続部400B)を支点とし、遥動により吊りリード400に最も近接したリード300に加わる応力を考える。当該リード300に加わる応力は、支点(連続部400B)から当該リード300までの距離(支点(連続部400B)から当該リード300までのタイバー500の長さ)に比例するため、その距離が長いほどリード300に加わる応力も大きくなる。   Here, a lead that is closest to the suspension lead 400 by swinging is a point where the tie bar 500 and one branch end portion 420a of the suspension lead 400 intersect (continuous portion 400B between the branch end portions 420a and 420a). Consider the stress applied to 300. The stress applied to the lead 300 is proportional to the distance from the fulcrum (continuous part 400B) to the lead 300 (the length of the tie bar 500 from the fulcrum (continuous part 400B) to the lead 300). The stress applied to the lead 300 also increases.

このとき、上記リードフレーム100においては、吊りリード400の分岐点400Aから分岐端部420aまでの距離D100が、分岐端部420a,420a同士の連続部400Bから当該連続部400Bの最近傍に位置するリード300までの距離D200以下である。その結果、上記タイバー500の揺動により、吊りリード400の一の分岐端部420a(分岐端部420a,420a同士の連続部400B)とタイバー500の端部との連続部分に対し相対的に大きな応力がかかることになり、当該連続部分の近傍において、タイバー500の捩れや撓み等の変形が生じてしまうという問題がある。   At this time, in the lead frame 100, the distance D100 from the branch point 400A of the suspension lead 400 to the branch end portion 420a is located in the vicinity of the continuous portion 400B from the continuous portion 400B between the branch end portions 420a and 420a. The distance to the lead 300 is not more than D200. As a result, the swinging of the tie bar 500 is relatively large with respect to the continuous portion between one branch end portion 420a of the suspension lead 400 (the continuous portion 400B between the branch end portions 420a and 420a) and the end portion of the tie bar 500. Stress is applied, and there is a problem that deformation such as twisting and bending of the tie bar 500 occurs in the vicinity of the continuous portion.

このようにしてリードフレームや半導体装置の製造過程においてタイバー500の変形が生じてしまうと、半導体素子の端子と各リード300との間におけるワイヤーの接続不良が生じたり、半導体装置を製造する際の樹脂封止が困難となったりすることがある。   If the tie bar 500 is deformed in the manufacturing process of the lead frame or the semiconductor device in this manner, the connection failure of the wire between the terminal of the semiconductor element and each lead 300 occurs, or the semiconductor device is manufactured. Resin sealing may be difficult.

特に、近年のリードフレーム用基材の薄板化、半導体装置における多ピン化等により、タイバー500(タイバー500の端部と吊りリード400の一の分岐端部420aとの連続部400B)にかかる負荷が増大するため、上記のような問題がより顕著に現れることとなってしまう。   In particular, the load applied to the tie bar 500 (continuous portion 400B between the end portion of the tie bar 500 and one branch end portion 420a of the suspension lead 400) due to the recent thinning of the lead frame base material, the increase in the number of pins in the semiconductor device, and the like. Therefore, the above problem appears more prominently.

上記のような課題に鑑みて、本発明は、吊りリードの他端部とタイバーの端部との連続部近傍におけるタイバーの変形等を防止することのできる多面付リードフレーム及びその製造方法、並びに当該多面付リードフレームを用いた半導体装置の製造方法を提供することを目的とする。   In view of the above problems, the present invention provides a multifaceted lead frame capable of preventing deformation of a tie bar in the vicinity of a continuous portion between the other end portion of the suspension lead and the end portion of the tie bar, a manufacturing method thereof, and It is an object of the present invention to provide a method of manufacturing a semiconductor device using the multifaceted lead frame.

上記課題を解決するために、本発明は、上面に半導体素子が搭載される半導体素子搭載部と、一端部が前記半導体素子搭載部に連続し、他端部が二股に分岐する吊りリードと、前記半導体素子搭載部に先端部を対向させるようにして当該半導体素子搭載部の周囲に並設されてなる複数のリードとを有する単位リードフレームが、縦横に複数個マトリックス状に配列されてなる多面付リードフレームであって、前記多面付リードフレームは、隣接する前記単位リードフレーム間の境界部に位置するように格子状に設けられ、前記複数のリードを支持するタイバーを備え、一の前記単位リードフレームにおける前記吊りリードの二股に分岐する各分岐端部は、隣接する他の前記単位リードフレームにおける前記吊りリードの二股に分岐する各分岐端部に連続し、前記タイバーの両端部のそれぞれは、隣接する2つの前記単位リードフレームにおける各吊りリードの分岐端部同士の連続部に連続し、前記吊りリードの分岐点から当該吊りリードの分岐端部までの距離が、前記分岐端部同士の連続部から当該連続部の最近傍に位置するリードまでの距離よりも長いことを特徴とする多面付リードフレームを提供する(発明1)。   In order to solve the above problems, the present invention includes a semiconductor element mounting portion on which a semiconductor element is mounted on an upper surface, a suspension lead having one end continuous to the semiconductor element mounting portion, and the other end bifurcated. A multi-sided structure in which a plurality of unit lead frames each having a plurality of leads arranged in parallel around the semiconductor element mounting portion so that a tip portion thereof faces the semiconductor element mounting portion are arranged in a matrix form vertically and horizontally The lead frame with a plurality of faces is provided in a lattice shape so as to be positioned at a boundary portion between the adjacent unit lead frames, and includes a tie bar that supports the plurality of leads. Each branch end branching into two branches of the suspension lead in the lead frame has each branch branched into two branches of the suspension lead in the other adjacent unit lead frame. Each end of the tie bar is continuous to a continuous portion between the branch ends of each suspension lead in two adjacent unit lead frames, and the branch of the suspension lead is branched from the branch point of the suspension lead. Provided is a multifaceted lead frame characterized in that a distance to an end is longer than a distance from a continuous portion between the branch end portions to a lead located closest to the continuous portion (Invention 1).

上記発明(発明1)においては、前記分岐端部同士の連続部から当該連続部の最近傍に位置するリードまでの距離と、隣接する前記リード間の距離とが同一であるのが好ましい(発明2)。   In the said invention (invention 1), it is preferable that the distance from the continuous part of the said branch end parts to the lead located in the nearest vicinity of the said continuous part, and the distance between the said adjacent leads are the same (invention). 2).

また、本発明は、上記発明(発明1,2)に係る多面付リードフレームを製造する方法であって、金属基板の上面及び下面のそれぞれに、所定のパターン形状を有するレジストパターンを形成するレジストパターン形成工程と、前記レジストパターンが形成された導電性基板に対してエッチング処理を施すエッチング工程とを含み、前記レジストパターン形成工程において、前記吊りリードの分岐点から当該吊りリードの分岐端部までの距離が、前記分岐端部同士の連続部から当該連続部の最近傍に位置するリードまでの距離よりも長くなるように、前記レジストパターンを形成することを特徴とする多面付リードフレームの製造方法を提供する(発明3)。   The present invention is also a method for producing a multi-faced lead frame according to the above inventions (Inventions 1 and 2), wherein a resist pattern having a predetermined pattern shape is formed on each of an upper surface and a lower surface of a metal substrate A pattern forming step and an etching step of performing an etching process on the conductive substrate on which the resist pattern is formed. In the resist pattern forming step, from a branch point of the suspension lead to a branch end of the suspension lead The resist pattern is formed so that the distance between the branch end portions is longer than the distance from the continuous portion between the branch end portions to the lead located closest to the continuous portion. A method is provided (Invention 3).

さらに、本発明は、上記発明(発明1,2)に係る多面付リードフレームにおける前記半導体素子搭載部の上面に半導体素子を固着する工程と、前記半導体素子の各端子と複数のリードのそれぞれとをワイヤーを介して接続するワイヤーボンディング工程と、前記半導体素子、前記半導体素子搭載部、前記複数のリード及び前記ワイヤーを封止樹脂にて封止する樹脂封止工程と、前記封止樹脂にて封止されたリードフレームを、前記タイバーに沿って切断し、前記半導体素子ごとに個片化するダイシング工程とを含むことを特徴とする半導体装置の製造方法を提供する(発明4)。   Furthermore, the present invention provides a step of fixing a semiconductor element to the upper surface of the semiconductor element mounting portion in the multi-faceted lead frame according to the inventions (Inventions 1 and 2); A wire bonding step of connecting a wire through a wire, a resin sealing step of sealing the semiconductor element, the semiconductor element mounting portion, the plurality of leads and the wire with a sealing resin, and the sealing resin. And a dicing step of cutting the sealed lead frame along the tie bar to separate each semiconductor element (invention 4).

本発明によれば、吊りリードの他端部とタイバーの端部との連続部近傍におけるタイバーの変形等を防止することのできる多面付リードフレーム及びその製造方法、並びに当該多面付リードフレームを用いた半導体装置の製造方法を提供することができる。   According to the present invention, a multi-sided lead frame capable of preventing deformation of the tie bar in the vicinity of the continuous portion between the other end of the suspension lead and the end of the tie bar, a manufacturing method thereof, and the multi-sided lead frame are used. A method for manufacturing a semiconductor device can be provided.

図1は、本発明の一実施形態に係る多面付リードフレームの概略構成を示す平面図である。FIG. 1 is a plan view showing a schematic configuration of a multifaceted lead frame according to an embodiment of the present invention. 図2は、本発明の一実施形態に係る多面付リードフレームの要部を示す、図1におけるA部拡大平面図である。FIG. 2 is an enlarged plan view of a part A in FIG. 1 showing a main part of the multi-sided lead frame according to the embodiment of the present invention. 図3は、本発明の一実施形態に係る多面付リードフレームの概略構成を示す、図1におけるB−B線切断端面図である。FIG. 3 is a cross-sectional end view taken along line B-B in FIG. 1 showing a schematic configuration of the multi-sided lead frame according to the embodiment of the present invention. 図4は、本発明の一実施形態に係る多面付リードフレームの製造工程を示す切断端面図(図1におけるB−B線切断端面に相当する端面図)である。FIG. 4 is a cut end view (end view corresponding to the cut line BB line in FIG. 1) showing the manufacturing process of the multifaceted lead frame according to the embodiment of the present invention. 図5は、本発明の一実施形態における半導体装置の製造工程を示す切断端面図である。FIG. 5 is a cut end view showing a manufacturing process of a semiconductor device in one embodiment of the present invention. 図6は、本発明の他の実施形態に係る多面付リードフレームにおける吊りリード他端部近傍を主に示す、拡大平面図である。FIG. 6 is an enlarged plan view mainly showing the vicinity of the other end of the suspension lead in the multi-sided lead frame according to another embodiment of the present invention. 図7は、従来のQFNタイプの半導体装置を製造するために用いられる多面付リードフレームの概略構成を示す平面図である。FIG. 7 is a plan view showing a schematic configuration of a multi-sided lead frame used for manufacturing a conventional QFN type semiconductor device. 図8は、従来のQFNタイプの半導体装置を製造するために用いられる多面付リードフレームにおけるタイバーの構成を主に示す、図7におけるX部拡大平面図である。FIG. 8 is an enlarged plan view of a portion X in FIG. 7 mainly showing a configuration of a tie bar in a multi-sided lead frame used for manufacturing a conventional QFN type semiconductor device.

本発明の実施の形態を、図面を参照しながら説明する。
〔多面付リードフレーム〕
図1は、本発明の一実施形態に係る多面付リードフレームの概略構成を示す、下面側から見た平面図であり、図2は、同実施形態に係る多面付リードフレームを示す、図1におけるA部拡大平面図であり、図3は、同実施形態に係る多面付リードフレームを示す、図1におけるB−B線切断端面図であり、図4は、同実施形態に係る多面付リードフレームの製造工程を示す、図1におけるB−B線切断端面に相当する端面図である。
Embodiments of the present invention will be described with reference to the drawings.
[Multi-sided lead frame]
1 is a plan view showing a schematic configuration of a multi-sided lead frame according to an embodiment of the present invention as viewed from the lower surface side, and FIG. 2 shows a multi-sided lead frame according to the same embodiment. FIG. 3 is an enlarged plan view of a part A in FIG. 3, FIG. 3 is a sectional view taken along the line BB in FIG. 1, showing the multi-sided lead frame according to the embodiment, and FIG. It is an end view equivalent to the BB line cutting end surface in Drawing 1 showing the manufacturing process of a frame.

図1〜3に示すように、本実施形態に係る多面付リードフレーム1は、半導体素子が搭載される上面(搭載面)を有する略方形状の半導体素子搭載部2、半導体素子搭載部2の周囲に、先端部を対向させるようにして並設されてなる複数のリード3及び半導体素子搭載部2の四隅のそれぞれに一端部41を連続させることにより半導体素子搭載部2を支持する吊りリード4を有する単位リードフレームLFUと、隣接する単位リードフレームLFUの境界部に位置するようにして設けられ、複数のリード3を支持するタイバー5とを備え、隣接する単位リードフレームLFUにおける対向する各吊りリード4の他端部42を相互に連続させることで、複数の単位リードフレームLFUが、マトリックス状(複数行×複数列)に配列されて構成されている。   As shown in FIGS. 1 to 3, the multifaceted lead frame 1 according to this embodiment includes a substantially rectangular semiconductor element mounting portion 2 having a top surface (mounting surface) on which a semiconductor element is mounted, and a semiconductor element mounting portion 2. A plurality of leads 3 arranged in parallel so that the front ends are opposed to each other and suspension leads 4 that support the semiconductor element mounting portion 2 by connecting one end portion 41 to each of the four corners of the semiconductor element mounting portion 2. Unit lead frame LFU and a tie bar 5 provided so as to be positioned at a boundary portion between adjacent unit lead frames LFU and supporting a plurality of leads 3, and each of the opposing suspensions in the adjacent unit lead frame LFU. A plurality of unit lead frames LFU are arranged in a matrix (a plurality of rows × a plurality of columns) by connecting the other end portions 42 of the leads 4 to each other. It has been.

半導体素子搭載部2は、肉厚部21と、当該肉厚部21の周縁に位置する肉薄部22とを有する。肉薄部22の厚さは、肉厚部21の厚さよりも薄く、好ましくは肉厚部21の厚さの略半分である(図3参照)。かかる肉薄部22の厚さは、多面付リードフレーム1を製造する際に用いられる基材の厚さにもよるが、通常50〜120μm程度である。   The semiconductor element mounting portion 2 includes a thick portion 21 and a thin portion 22 located on the periphery of the thick portion 21. The thickness of the thin part 22 is thinner than the thickness of the thick part 21, and is preferably about half the thickness of the thick part 21 (see FIG. 3). The thickness of the thin portion 22 is usually about 50 to 120 μm, although it depends on the thickness of the base material used when manufacturing the multifaceted lead frame 1.

複数のリード3は、半導体素子搭載部2の各辺に沿ってそれぞれ並設されている。なお、本実施形態においては、半導体素子搭載部2の各辺に沿ってそれぞれ6個(単位リードフレームLFUあたり合計24個)のリード3が並設されているが、リード3の数は半導体素子搭載部2の上面に搭載される半導体素子の端子数等に応じて適宜変更することができる。   The plurality of leads 3 are juxtaposed along each side of the semiconductor element mounting portion 2. In the present embodiment, six leads 3 are arranged in parallel along each side of the semiconductor element mounting portion 2 (a total of 24 leads per unit lead frame LFU). The number can be appropriately changed according to the number of terminals of the semiconductor element mounted on the upper surface of the mounting portion 2.

リード3は、肉厚部31と、肉厚部31の先端部及び両側面の一部に連続する肉薄部32とを有する(図2,3参照)。リード3の肉薄部32の厚さは、肉厚部31の厚さよりも薄く、好ましくは肉厚部31の厚さの略半分である(図3参照)。肉薄部32の厚さは、多面付リードフレーム1を製造する際に用いられる基材の厚さにもよるが、通常50〜120μm程度である。リード3の肉厚部31は、樹脂封止型半導体装置において下面側に露出し、外部端子としての役割を果たすこととなり、リード3の肉薄部32は、樹脂封止型半導体装置において当該肉薄部32の下方に封止樹脂が充填されることでリード3が抜け落ちるのを防止する役割を果たすこととなる。   The lead 3 includes a thick portion 31 and a thin portion 32 that is continuous with the tip portion of the thick portion 31 and part of both side surfaces (see FIGS. 2 and 3). The thickness of the thin portion 32 of the lead 3 is thinner than the thickness of the thick portion 31, and is preferably approximately half the thickness of the thick portion 31 (see FIG. 3). Although the thickness of the thin part 32 is based on the thickness of the base material used when manufacturing the multi-sided lead frame 1, it is usually about 50 to 120 μm. The thick portion 31 of the lead 3 is exposed to the lower surface side in the resin-encapsulated semiconductor device and serves as an external terminal. The thin portion 32 of the lead 3 is the thin portion in the resin-encapsulated semiconductor device. When the sealing resin is filled below 32, the lead 3 is prevented from falling off.

吊りリード4は、半導体素子搭載部2の四隅のそれぞれに一端部41を連続させることで、半導体素子搭載部2を支持する。吊りリード4の他端部42は、所定の分岐点4Aから二股に分岐してなる分岐端部42a,42aを有し、いわゆるフィッシュテール形状をなしている。   The suspension lead 4 supports the semiconductor element mounting portion 2 by connecting one end portion 41 to each of the four corners of the semiconductor element mounting portion 2. The other end portion 42 of the suspension lead 4 has branch end portions 42a and 42a that are bifurcated from a predetermined branch point 4A, and has a so-called fishtail shape.

吊りリード4の各分岐端部42a,42aは、隣接する単位リードフレームLFUの吊りリード4の各分岐端部42a,42aに連続し、分岐端部42a,42a同士の連続部4Bにタイバー5の一の端部が連続している(図2参照)。   The branch end portions 42a and 42a of the suspension lead 4 are continuous with the branch end portions 42a and 42a of the suspension lead 4 of the adjacent unit lead frame LFU, and the tie bar 5 is connected to the continuous portion 4B between the branch end portions 42a and 42a. One end is continuous (see FIG. 2).

吊りリード4の厚さは、半導体素子搭載部2の肉薄部22(リード3の肉薄部32)と略同一の厚さである。半導体装置の多ピン化等に伴い、吊りリード4とその最近傍に位置するリード3との間隔が狭くなるが、吊りリード4の厚さが半導体素子搭載部2の肉厚部21(リード3の肉厚部31)と略同一の厚さであると、樹脂封止型半導体装置において吊りリード4が下面側から露出し、当該半導体装置をはんだ付け等により配線基板等に搭載する際に、吊りリード4とその最近傍に位置する外部端子(半導体装置の下面側に露出するリード3の肉厚部31)とが電気的に接続されてしまうおそれがある。しかしながら、吊りリード4の厚さが、半導体素子搭載部2の肉薄部22(リード3の肉薄部32)と略同一の厚さであることで、当該リードフレーム1を用いて製造される樹脂封止型半導体装置において、吊りリード4の下面側に封止樹脂が充填され、当該半導体装置の下面側に吊りリード4が露出しない。そのため、当該半導体装置を配線基板等に搭載するにあたり、配線基板等における接続箇所(端子)と外部端子とをはんだ等により接続するときに、吊りリード4とその最近傍に位置する外部端子(リード3)とが電気的に接続されてしまうのを防止することができる。   The thickness of the suspension lead 4 is substantially the same as that of the thin portion 22 of the semiconductor element mounting portion 2 (the thin portion 32 of the lead 3). As the number of pins of the semiconductor device increases, the distance between the suspension lead 4 and the lead 3 located in the vicinity thereof becomes narrower, but the thickness of the suspension lead 4 is the thick portion 21 (lead 3) of the semiconductor element mounting portion 2. In the resin-encapsulated semiconductor device, the suspension leads 4 are exposed from the lower surface side, and when the semiconductor device is mounted on a wiring board or the like by soldering or the like, There is a possibility that the suspension lead 4 and the external terminal located in the vicinity thereof (the thick portion 31 of the lead 3 exposed on the lower surface side of the semiconductor device) are electrically connected. However, since the thickness of the suspension lead 4 is substantially the same as the thin portion 22 of the semiconductor element mounting portion 2 (the thin portion 32 of the lead 3), the resin seal manufactured using the lead frame 1 is used. In the stationary semiconductor device, the lower surface side of the suspension lead 4 is filled with sealing resin, and the suspension lead 4 is not exposed on the lower surface side of the semiconductor device. For this reason, when mounting the semiconductor device on a wiring board or the like, when connecting a connection location (terminal) on the wiring board or the like and an external terminal by soldering or the like, the suspension lead 4 and an external terminal (lead 3) can be prevented from being electrically connected to each other.

タイバー5は、隣接する単位リードフレームLFUの境界部に位置するようにして格子状に設けられており、タイバー5の両端部51,51のそれぞれは、吊りリード4の分岐端部42a,42a同士の連続部4Bに連続している。   The tie bars 5 are provided in a lattice shape so as to be positioned at the boundary between adjacent unit lead frames LFU, and both ends 51 and 51 of the tie bars 5 are connected to the branch ends 42 a and 42 a of the suspension leads 4. The continuous part 4B is continuous.

本実施形態に係る多面付リードフレーム1において、吊りリード4の分岐点4Aから当該吊りリード4の分岐端部42aまでの距離D1は、分岐端部42a,42a同士の連続部4Bから当該連続部4Bの最近傍に位置するリード3までの距離D2(分岐端部42a,42a同士の連続部4Bと、当該連続部4Bの最近傍に位置するリード3の短手方向(幅方向)中心を通る線分との間の長さ)よりも長い。距離D1が距離D2よりも長いことで、吊りリード4に最も近接したリード3に加わる応力が相対的に低減する。すなわち、タイバー5と吊りリード4の一の分岐端部42aの交差する点を支点として、遥動により吊りリード4に最も近接したリード3に加わる応力は、支点からの距離に比例するため、距離D2が短ければ短いほどリード3に加わる応力が相対的に低減する。   In the multifaceted lead frame 1 according to the present embodiment, the distance D1 from the branch point 4A of the suspension lead 4 to the branch end portion 42a of the suspension lead 4 is the continuous portion 4B between the branch end portions 42a and 42a. Distance D2 to the lead 3 located closest to 4B (the continuous portion 4B between the branch end portions 42a, 42a and the center in the short direction (width direction) of the lead 3 located closest to the continuous portion 4B) Longer than the length between the line segments). Since the distance D1 is longer than the distance D2, the stress applied to the lead 3 closest to the suspension lead 4 is relatively reduced. That is, the stress applied to the lead 3 that is closest to the suspension lead 4 due to the swaying movement at the intersection of the tie bar 5 and one branch end 42a of the suspension lead 4 is proportional to the distance from the fulcrum. As D2 is shorter, the stress applied to the lead 3 is relatively reduced.

また、本実施形態に係る多面付リードフレーム1において、分岐端部42a,42a同士の連続部4Bから当該連続部4Bの最近傍に位置するリード3までの距離D2(分岐端部42a,42a同士の連続部4Bと、当該連続部4Bの最近傍に位置するリード3の短手方向(幅方向)中心を通る線分との間の長さ)と、隣接するリード3,3間の距離D3(隣接するリード3,3の短手方向(幅方向)中心を通る線分(軸線)間の長さ)とが同一である。   Further, in the multi-sided lead frame 1 according to the present embodiment, the distance D2 from the continuous portion 4B between the branch end portions 42a and 42a to the lead 3 located closest to the continuous portion 4B (between the branch end portions 42a and 42a). Distance between the continuous portion 4B of the lead 3 and the line segment passing through the center in the short direction (width direction) of the lead 3 located closest to the continuous portion 4B, and the distance D3 between the adjacent leads 3 and 3 (The length between line segments (axis lines) passing through the center in the short direction (width direction) of the adjacent leads 3 and 3) is the same.

〔多面付リードフレームの製造方法〕
上述した本実施形態に係る多面付リードフレーム1の製造方法について説明する。
図4(a)〜(d)は、本実施形態に係る多面付リードフレーム1の製造工程を示す切断端面図(図1におけるA−A線に相当する位置で切断した端面図)である。
[Manufacturing method of multi-sided lead frame]
A method for manufacturing the multi-sided lead frame 1 according to the present embodiment will be described.
4A to 4D are cut end views (end views cut at a position corresponding to the line AA in FIG. 1) showing the manufacturing process of the multi-sided lead frame 1 according to the present embodiment.

まず、導電性基板60として、銅、銅合金、42合金(Ni41%のFe合金)等の金属基板(厚み100〜250μm)を用意する(図4(a)参照)。なお、導電性基板60は、その両面(上面及び下面)に脱脂処理、洗浄処理等を施したものを用いるのが好ましい。   First, a metal substrate (thickness: 100 to 250 μm) such as copper, copper alloy, 42 alloy (Ni 41% Fe alloy) is prepared as the conductive substrate 60 (see FIG. 4A). In addition, it is preferable to use what the conductive substrate 60 gave the degreasing process, the washing process, etc. to the both surfaces (upper surface and lower surface).

次に、導電性基板60の上面及び下面に感光性レジストを塗布し、乾燥させ、所望のフォトマスクを介して露光した後に現像してレジストパターン71,72を形成する(図4(b)参照)。感光性レジストとしては、従来公知のものを用いることができる。なお、図4(b)において、レジストパターン71は多面付リードフレーム1における半導体素子搭載部2の上面(肉厚部21及び肉薄部22の上面)及びリード3の上面(肉厚部31及び肉薄部32の上面)に相当する位置に形成されるものであり、レジストパターン72は多面付リードフレーム1における半導体素子搭載部2の肉厚部21の下面及びリード3の肉厚部31の下面に相当する位置に形成されるものである。また、図示しないが、吊りリード4及びタイバー5の上面に相当する位置にもレジストパターンが形成されている。   Next, a photosensitive resist is applied to the upper and lower surfaces of the conductive substrate 60, dried, exposed through a desired photomask, and developed to form resist patterns 71 and 72 (see FIG. 4B). ). A conventionally well-known thing can be used as a photosensitive resist. In FIG. 4B, the resist pattern 71 includes an upper surface of the semiconductor element mounting portion 2 (upper surface of the thick portion 21 and the thin portion 22) and an upper surface of the lead 3 (thick portion 31 and the thin portion) in the multifaceted lead frame 1. The resist pattern 72 is formed on the lower surface of the thick portion 21 of the semiconductor element mounting portion 2 and the lower surface of the thick portion 31 of the lead 3 in the multifaceted lead frame 1. It is formed at a corresponding position. Although not shown, resist patterns are also formed at positions corresponding to the upper surfaces of the suspension leads 4 and the tie bars 5.

導電性基板60の上面及び下面にレジストパターンを形成する際に、吊りリード4の分岐点4Aに相当する部位から当該吊りリード4の分岐端部42aに相当する部位までの距離D1(図2参照)が、分岐端部42a,42a同士の連続部4Bに相当する部位から当該連続部4Bの最近傍に位置するリード3に相当する部位までの距離D2(分岐端部42a,42a同士の連続部4Bに相当する部位と、当該連続部4Bの最近傍に位置するリード3に相当する部位の短手方向(幅方向)中心を通る線分との間の長さ,図2参照)よりも長くなるように、かつ分岐端部42a,42a同士の連続部4Bに相当する部位から当該連続部4Bの最近傍に位置するリード3に相当する部位までの距離D2(分岐端部42a,42a同士の連続部4Bに相当する部位と、当該連続部4Bの最近傍に位置するリード3に相当する部位の短手方向(幅方向)中心を通る線分との間の長さ,図2参照)と、隣接するリード3,3に相当する部位の間の距離D3(隣接するリード3,3に相当する部位の短手方向(幅方向)中心を通る線分(軸線)間の長さ,図2参照)とが同一になるようにする。   When forming resist patterns on the upper and lower surfaces of the conductive substrate 60, a distance D1 from a portion corresponding to the branch point 4A of the suspension lead 4 to a portion corresponding to the branch end portion 42a of the suspension lead 4 (see FIG. 2). ) Is a distance D2 from the portion corresponding to the continuous portion 4B between the branch end portions 42a and 42a to the portion corresponding to the lead 3 located closest to the continuous portion 4B (the continuous portion between the branch end portions 42a and 42a). Longer than the length between the portion corresponding to 4B and the line segment passing through the center in the short direction (width direction) of the portion corresponding to the lead 3 located closest to the continuous portion 4B (see FIG. 2) And a distance D2 from the portion corresponding to the continuous portion 4B between the branch end portions 42a and 42a to the portion corresponding to the lead 3 located closest to the continuous portion 4B (between the branch end portions 42a and 42a For continuous part 4B The length between the corresponding portion and the line segment passing through the center in the short direction (width direction) of the portion corresponding to the lead 3 located closest to the continuous portion 4B (see FIG. 2) and the adjacent lead The distance D3 between the portions corresponding to 3 and 3 (the length between the line segments (axis lines) passing through the center in the short direction (width direction) of the portion corresponding to the adjacent leads 3 and 3 (see FIG. 2)) To be identical.

続いて、レジストパターン71,72をマスクとして、エッチング液を用いて導電性基板60にエッチング処理を施す(図4(c)参照)。エッチング処理に用いるエッチング液は、導電性基板60の材質に応じて適宜選択され得るものであり、例えば、導電性基板60として銅基板を用いる場合、一般に塩化第二鉄水溶液又は塩化銅水溶液をエッチング液として用い、導電性基板60の両面(上面及び下面)からエッチング処理を施す。   Subsequently, using the resist patterns 71 and 72 as a mask, the conductive substrate 60 is etched using an etching solution (see FIG. 4C). The etching solution used for the etching process can be appropriately selected according to the material of the conductive substrate 60. For example, when a copper substrate is used as the conductive substrate 60, a ferric chloride aqueous solution or a copper chloride aqueous solution is generally etched. Etching is performed from both surfaces (upper surface and lower surface) of the conductive substrate 60 as a liquid.

このとき、導電性基板60において、多面付リードフレーム1における半導体素子搭載部2の肉薄部22の下面、リード3の肉薄部32の下面、吊りリード4の下面及びタイバー5の下面に相当する位置には、レジストパターンが形成されていないため、これらの部分は下面側から切り欠かれた状態、すなわちハーフエッチングされることになる。これにより、半導体素子搭載部2の肉厚部21及びリード3の肉厚部31の厚さの略半分の厚さを有する半導体素子搭載部2の肉薄部22、リード3の肉薄部32、吊りリード4及びタイバー5を形成することができる。   At this time, in the conductive substrate 60, positions corresponding to the lower surface of the thin portion 22 of the semiconductor element mounting portion 2, the lower surface of the thin portion 32 of the lead 3, the lower surface of the suspension lead 4, and the lower surface of the tie bar 5. In this case, since the resist pattern is not formed, these portions are notched from the lower surface side, that is, half-etched. As a result, the thin portion 22 of the semiconductor element mounting portion 2, the thin portion 32 of the lead 3, and the suspension having a thickness approximately half the thickness of the thick portion 21 of the semiconductor element mounting portion 2 and the thick portion 31 of the lead 3. Leads 4 and tie bars 5 can be formed.

最後に、導電性基板60の両面(上面及び下面)に残存するレジストパターン71,72を剥離して除去する(図4(d)参照)。これにより、本実施形態に係る多面付リードフレーム1を製造することができる。   Finally, the resist patterns 71 and 72 remaining on both surfaces (upper surface and lower surface) of the conductive substrate 60 are removed and removed (see FIG. 4D). Thereby, the lead frame 1 with multiple surfaces according to the present embodiment can be manufactured.

〔半導体装置の製造方法〕
本発明の一実施形態における半導体装置の製造方法について説明する。
図5(a)〜(d)は、本発明の一実施形態における半導体装置の製造工程を示す断面図である。
[Method of Manufacturing Semiconductor Device]
A method for manufacturing a semiconductor device according to an embodiment of the present invention will be described.
5A to 5D are cross-sectional views illustrating the manufacturing steps of the semiconductor device according to one embodiment of the present invention.

まず、図4(a)〜(d)に示す工程により作製された多面付リードフレーム1を準備し、当該多面付リードフレーム1の半導体素子搭載部2の上面に、ダイボンド材(図示せず)等により半導体素子11を固着する(図5(a)参照)。   First, the multi-faced lead frame 1 manufactured by the steps shown in FIGS. 4A to 4D is prepared, and a die bond material (not shown) is formed on the upper surface of the semiconductor element mounting portion 2 of the multi-face lead frame 1. The semiconductor element 11 is fixed by, for example, (see FIG. 5A).

次に、半導体素子搭載部2に半導体素子11が搭載されたリードフレーム1を、ワイヤーボンディング装置のステージ上に載置し、当該ワイヤーボンディング装置を用いて、半導体素子11の端子11aとリード3又は半導体素子搭載部2の肉薄部22とをワイヤー12により接続する(図5(b)参照)。このとき、本実施形態に係る多面付リードフレーム1において、吊りリード4の分岐点4Aから当該吊りリード4の分岐端部42aまでの距離D1(図2参照)が、分岐端部42a,42a同士の連続部4Bから当該連続部4Bの最近傍に位置するリード3までの距離D2(分岐端部42a,42a同士の連続部4Bと、当該連続部4Bの最近傍に位置するリード3の短手方向(幅方向)中心を通る線分との間の長さ,図2参照)よりも長いことで、吊りリード4に最も近接したリード3に加わる応力が相対的に低減する。すなわち、タイバー5と吊りリード4の一の分岐端部42aの交差する点を支点として、遥動により吊りリード4に最も近接したリード3に加わる応力は、支点からの距離に比例するため、距離D2が短ければ短いほどリード3に加わる応力が相対的に低減する。   Next, the lead frame 1 on which the semiconductor element 11 is mounted on the semiconductor element mounting portion 2 is placed on the stage of the wire bonding apparatus, and the terminal 11a of the semiconductor element 11 and the lead 3 or The thin part 22 of the semiconductor element mounting part 2 is connected by the wire 12 (see FIG. 5B). At this time, in the multifaceted lead frame 1 according to the present embodiment, the distance D1 (see FIG. 2) from the branch point 4A of the suspension lead 4 to the branch end portion 42a of the suspension lead 4 is equal to the branch end portions 42a and 42a. The distance D2 from the continuous portion 4B to the lead 3 positioned closest to the continuous portion 4B (the continuous portion 4B between the branch end portions 42a and 42a and the short side of the lead 3 positioned closest to the continuous portion 4B) The stress applied to the lead 3 closest to the suspension lead 4 is relatively reduced by being longer than the length between the direction (width direction) and the line segment passing through the center (see FIG. 2). That is, the stress applied to the lead 3 that is closest to the suspension lead 4 due to the swaying movement at the intersection of the tie bar 5 and one branch end 42a of the suspension lead 4 is proportional to the distance from the fulcrum. As D2 is shorter, the stress applied to the lead 3 is relatively reduced.

そのため、連続部4B近傍におけるタイバー5の変形が抑制され得る。その結果として、ワイヤー12とリード3との接続不良が生じるのを抑制することができ、製造される半導体装置10におけるワイヤー12の接続信頼性を向上させることができる。   Therefore, deformation of the tie bar 5 in the vicinity of the continuous portion 4B can be suppressed. As a result, it is possible to suppress a connection failure between the wire 12 and the lead 3 and improve the connection reliability of the wire 12 in the manufactured semiconductor device 10.

このようにして、半導体素子11におけるすべての接続すべき端子11aと各リード3又は半導体素子搭載部2の肉薄部22とをワイヤー12により接続した後、当該リードフレーム1を成形金型内に収容し、半導体素子搭載部2の肉厚部21及び各リード3の肉厚部31の下面を外部に露出させるようにして、半導体素子11、半導体素子搭載部2、リード3、吊りリード4及びワイヤー12を封止樹脂13により封止する(図5(c)参照)。   In this way, after all the terminals 11a to be connected in the semiconductor element 11 and each lead 3 or the thin portion 22 of the semiconductor element mounting portion 2 are connected by the wire 12, the lead frame 1 is accommodated in the molding die. Then, the semiconductor element 11, the semiconductor element mounting part 2, the lead 3, the suspension lead 4 and the wire are exposed so that the lower surface of the thick part 21 of the semiconductor element mounting part 2 and the thick part 31 of each lead 3 is exposed to the outside. 12 is sealed with a sealing resin 13 (see FIG. 5C).

続いて、封止樹脂13により封止されたリードフレーム1を成形金型から取り出し、リード3の肉厚部31と吊りリード4とを切断し、半導体装置10ごとに分離する。具体的には、単位リードフレームLFU(半導体素子11)ごとにタイバー5に沿ってダイシングすることにより、各リード3の肉厚部31及び各吊りリード4(分岐端部42a)を切断し、タイバー5を除去する。このようにして、半導体素子搭載部2と、半導体素子搭載部2の上面に搭載された半導体素子11と、半導体素子搭載部2と電気的に独立するようにして当該半導体素子搭載部2の周囲に設けられてなる複数の外部端子30と、半導体素子11の各端子11aと半導体素子搭載部2又は各外部端子30とを電気的に接続するワイヤー12と、外部端子30の下面及び先端部に対向する側面を外部に露出させるようにして、半導体素子搭載部2、各外部端子30、吊りリード(図5(d)において図示せず)、半導体素子11及びワイヤー12を封止する封止樹脂13とを備える半導体装置10を得ることができる(図5(d)参照)。   Subsequently, the lead frame 1 sealed with the sealing resin 13 is taken out from the molding die, the thick portion 31 of the lead 3 and the suspension lead 4 are cut, and separated for each semiconductor device 10. Specifically, by dicing along the tie bar 5 for each unit lead frame LFU (semiconductor element 11), the thick portion 31 of each lead 3 and each suspension lead 4 (branch end portion 42a) are cut, and the tie bar is cut. 5 is removed. In this manner, the semiconductor element mounting portion 2, the semiconductor element 11 mounted on the upper surface of the semiconductor element mounting portion 2, and the periphery of the semiconductor element mounting portion 2 so as to be electrically independent of the semiconductor element mounting portion 2. A plurality of external terminals 30, wires 12 for electrically connecting the respective terminals 11 a of the semiconductor element 11 to the semiconductor element mounting portion 2 or the respective external terminals 30, and the lower surface and the distal end portion of the external terminal 30. Sealing resin for sealing the semiconductor element mounting portion 2, the external terminals 30, the suspension leads (not shown in FIG. 5D), the semiconductor element 11, and the wires 12 so that the opposing side surfaces are exposed to the outside. 13 can be obtained (see FIG. 5D).

以上説明した実施形態は、本発明の理解を容易にするために記載されたものであって、本発明を限定するために記載されたものではない。したがって、上記実施形態に開示された各要素は、本発明の技術的範囲に属する全ての設計変更や均等物をも含む趣旨である。   The embodiment described above is described for facilitating understanding of the present invention, and is not described for limiting the present invention. Therefore, each element disclosed in the above embodiment is intended to include all design changes and equivalents belonging to the technical scope of the present invention.

上記実施形態に係る多面付リードフレーム1においては、分岐端部42a,42a同士の連続部4Bから当該連続部4Bの最近傍に位置するリード3までの距離D2(分岐端部42a,42a同士の連続部4Bと、当該連続部4Bの最近傍に位置するリード3の短手方向(幅方向)中心を通る線分との間の長さ)と、隣接するリード3,3間の距離D3(隣接するリード3,3に相当する部位の短手方向(幅方向)中心を通る線分(軸線)間の長さ)とが同一であるが、本発明はこのような態様に限定されるものではない。少なくとも、吊りリード4の分岐点4Aから当該吊りリード4の分岐端部42aまでの距離D1が、分岐端部42a,42a同士の連続部4Bから当該連続部4Bの最近傍に位置するリード3までの距離D2(分岐端部42a,42a同士の連続部4Bと、当該連続部4Bの最近傍に位置するリード3の短手方向(幅方向)中心を通る線分との間の長さ)よりも長く構成されていれば、吊りリード4に最も近接したリード3に加わる応力が相対的に低減する。よって、分岐端部42a,42a同士の連続部4Bから当該連続部4Bの最近傍に位置するリード3までの距離D2(分岐端部42a,42a同士の連続部4Bと、当該連続部4Bの最近傍に位置するリード3の短手方向(幅方向)中心を通る線分との間の長さ)と、隣接するリード3,3間の距離D3(隣接するリード3,3に相当する部位の短手方向(幅方向)中心を通る線分(軸線)間の長さ)とが同一でなくてもよく、距離D2が距離D3よりも長くてもよいし、短くてもよい。   In the multifaceted lead frame 1 according to the above-described embodiment, the distance D2 (the distance between the branch end portions 42a and 42a) from the continuous portion 4B between the branch end portions 42a and 42a to the lead 3 located closest to the continuous portion 4B. The distance D3 (the length between the continuous portion 4B and the line segment passing through the center in the short direction (width direction) of the lead 3 located closest to the continuous portion 4B) and the adjacent leads 3 and 3 The length of the line segment (axis line) passing through the center in the short direction (width direction) of the portion corresponding to the adjacent leads 3 and 3 is the same, but the present invention is limited to such a mode. is not. At least the distance D1 from the branch point 4A of the suspension lead 4 to the branch end portion 42a of the suspension lead 4 is from the continuous portion 4B between the branch end portions 42a and 42a to the lead 3 positioned closest to the continuous portion 4B. Distance D2 (the length between the continuous portion 4B between the branch end portions 42a and 42a and the line segment passing through the center in the short direction (width direction) of the lead 3 located closest to the continuous portion 4B). If the length is long, the stress applied to the lead 3 closest to the suspension lead 4 is relatively reduced. Therefore, the distance D2 from the continuous portion 4B between the branch end portions 42a and 42a to the lead 3 positioned nearest to the continuous portion 4B (the continuous portion 4B between the branch end portions 42a and 42a and the nearest portion of the continuous portion 4B). The distance between the adjacent lead 3 and 3 and the distance D3 between the adjacent leads 3 and 3 (the length of the portion corresponding to the adjacent leads 3 and 3). The length between the line segments (axis lines) passing through the center in the short direction (width direction) may not be the same, and the distance D2 may be longer or shorter than the distance D3.

上記実施形態においては、隣接する単位リードフレームLFUの吊りリード4の各分岐端部42a,42aが連続部4Bにて連続することで、4つの吊りリード4の端部42による略方形状の枠部が形成され、上記連続部4Bに端部51が連続するタイバー5は当該枠部内に存在しないが、本発明はこのような態様に限定されるものではなく、図6に示すように、吊りリード4の各分岐端部42a,42aの連続部4Bから上記枠部内にタイバー5が延在し、当該枠部内の略中央で交差するようにして、上記枠部内に十字状のタイバー5が設けられていてもよい。吊りリード4の他端部42近傍がこのように構成されていることで、吊りリード4の分岐端部42aとタイバー5との連続部4B近傍におけるタイバー5の変形をより抑制することができる。   In the above embodiment, the branch end portions 42a and 42a of the suspension leads 4 of the adjacent unit lead frames LFU are continuous at the continuous portion 4B, so that the substantially rectangular frame is formed by the end portions 42 of the four suspension leads 4. The tie bar 5 in which the end portion 51 is formed in the continuous portion 4B does not exist in the frame portion, but the present invention is not limited to such a mode, and as shown in FIG. A tie bar 5 extends from the continuous portion 4B of each branch end portion 42a, 42a of the lead 4 into the frame portion, and a cross-shaped tie bar 5 is provided in the frame portion so as to intersect at substantially the center in the frame portion. It may be done. Since the vicinity of the other end portion 42 of the suspension lead 4 is configured in this way, deformation of the tie bar 5 in the vicinity of the continuous portion 4B between the branch end portion 42a of the suspension lead 4 and the tie bar 5 can be further suppressed.

本発明は、QFNタイプ等のような樹脂封止型半導体装置を製造するためのリードフレームとして有用である。   The present invention is useful as a lead frame for manufacturing a resin-encapsulated semiconductor device such as a QFN type.

1…多面付リードフレーム
2…半導体素子搭載部
21…肉厚部
22…肉薄部
3…リード
31…肉厚部
32…肉薄部
4…吊りリード
42a…分岐端部
5…タイバー
10…半導体装置
11…半導体素子
11a…端子
12…ワイヤー
13…封止樹脂
30…外部端子
DESCRIPTION OF SYMBOLS 1 ... Multi-sided lead frame 2 ... Semiconductor element mounting part 21 ... Thick part 22 ... Thin part 3 ... Lead 31 ... Thick part 32 ... Thin part 4 ... Hanging lead 42a ... Branch end part 5 ... Tie bar 10 ... Semiconductor device 11 ... Semiconductor element 11a ... Terminal 12 ... Wire 13 ... Sealing resin 30 ... External terminal

Claims (4)

上面に半導体素子が搭載される半導体素子搭載部と、一端部が前記半導体素子搭載部に連続し、他端部が二股に分岐する吊りリードと、前記半導体素子搭載部に先端部を対向させるようにして当該半導体素子搭載部の周囲に並設されてなる複数のリードとを有する単位リードフレームが、縦横に複数個マトリックス状に配列されてなる多面付リードフレームであって、
前記多面付リードフレームは、隣接する前記単位リードフレーム間の境界部に位置するように格子状に設けられ、前記複数のリードを支持するタイバーを備え、
一の前記単位リードフレームにおける前記吊りリードの二股に分岐する各分岐端部は、隣接する他の前記単位リードフレームにおける前記吊りリードの二股に分岐する各分岐端部に連続し、
前記タイバーの両端部のそれぞれは、隣接する2つの前記単位リードフレームにおける各吊りリードの分岐端部同士の連続部に連続し、
前記吊りリードの分岐点から当該吊りリードの分岐端部までの距離が、前記分岐端部同士の連続部から当該連続部の最近傍に位置するリードまでの距離よりも長いことを特徴とする多面付リードフレーム。
A semiconductor element mounting portion on which a semiconductor element is mounted on an upper surface, a suspension lead having one end continuous with the semiconductor element mounting portion and a branching end bifurcated, and a tip portion facing the semiconductor element mounting portion A unit lead frame having a plurality of leads arranged in parallel around the semiconductor element mounting portion is a multi-faceted lead frame arranged in a matrix in a plurality of vertical and horizontal directions,
The multi-faceted lead frame is provided in a lattice shape so as to be positioned at a boundary portion between the adjacent unit lead frames, and includes a tie bar for supporting the plurality of leads.
Each branch end branching into two branches of the suspension lead in one unit lead frame is continuous with each branch end branching into two branches of the suspension lead in another adjacent unit lead frame,
Each of the both ends of the tie bar is continuous to the continuous portion between the branch ends of the suspension leads in the two adjacent unit lead frames,
The distance from the branch point of the suspension lead to the branch end portion of the suspension lead is longer than the distance from the continuous portion of the branch end portions to the lead located closest to the continuous portion Lead frame with.
前記分岐端部同士の連続部から当該連続部の最近傍に位置するリードまでの距離と、隣接する前記リード間の距離とが同一であることを特徴とする請求項1に記載の多面付リードフレーム。   2. The multifaceted lead according to claim 1, wherein a distance from a continuous portion between the branch end portions to a lead located nearest to the continuous portion is the same as a distance between adjacent leads. flame. 請求項1又は2に記載の多面付リードフレームを製造する方法であって、
金属基板の上面及び下面のそれぞれに、所定のパターン形状を有するレジストパターンを形成するレジストパターン形成工程と、
前記レジストパターンが形成された導電性基板に対してエッチング処理を施すエッチング工程と
を含み、
前記レジストパターン形成工程において、前記吊りリードの分岐点から当該吊りリードの分岐端部までの距離が、前記分岐端部同士の連続部から当該連続部の最近傍に位置するリードまでの距離よりも長くなるように、前記レジストパターンを形成することを特徴とする多面付リードフレームの製造方法。
A method for producing a multi-faceted lead frame according to claim 1 or 2,
A resist pattern forming step of forming a resist pattern having a predetermined pattern shape on each of the upper surface and the lower surface of the metal substrate;
An etching step of performing an etching process on the conductive substrate on which the resist pattern is formed,
In the resist pattern forming step, the distance from the branch point of the suspension lead to the branch end portion of the suspension lead is greater than the distance from the continuous portion between the branch end portions to the lead located closest to the continuous portion. A method of manufacturing a multi-faceted lead frame, wherein the resist pattern is formed to be long.
請求項1又は2に記載の多面付リードフレームにおける前記半導体素子搭載部の上面に半導体素子を固着する工程と、
前記半導体素子の各端子と複数のリードのそれぞれとをワイヤーを介して接続するワイヤーボンディング工程と、
前記半導体素子、前記半導体素子搭載部、前記複数のリード及び前記ワイヤーを封止樹脂にて封止する樹脂封止工程と、
前記封止樹脂にて封止されたリードフレームを、前記タイバーに沿って切断し、前記半導体素子ごとに個片化するダイシング工程と
を含むことを特徴とする半導体装置の製造方法。
Fixing the semiconductor element to the upper surface of the semiconductor element mounting portion in the multi-faceted lead frame according to claim 1,
A wire bonding step of connecting each terminal of the semiconductor element and each of the plurality of leads via a wire;
A resin sealing step of sealing the semiconductor element, the semiconductor element mounting portion, the plurality of leads and the wire with a sealing resin;
And a dicing step of cutting the lead frame sealed with the sealing resin along the tie bar into individual pieces for each of the semiconductor elements.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016082222A (en) * 2014-10-09 2016-05-16 大日本印刷株式会社 Lead frame and method of manufacturing the same
CN106876359A (en) * 2015-11-05 2017-06-20 新光电气工业株式会社 Lead frame and its manufacture method, semiconductor device
CN107068643A (en) * 2015-10-16 2017-08-18 新光电气工业株式会社 Lead frame and its manufacture method, semiconductor device
US9793194B2 (en) 2015-10-23 2017-10-17 Shinko Electric Industries Co., Ltd. Leadframe

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001326316A (en) * 2000-05-12 2001-11-22 Dainippon Printing Co Ltd Frame for resin-sealed semiconductor device
JP2004214233A (en) * 2002-12-26 2004-07-29 Renesas Technology Corp Semiconductor device and manufacturing method therefor
US20100244210A1 (en) * 2009-03-31 2010-09-30 Sanyo Electric Co., Ltd Lead frame and method for manufacturing circuit device using the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001326316A (en) * 2000-05-12 2001-11-22 Dainippon Printing Co Ltd Frame for resin-sealed semiconductor device
JP2004214233A (en) * 2002-12-26 2004-07-29 Renesas Technology Corp Semiconductor device and manufacturing method therefor
US20100244210A1 (en) * 2009-03-31 2010-09-30 Sanyo Electric Co., Ltd Lead frame and method for manufacturing circuit device using the same

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016082222A (en) * 2014-10-09 2016-05-16 大日本印刷株式会社 Lead frame and method of manufacturing the same
JP2020014029A (en) * 2014-10-09 2020-01-23 大日本印刷株式会社 Lead frame and method of manufacturing the same
JP2020205456A (en) * 2014-10-09 2020-12-24 大日本印刷株式会社 Lead frame and method of manufacturing the same
JP7044142B2 (en) 2014-10-09 2022-03-30 大日本印刷株式会社 Lead frame and its manufacturing method
CN107068643A (en) * 2015-10-16 2017-08-18 新光电气工业株式会社 Lead frame and its manufacture method, semiconductor device
CN107068643B (en) * 2015-10-16 2021-12-14 新光电气工业株式会社 Lead frame, method of manufacturing the same, and semiconductor device
US9793194B2 (en) 2015-10-23 2017-10-17 Shinko Electric Industries Co., Ltd. Leadframe
CN106876359A (en) * 2015-11-05 2017-06-20 新光电气工业株式会社 Lead frame and its manufacture method, semiconductor device
US9984958B2 (en) 2015-11-05 2018-05-29 Shinko Electric Industries Co., Ltd. Leadframe and semiconductor device

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