JP2013254376A5 - - Google Patents

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Publication number
JP2013254376A5
JP2013254376A5 JP2012129885A JP2012129885A JP2013254376A5 JP 2013254376 A5 JP2013254376 A5 JP 2013254376A5 JP 2012129885 A JP2012129885 A JP 2012129885A JP 2012129885 A JP2012129885 A JP 2012129885A JP 2013254376 A5 JP2013254376 A5 JP 2013254376A5
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JP
Japan
Prior art keywords
power
power control
control target
unit
semiconductor integrated
Prior art date
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Application number
JP2012129885A
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English (en)
Japanese (ja)
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JP6103825B2 (ja
JP2013254376A (ja
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Priority to JP2012129885A priority Critical patent/JP6103825B2/ja
Priority claimed from JP2012129885A external-priority patent/JP6103825B2/ja
Priority to US13/909,995 priority patent/US9235255B2/en
Publication of JP2013254376A publication Critical patent/JP2013254376A/ja
Publication of JP2013254376A5 publication Critical patent/JP2013254376A5/ja
Application granted granted Critical
Publication of JP6103825B2 publication Critical patent/JP6103825B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2012129885A 2012-06-07 2012-06-07 半導体集積回路、情報処理装置 Active JP6103825B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2012129885A JP6103825B2 (ja) 2012-06-07 2012-06-07 半導体集積回路、情報処理装置
US13/909,995 US9235255B2 (en) 2012-06-07 2013-06-04 Semiconductor integrated circuit and information processing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012129885A JP6103825B2 (ja) 2012-06-07 2012-06-07 半導体集積回路、情報処理装置

Publications (3)

Publication Number Publication Date
JP2013254376A JP2013254376A (ja) 2013-12-19
JP2013254376A5 true JP2013254376A5 (enExample) 2015-07-09
JP6103825B2 JP6103825B2 (ja) 2017-03-29

Family

ID=49716267

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012129885A Active JP6103825B2 (ja) 2012-06-07 2012-06-07 半導体集積回路、情報処理装置

Country Status (2)

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US (1) US9235255B2 (enExample)
JP (1) JP6103825B2 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8786332B1 (en) * 2013-01-17 2014-07-22 Apple Inc. Reset extender for divided clock domains
CN104679439B (zh) * 2013-11-29 2018-06-26 英业达科技有限公司 数据存取管理装置及方法
JP6582435B2 (ja) * 2015-02-24 2019-10-02 セイコーエプソン株式会社 集積回路装置及び電子機器
JP6562745B2 (ja) * 2015-07-16 2019-08-21 キヤノン株式会社 光電変換装置、画像読取装置、画像形成装置
US10545556B2 (en) * 2017-05-10 2020-01-28 Texas Instruments Incorporated Fine-grained dynamic power and clock-gating control
JP7087509B2 (ja) * 2018-03-19 2022-06-21 富士フイルムビジネスイノベーション株式会社 情報処理装置及び回路装置
JP7731127B2 (ja) * 2021-09-10 2025-08-29 国立大学法人東北大学 半導体回路装置及び論理回路設計支援装置
US20240353479A1 (en) * 2023-04-19 2024-10-24 Nxp Usa, Inc. On-chip fault detection due to malfunctions on chip pins

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5801561A (en) * 1995-05-01 1998-09-01 Intel Corporation Power-on initializing circuit
JP3201365B2 (ja) * 1998-11-30 2001-08-20 日本電気株式会社 Ｉｃ内蔵用パワーオン回路
JP3437174B2 (ja) * 2001-04-12 2003-08-18 沖電気工業株式会社 省電力化集積回路および省電力化集積回路の制御方法
JP4338514B2 (ja) * 2001-08-29 2009-10-07 メディアテック インコーポレーテッド プロセッサ性能を改善するためのフラッシュバーストモードを利用する方法および装置
KR20050085962A (ko) * 2003-01-13 2005-08-29 에이알엠 리미티드 데이터 처리성능 제어
KR101136036B1 (ko) * 2003-12-24 2012-04-18 삼성전자주식회사 유휴 모드에서의 전력 소모가 감소된 프로세서 시스템 및그 방법
KR100571651B1 (ko) * 2003-12-29 2006-04-17 주식회사 하이닉스반도체 파워다운 모드의 안정적인 탈출을 위한 제어회로
JP4341500B2 (ja) * 2004-08-09 2009-10-07 セイコーエプソン株式会社 情報処理装置および電源投入方法
JP2007233718A (ja) * 2006-03-01 2007-09-13 Canon Inc 制御装置及び半導体集積回路
JP4908983B2 (ja) * 2006-09-12 2012-04-04 パナソニック株式会社 マイクロコントローラおよびその関連技術
US8347132B2 (en) * 2009-01-07 2013-01-01 Taiwan Semiconductor Manufacturing Company, Ltd. System and method for reducing processor power consumption
CN101944527B (zh) * 2009-07-08 2012-11-21 炬才微电子（深圳）有限公司 一种集成电路及其待机控制方法

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